序号 专利名 申请号 申请日 公开(公告)号 公开(公告)日 发明人
1 使用电线通信和导向控制线上的频分复用的通信设备及相关系统 CN201280057662.1 2012-09-26 CN103999321B 2017-09-22 N·莫朗
发明涉及一种使用电线通信(D1)的通信设备,所述电力线通信提供在经由电力电缆(CE)耦合到另一系统(S2)的一个系统(SI)中,所述电力电缆包括具有第一阻抗的导向控制线(LP),所述导向控制线至少经历第二阻抗和第三阻抗,并且第一频带中的第一模拟信号经过所述导向控制线。所述设备(D1)布置为i)根据本地数字信号生成具有包括在第二频带中的频率的第二模拟电力线通信信号,所述第二频带与所述第一频带具有最小的重叠,ii)经由电容装置(C1)向所述导向控制线(LP)供应所述第二模拟信号,以及iii)从经过所述导向控制线(LP)的模拟信号提取每一个第二模拟信号以便将后者转换为将由所述系统(SI)处理的数字信号。
2 快速辨识的指纹辨识感测器 CN201610382450.0 2016-06-01 CN106407876A 2017-02-15 徐荣国
一种快速辨识的指纹辨识感测器,包含一基板、一导电板、一钝化层、一充电电容、一开关组及一类比数位转换器,该导电板设置于该基板上,该钝化层设置于该导电板上并和一手指接近以检测一指纹,该开关组包括一第一开关及一第二开关,该第一开关控制一输入电压对该充电电容进行充电,该第二开关的两端分别电性连接至该导电板以及该第一开关和该充电电容,该类比数位转换器与该充电电容电性连接,该第二开关控制该充电电容进行多次电荷分享,该类比数位转换器根据电荷分享后的一残余电压输出一指纹辨识信号
3 信号转换电路及指纹识别系统 CN201510685724.9 2015-10-21 CN105281769A 2016-01-27 谭波; 詹昶
发明提供了一种信号转换电路及指纹识别系统,所述信号转换电路用来根据第一模拟信号产生第一数字信号,该信号转换电路包含有比较器及计数器,该比较器包含有:第一输入端,用来接收第一模拟信号;第二输入端,连接于参考电压产生器,用来接收参考电压;以及输出端,用来输出第二数字信号;计数器,连接于该输出端,用来产生第一数字信号。本发明提供的信号转换电路具有电路结构简单、电路面积小、成本低以及低功耗的优点。
4 使用电线通信和导向控制线上的频分复用的通信设备及相关系统 CN201280057662.1 2012-09-26 CN103999321A 2014-08-20 N·莫朗
发明涉及一种使用电线通信(D1)的通信设备,所述电力线通信提供在经由电力电缆(CE)耦合到另一系统(S2)的一个系统(SI)中,所述电力电缆包括具有第一阻抗的导向控制线(LP),所述导向控制线至少经历第二阻抗和第三阻抗,并且第一频带中的第一模拟信号经过所述导向控制线。所述设备(D1)布置为i)根据本地数字信号生成具有包括在第二频带中的频率的第二模拟电力线通信信号,所述第二频带与所述第一频带具有最小的重叠,ii)经由电容装置(C1)向所述导向控制线(LP)供应所述第二模拟信号,以及iii)从经过所述导向控制线(LP)的模拟信号提取每一个第二模拟信号以便将后者转换为将由所述系统(SI)处理的数字信号。
5 自适应调整参考电压的逐次逼近型ADC CN201610841368.X 2016-09-22 CN106656191A 2017-05-10 高静; 黄蕊; 李奕; 徐江涛; 史再峰
发明属模拟集成电路设计技术领域,为实现在高照度下,采用高参考电压;在低照度下,采用低参考电压,从而可以实现在低照度情况下的高精度量化,同时不需增加额外功耗和转换周期数。本发明采用的技术方案是,自适应调整参考电压的逐次逼近型ADC,由前端比较器模、SAR ADC主体模块、4个SAR ADC主体模块的参考电压控制开关以及数字滤波器模块四部分构成;其中输入信号Vin连接前端比较器的正输入端,前端比较器的负输入端连接一个参考电平Vcomp;前端比较器的输出连接参考电压的控制开关1和2;输入信号同时还连接SAR ADC主体模块的输入端。本发明主要应用于模拟集成电路设计制造场合。
6 模数转换装置与模数转换方法 CN201410745152.4 2014-12-08 CN104716959A 2015-06-17 黄彦筌; 楼志宏; 王麒云; 洪立翰; 吴旻桦
一种模数转换装置与模数转换方法,该模数转换装置包含:一积分器,用来根据一模拟输入信号与一第一模拟反馈信号以产生一积分信号;一低通滤波器,用来根据该积分信号以产生一第一过滤后信号;一模数转换器,用来根据该第一过滤后信号以产生一数字输出信号;以及一第一数模转换器,用来根据该数字输出信号以产生该第一模拟反馈信号。本发明实施例的模数转换装置与相关方法与传统的设计相比,在成本、面积、稳定性以及功率消耗上的性能均能得到优化。
7 不可听信号的听诊方法及装置 CN201310465951.1 2013-10-06 CN104510492A 2015-04-15 吴伟
现有听诊技术只适用于音频范围并且通过振动传导的声音信号。本发明公开一种不可听信号的听诊方法及装置,能够将不可听信号,映射到可听范围以构成可听信号。该方法包括:获取信号数据,包括可听或者不可听信号数据;从信号数据中提取信号波形;确定一个能够使信号波形通过音频播放装置发声的播放速率,将信号波形通过音频播放装置以播放速率播放听诊,或者将该播放速率与信号波形组合,构成音频信号,用音频播放器播放该音频信号实现听诊。应用本发明方法及装置,能够实现对任何够用波形曲线表述的物理量变化进行听诊,有望发掘出不可听信号内在的现有技术难以发现的信息,推动科技创新的发展。
8 用于操作模数转换器的电路装置和方法 CN201410094412.6 2014-03-14 CN104052476A 2014-09-17 A.迈尔; J.施纳贝尔
发明涉及用于操作模数转换器的电路装置和方法。电路装置包括第一电阻器、第二电阻器电流源和模数转换器。第二电阻器热耦合到第一电阻器。电流源耦合到第二电阻器。模数转换器可以被配置成接收经由第一电阻器测量的作为将被数字化的电压的第一电压,并且被配置成接收经由第二电阻器测量的作为该模数转换器的参考电压的第二电压。
9 SIGNAL CONVERSION CIRCUIT AND FINGERPRINT RECOGNITION SYSTEM EP16856556.2 2016-01-21 EP3367572A1 2018-08-29 TAN, Bo; ZHAN, Chang

The present invention provides a signal conversion circuit and fingerprint identification system. The signal conversion circuit is configured to generate a first digital signal according to a first analog signal, and includes a comparator and counter. The comparator includes a first input terminal configured to receive the first analog signal, a second input terminal connected to a reference voltage generator and configured to receive a reference voltage, and an output terminal configured to output a second digital signal. The counter is connected to the output terminal, and is configured to generate a first digital signal. The signal conversion circuit according to the present invention has the advantages of simple circuit structure, small circuit area, low cost and low power consumption.

10 ANALOG TO DIGITAL CONVERTER WITH INTERNAL TIMER EP16725974 2016-05-06 EP3295566A1 2018-03-21 QUIQUEMPOIX VINCENT; BARRETO ALEXANDRE
An analog-to-digital converter includes circuitry for receiving an analog input and converting the input to a digital signal; and non-transitory control circuitry configured for: receiving a sampling time; receiving a conversion time; determining a power up time from at least one sleep mode; and causing the digital-to-analog converter to enter into the at least one sleep mode if the sum of the power up time and conversion time is less than the sampling time.
11 DYNAMIC COMPRESSION/DECOMPRESSION (CODEC) CONFIGURATION EP13888501 2013-06-24 EP3014774A4 2017-04-05 JIN ZHONGHUI; QIAO NAN
The present disclosure is directed dynamic compression/decompression (codec) configuration. In general, a device may include a codec configuration module to determine a configuration for use by the codec based on configuration criteria. The configuration criteria may include, for example, data characteristic information, system condition information and user expectation information. The configuration information may be used to select a codec configuration from one or more available codec configurations. For example, a benchmark module also in the device may determine the available codec configurations. After a codec configuration has been selected, it may be set in the codec. It may also be possible for the codec configuration module to monitor for changes in device operation (e.g., changes in the configuration criteria) and to update the codec configuration based on the monitored changes.
12 Analog-to-digital converting device EP14197322.2 2014-12-11 EP2890015A1 2015-07-01 Huang, Yen-Chuan; Lou, Chih-Hong; Wang, Chi-Yun; Hung, Li-Han; Wu, Min-Hua

An analog-to-digital converting device (100, 200) includes: an integrator (102, 202) arranged to generate an integrating signal according to an analog input signal and a first analog feedback signal; a low-pass filter (104, 304, 404, 504, 604, 704) arranged to generate a first filtered signal according to the integrating signal; an analog-to-digital converter (106) arranged to generate a digital output signal according to the first filtered signal; and a first digital-to-analog converter (108) arranged to generate the first analog feedback signal according to the digital output signal.

13 DISPOSITIF DE COMMUNICATION PAR COURANTS PORTEURS EN LIGNE ET MULTIPLEXAGE FRÉQUENTIEL DANS UNE LIGNE PILOTE, ET SYSTÈMES ASSOCIÉS EP12773088.5 2012-09-26 EP2761717B1 2018-10-31 MORAND, Nicolas
14 VERFAHREN ZUR BESTIMMUNG EINER MESSGRÖßE EP15804496.6 2015-12-03 EP3231093A1 2017-10-18 REISCHL, Rolf; WREDE, Martin; BEVOT, Claudius; MEZGER, Florian; KRAEMER, Ralf; MITTASCH, Anne-Katrin; SCHULZ, Thomas; LEDERMANN, Bernhard
The invention relates to a method for determining a measurement variable (Q), characterized by the following steps: providing a model (M) of a circuit (DAC) having at least one parameter (tau, Imax); actuating the circuit (DAC) by way of a preset signal (H), and detecting values (l1, l2,l3) of a manipulated variable (I) generated by the circuit in n discrete points in time (t1, t2, t3), and determining a value (tauDAC, lmaxDAC) of the at least one Parameter (tau, lmax) on the basis of the detected values (I1, l2, l3) of the manipulated variable (I) generated by the circuit (DAC); detecting values (J1, J2) of a variable (J) influenced by the circuit (DAC) in m discrete points in time (T1, T2), and determining the measurement variable (Q) from the measurement values (J1, J2) of the variable (J) influenced by the circuit (DAC), taking into account the model (M) of the circuit (DAC).
15 DYNAMIC COMPRESSION/DECOMPRESSION (CODEC) CONFIGURATION EP13888501.7 2013-06-24 EP3014774A1 2016-05-04 JIN, Zhonghui; QIAO, Nan
The present disclosure is directed dynamic compression/decompression (codec) configuration. In general, a device may include a codec configuration module to determine a configuration for use by the codec based on configuration criteria. The configuration criteria may include, for example, data characteristic information, system condition information and user expectation information. The configuration information may be used to select a codec configuration from one or more available codec configurations. For example, a benchmark module also in the device may determine the available codec configurations. After a codec configuration has been selected, it may be set in the codec. It may also be possible for the codec configuration module to monitor for changes in device operation (e.g., changes in the configuration criteria) and to update the codec configuration based on the monitored changes.
16 Continuous-time oversampling pipeline analog-to-digital converter EP14157548.0 2014-03-03 EP2779464A3 2015-08-05 Shibata, Hajime

A converter may include multiple converter stages connected in series. Each converter stage may receive a clock signal and an analog input signal, and may generate an analog output signal and a digital output signal. Each converter stages may include an encoder generating the digital output signal, a decoder generating a reconstructed signal, a delaying converter generating a delayed signal, and an amplifier generating a residue signal, wherein the delayed signal may be a continuous current signal.

17 MULTI-LEVEL PARALLEL SUPER-HIGH SPEED ADC AND DAC USING LOGARITHMIC COMPANDING LAW EP13731648.5 2013-02-22 EP2800276A2 2014-11-05 Chen, Qixing; Luo, Qiyu

Multi-stage parallel super-high-speed ADC and DAC of a logarithmic companding law has a voltage follower switch having zero voltage drop, and also has a lossless threshold switch group, wherein a quantization voltage of A/D conversion or D/A conversion is directly obtained through voltage-dividing resistance thereof The ADC and DAC simplify a conversion process and reduce a conversion error. The ADC and DAC provide multi-stage multi-bit parallel super-high-speed A/D conversion and D/A conversion with logarithmic companding law of a high conversion rate and the low conversion error.

18 DISPOSITIF DE COMMUNICATION PAR COURANTS PORTEURS EN LIGNE ET MULTIPLEXAGE FRÉQUENTIEL DANS UNE LIGNE PILOTE, ET SYSTÈMES ASSOCIÉS EP12773088.5 2012-09-26 EP2761717A1 2014-08-06 MORAND, Nicolas
The invention relates to a communication device using power line communication (D1) provided in one system (S1) coupled to another system (S2) via a power cable (CE) comprising a pilot line (LP) having a first impedance, which encounters at least second and third impedances and through which a first analog signal passes in a first frequency band. Said device (D1) is arranged so as to: i) generate, from a local digital signal, a second analog power line communication signal having frequencies included in a second frequency band that has minimal overlap with the first frequency band; ii) supply the second analog signal to the pilot line (LP) via a capacitive means (C1); and iii) extract, from the analog signals passing through the pilot line (LP), each second analog signal in order to convert the latter into a digital signal to be processed by the system (S1).
19 アナログ領域とデジタル領域との間での不一致誤差の整形機能を有する変換システム JP2016173775 2016-09-06 JP6374457B2 2018-08-15 ユン−シャン,シュウ
20 増幅回路 JP2016171117 2016-09-01 JP2018037950A 2018-03-08 杉本 智彦; 石井 啓友; 吉岡 健太郎

【課題】 小型で高精度の増幅を行なうことができる増幅回路を提供する。
【解決手段】 実施形態の増幅回路は、入信号の電圧をサンプリングするサンプリング回路と、サンプリング回路の出力に接続された増幅器と、増幅器から出力される出力電圧をサンプリング回路の出力電圧に帰還する帰還容量と、サンプリング回路の出力及び前記帰還容量に入力が接続された比較器を含み、比較器によりサンプリング回路の出力電圧を量子化して、デジタルコードを出力する量子化器を具備する。また、増幅回路は、量子化器によって出力されたデジタルコードを出力し、増幅器のオフセットと比較器のオフセットとの差をキャンセルするためのキャンセルデジタルコードを格納するレジスタを具備する制御回路と、制御回路から出力されたデジタルコードに応じたアナログ信号を出力するD/A変換器とを具備する。
【選択図】図1
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