| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 161 | Linear rf amplifier with a polar feedback | JP2011096736 | 2011-04-25 | JP5248651B2 | 2013-07-31 | レーン，ジョン，アール; オーバーストリート，ウィリアム，ピー |
| 162 | 電力増幅器、無線通信機および電力増幅方法 | JP2011534293 | 2010-09-30 | JPWO2011040507A1 | 2013-02-28 | 慎吾 山之内 |
| 高い電力効率で広帯域の信号を増幅できるようにする。電力増幅器は、振幅変調成分及び位相変調成分を含む変調信号を受信し、振幅変調成分を出力するとともに、変調信号を搬送波に重畳してRF変調信号として出力し、振幅変調成分及びRF変調信号の少なくともいずれか一方を遅延させるポーラ変調器と、振幅変調成分を受信し、振幅変調成分をパルス変調してパルス変調信号として出力するとともに、振幅変調成分及びパルス変調信号を制御信号として振幅変調成分を増幅して出力する第1の振幅変調器と、振幅変調成分及びパルス変調信号を受信し、振幅変調成分及びパルス変調信号を制御信号として振幅変調成分を増幅して出力する第2の振幅変調器と、RF変調信号を受信し、RF変調信号を増幅した後、第2の振幅変調器の出力信号によって振幅変調して出力するRFアンプを有する。 | ||||||
| 163 | A method and apparatus for analyzing the network characteristic | JP2005189837 | 2005-06-29 | JP5128057B2 | 2013-01-23 | 原田耕自 |
| 164 | Polar modulation transmission apparatus | JP2008552053 | 2007-10-11 | JP5106421B2 | 2012-12-26 | 真木 中村; 森本 滋 |
| In a polar modulation system, there is disclosed a polar-modulation transmission device, which can be dispensed with an isolator thereby to suppress a circuit scale and the heat loss of a power amplifier. In this device, a current detecting unit (130) detects a current value (Icc) to flow from a power source voltage transforming unit (120) to a power amplifier (180), and a power control unit (140) inputs a power control signal (S30) and outputs a control signal (S31) to a power applying unit (150) on the basis of the current value (Icc). The power applying unit (150) multiplies a baseband amplitude modulation signal (S11) by the control signal (S31) thereby to produce an amplitude modulation signal (S13). A regulator (160) feeds a power source voltage (S22), which is changed from a power source voltage (S21) by the amplitude modulation signal (S13), to a power amplifier (180). This power amplifier (180) amplifies the power of a phase modulation high-frequency signal (S14) by using the power source voltage (S22) as a power source, thereby to acquire an RF transmission signal (S15). | ||||||
| 165 | Digital transmitters for wireless communication | JP2011263525 | 2011-12-01 | JP2012105288A | 2012-05-31 | GURKANWAL S SAHOTA |
| PROBLEM TO BE SOLVED: To provide a digital transmitter with improved performance and reduced power consumption at a low cost.SOLUTION: A Cartesian-to-polar converter 230 performs conversion from received Cartesian to polar coordinates. A FIR filter 234 (or a delta-sigma modulator) generates an envelope signal based on magnitude information of the polar coordinates. A phase modulating PLL 250, VCO generate a phase modulated signal based on phase information of the polar coordinates. A multi-state amplifier 274 (or exclusive-OR gate) generates a digitally modulated signal based on the envelope signal and the phase modulated signal. A power amplifier 280 amplifies the digitally modulated signal and generates an RF output signal. | ||||||
| 166 | Transmitter, and semiconductor integrated circuit available for it | JP2009209291 | 2009-09-10 | JP2011061517A | 2011-03-24 | NORIMATSU TAKAYASU; YAMAWAKI DAIZO; AKAMINE YUKINORI; MAEDA KOJI |
| <P>PROBLEM TO BE SOLVED: To provide a transmitter which synthesizes an amplitude component ρ and a phase component θ and calibrates a delay mismatch between the amplitude component and the phase component of the transmitter with high accuracy at high speed. <P>SOLUTION: The transmitter has a digital-to-analog converter (DAC) 107 and a low-pass filter (LPF) 108 in its amplitude-signal path and further has a phase modulator 109 operable to convert up a phase component into an RF component in its phase-signal path. In an operation of delay calibration, a test input signal 210 is supplied to a delay-calibrating unit 201 in the amplitude-signal path, and the delay-calibrating unit 201 provides test signals 210, 213 to an input of the DAC. Then, the LPF generates a test output signal 212. The delay-calibrating unit 201 detects a delay of the test output signal 212 relative to the test input signal 210, calibrates an amplitude signal delay in a range from the input of the delay-calibrating unit 201 to the output of the LPF, and reduces the difference between the amplitude and phase signal delays of the phase modulator (109) in the phase-signal path. <P>COPYRIGHT: (C)2011,JPO&INPIT | ||||||
| 167 | Pseudo very modulation radio transmitter | JP2006523193 | 2004-07-13 | JP4426577B2 | 2010-03-03 | デント、ポール、ダブリュ． |
| 168 | Transmitting circuit, and communication apparatus using communication apparatus | JP2009152697 | 2009-06-26 | JP2010035158A | 2010-02-12 | MORIMOTO SHIGERU; KITAMURA RYO |
| <P>PROBLEM TO BE SOLVED: To provide a transmitting circuit capable of reducing reception band noise generated in an amplitude amplification section without causing loss in a main signal while reducing noise concurrently with suppression of modulation distortion. <P>SOLUTION: A signal generating section 10 outputs an amplitude signal and a frequency signal by conducting signal processing on input data. A regulator 31 outputs a signal that is proportional to the magnitude of the amplitude signal. The signal output from the regulator 31 passes through a low pass filter 41, and is input into a power amplifier 51. The power amplifier 51 conducts an amplitude modulation on a frequency signal on which an angle modulation is conducted by an angle modulation section 20, by using a signal output from the low pass filter 41. A controlling section 60 controls an attenuation amount of a radio frequency component at the low pass filter 41 based on information such as a modulation method and modulation condition of the input data, the reception band, output power and frequency of the modulated signal and the like. <P>COPYRIGHT: (C)2010,JPO&INPIT | ||||||
| 169 | Method and apparatus for generating a linear modulation signal using polar spatial modulation | JP2000575213 | 1999-10-06 | JP4414100B2 | 2010-02-10 | ヘカン エリクソン，; ベニート リンドフ， |
| 170 | Pll oscillation circuit, polar transmitting circuit and communication device | JP2009121948 | 2009-05-20 | JP2010004524A | 2010-01-07 | MAEDA MASAKATSU; CHIKUSAWA TAKAYUKI; YOSHIKAWA HIROYUKI; HIRANO SHUNSUKE |
| <P>PROBLEM TO BE SOLVED: To provide a PLL oscillation circuit that can reduce the variability of modulation sensitivity of a VCO 101 and obtain a desired output amplitude quickly with high precision. <P>SOLUTION: An amplitude detector 103 detects an output amplitude of the VCO 101. An amplitude controller 105 controls a current value of a variable current source 109 so as to have an output amplitude of the VCO 101 detected by the amplitude detector 103 to be a desired amplitude. An LPF 108 is connected between the amplitude controller 105 and the variable current source 109. A switch 107 connects or disconnects the LPF 108 between the amplitude controller 105 and the variable current source 109. The amplitude controller 105 is connected to the variable current source 109 through either the LPF 108 or the switching switch 107. <P>COPYRIGHT: (C)2010,JPO&INPIT | ||||||
| 171 | Digital modulator, digital modulating method, digital transceiver system, and testing apparatus | JP2009138591 | 2009-06-09 | JP2009303212A | 2009-12-24 | ICHIYAMA KIYOTAKA; ISHIDA MASAHIRO; YAMAGUCHI TAKAHIRO |
| PROBLEM TO BE SOLVED: To provide a digital modulator, digital modulating method, digital transceiver system, and testing apparatus achieving area integration and suppression of power consumption. SOLUTION: A digital modulator includes: a carrier wave output section that outputs a carrier wave; a variable delay section that delays the carrier wave; and a delay amount setting section that sets a delay amount by which the variable delay section delays the carrier wave based on transmission data to be transmitted. The variable delay section may include a multi-stage delay buffer circuit in which delay buffers that delay an input signal by a unit shift amount are connected in a cascade connection, the multi-stage delay buffer circuit may receive the carrier wave at a first-stage delay buffer as input, and the delay amount setting section may include a multiplexer that selects either an output from the carrier wave output section or an output from each stage of the multi-stage delay buffer circuit in accordance with the transmission data. COPYRIGHT: (C)2010,JPO&INPIT | ||||||
| 172 | Communication apparatus | JP2007331964 | 2007-12-25 | JP2009159027A | 2009-07-16 | KOBAYASHI HIROYUKI |
| PROBLEM TO BE SOLVED: To provide a communication apparatus adaptive to a modulation system having a data point even when an amplitude is small, by performing high-order over-sampling to modulate the amplitude. SOLUTION: A communication apparatus has: a local oscillator 4 which performs phase modulation based on a phase component of a baseband signal and outputs a phase modulated signal; a controlling circuit 2 which is supplied with an integer portion included in an amplitude component of the baseband signal and generates and outputs a controlling signal based on a size of the integer portion; a subtractor 3 which is supplied with the integer portion and the controlling signal, subtracts a value of the controlling signal from the integer portion, and outputs results; a MASH circuit 1 which is a second-order delta-sigma modulation means supplied with a fractional portion of the amplitude component, an order of the MASH circuit being switchable between a first order and a second order based on the controlling signal; and an amplifier 5 which sets a voltage value based on an output of the MASH circuit and an output of the subtractor, multiplies the voltage value and the phase modulated signal, and outputs the results. COPYRIGHT: (C)2009,JPO&INPIT | ||||||
| 173 | Digital transmitter for wireless communication | JP2008541509 | 2006-11-20 | JP2009516963A | 2009-04-23 | サホタ、ガーカンウォル・エス． |
| 改善された特性を有するディジタル送信機が説明されている。 ディジタル送信機の１つの設計において、第１の回路ブロックは、同相信号および直交信号を受信し、デカルト座標から極座標への変換を行い、振幅信号および位相信号を生成する。 （デルタ−シグマ変調器またはディジタルフィルタを含み得る）第２の回路ブロックは、振幅信号に基づいてエンベロープ信号を生成する。 第３の回路ブロックは、位相信号に基づいて、位相変調された信号を生成する。 第３の回路ブロックは、位相変調位相同期ループ（ＰＬＬ）、電圧制御発振器（ＶＣＯ）、飽和バッファ、などを含んでいてもよい。 （１つ以上の排他的論理和ゲート、または複数の利得状態を有する増幅器を含み得る）第４の回路ブロックは、エンベロープ信号および位相変調された信号に基づいて、ディジタル変調された信号を生成する。 （Ｄ級増幅器および／または電力増幅器を含み得る）第５の回路ブロックは、ディジタル変調された信号を増幅して、ＲＦ出力信号を生成する。 | ||||||
| 174 | Polar modulation apparatus and method having a common-mode control | JP2008540735 | 2006-11-01 | JP2009516456A | 2009-04-16 | エフ スティブルート エドワード; エー ティー サンデュリアーヌ ミハイル; ピー アディハム ラム |
| 本発明は、ポーラ変調した信号が入力信号の別個に処理される位相変調（ＰＭ）及び振幅変調（ＡＭ）の成分に基づいて発生する、ポーラ変調装置及び方法に関する。 増幅したポーラ変調出力信号は、差動電力増幅器回路（３０）を用い、且つ増幅した位相変調成分を差動電力増幅器回路（３０）の差動入力端に供給することによって、位相変調及び振幅変調の成分に従って発生する。 差動電力増幅器回路の（３０）バイアス入力端は、振幅変調成分に基づいて制御され、差動電力増幅器回路（３０）のコモンモード電流を変調するようにする。 これにより、静止形ＤＣ−ＤＣコンバータと、電力及び／又は効率、及び／又は、線形性を制御した出力電力増幅器とを有するポーラ変調器の新しいコンセプトを達成することができる。 | ||||||
| 175 | System and method for current-mode amplitude-modulated | JP2007521523 | 2005-07-11 | JP2008506337A | 2008-02-28 | アリストテレ ハジクリストス，; デイビッド アール． ペールケ， |
| 増幅器回路は飽和モードの動作にバイアスされた電力増幅器、および電力増幅器に供給電流を提供する制御可能な電流源を含む。 制御可能な電流源は、振幅情報信号に応じて、電流源が供給する供給電流を変調することにより、電力増幅器からの出力信号の所望の振幅変調を行う。 1つ以上の実施形態では電流源は、電力増幅器の実効直流抵抗における変化の検出に応じて、1つ以上の送信機動作パラメータを調整するように構成される、回路を含む。 例えば回路は、実効直流抵抗が望ましくなく増加したことの検出に応じて、実効直流抵抗を削減する、補償信号を生成することができる。 制限することのない実施例として、そのような補償は、電流ミラー、増幅器対アンテナインピーダンス整合、増幅器バイアスまたはデバイスサイズを変更することにより、またはある形式の送信信号抑制(back off)を課すことにより、行うことができる。 | ||||||
| 176 | Transmitter | JP2006094232 | 2006-03-30 | JP2007274075A | 2007-10-18 | LOZHKIN ALEXANDER N; TAKANO TAKESHI |
| <P>PROBLEM TO BE SOLVED: To provide a technology for enhancing power efficiency of an amplifier in a communication system employing a modulation system having a high PAPR. <P>SOLUTION: The transmitter comprises a first limiter performing first clipping for clipping a part of higher amplitude than an amplitude level based on a first clipping level from an input signal to be power amplified, a second limiter performing second clipping for clipping a part of lower amplitude than an amplitude level based on a second clipping level from a first signal subjected to first clipping, a section for separating a second signal subjected to second clipping into an amplitude modulation part and a constant amplitude, a first amplifier for amplifying the amplitude modulation part, a second amplifier for amplifying the constant amplitude, and a synthesizer outputting a third signal compounding the amplitude part amplified by the first amplifier and the constant amplitude part amplified by the second amplifier. <P>COPYRIGHT: (C)2008,JPO&INPIT | ||||||
| 177 | Polar-coordinate modulator | JP2006053912 | 2006-02-28 | JP2007235461A | 2007-09-13 | NAKAMURA MAKI; ISHIDA KAORU |
| <P>PROBLEM TO BE SOLVED: To provide a polar-coordinate modulator capable of improving a power efficiency and widening the control range of the output power of a transmission signal by optimally limiting a power to a radio communication device with a power control means. <P>SOLUTION: The polar-coordinate modulator 1 has an amplitude limiting means 6 for limiting the amplitude component of an amplitude signal, a D/A converter 7 converting an input digital signal into an analog signal, and the power control means 8 for limiting the power so that the input signal reaches an output signal based on a power control signal. The polar-coordinate modulator is further composed of a voltage control circuit 9 supplying an amplitude modulator 11 with a voltage on the basis of the output signal from the power control means 8, an angle modulator 10 modulating an angle on the basis of a phase signal, and the amplitude modulator 11 modulating the amplitude of an angle-modulated signal on the basis of a supply voltage from the voltage control circuit 9. <P>COPYRIGHT: (C)2007,JPO&INPIT | ||||||
| 178 | Timing adjusting device and timing adjusting method | JP2006005110 | 2006-01-12 | JP2007189438A | 2007-07-26 | HASE KAZUO; ISHIKAWA HIROYOSHI; SATSUBA NOBUKAZU; HAMADA HAJIME; KUBO NORIO |
| <P>PROBLEM TO BE SOLVED: To time an input signal to an amplifier and a voltage control signal to each other in a transmitter which switches a source voltage of an amplifier for a linear transmitter according to the input signal level and outputs a less-distorted output signal with high amplification efficiency. <P>SOLUTION: A timing adjusting device has a power amplifying means of amplifying a transmission signal from a main signal path according to the voltage control signal from a control signal path, a timing error detecting means of finding a phase difference between the main signal path and control signal path based upon a signal before the amplification which represents the amplitude or power of the transmission signal before the amplification and a feedback signal representing the amplitude or power of the signal after the amplification, and a means of adjusting a delay quantity of both or one of the main signal path and control signal path so that the phase difference is canceled. The timing error detecting means has a means of detecting a polarity change point of the gradient of the waveform of the signal before the amplification or feedback signal and a phase difference measuring means of measuring the phase difference by using the detected polarity change point. <P>COPYRIGHT: (C)2007,JPO&INPIT | ||||||
| 179 | Digital time alignment in the polar modulator | JP2006514312 | 2004-05-07 | JP2006526948A | 2006-11-24 | ウェイン・エス・リー; ゲイリー・エル・ドゥー; トーマス・イー・ビエッカ |
| サブサンプル分解能を有するデジタル処理による制御の方法、及びデジタル処理による制御のための装置、ポーラ変調器における振幅経路(101a)と位相経路(101b)との相対的なタイミングが開示される。 タイミングの分解能は、サンプルレートとは対照的に、システムのダイナミックレンジによって制限される。 本発明の方法及び装置は、サブサンプル時間遅延を近似するためにデジタルフィルタ(111)を使用する。 デジタル信号処理を用いたサブサンプル時間遅延を近似するための様々な技術が、そのために使用されることができる。 フィルタは、理想的に、全帯域通過の振幅応答及び線形位相応答を備えているであろう。 実際上、その振幅特性は低域通過型であると共に、その位相は完全に線形ではないかもしれない。 理想的応答からの偏差は、いくらかの歪みを付加するであろう。 しかしながら、この歪みは、処理される特定の信号に応じて、受容できる程度に小さいかもしれない。 | ||||||
| 180 | Polar modulation transmitter and wireless communication device | JP2005058948 | 2005-03-03 | JP2006246028A | 2006-09-14 | ARAYASHIKI MAMORU |
| PROBLEM TO BE SOLVED: To provide a polar modulation transmitter capable of suppressing power dissipation in a power supply feed line to a high frequency power amplifier, irrespective of high or low transmission power. SOLUTION: The polar modulation transmitter comprises an operation control unit 120 for controlling to apply a power supply voltage S21 converted by an operation of a DC/DC converter 111, or to directly apply a power supply voltage S20 from a power supply 130 by stoppage of the operation of the DC/DC converter 111, to a magnitude signal amplifier 106, based on a transmission power control signal S14. Consequently, power dissipation at the magnitude signal amplifier 106 can be suppressed by the DC/DC converter 111 during low transmission power, while unnecessary operation of the DC/DC converter 111 can be stopped during high transmission power. Consequently, power dissipation can be suppressed, irrespective of high or low transmission power. COPYRIGHT: (C)2006,JPO&NCIPI | ||||||
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