A high precision digital to analog converter comprises the combination of an imperfect or low resolution digital to analog converter having an error function known in terms of orthonormal components and an error compensating device capable of generating correction terms which do not interact with one another. The correction terms are based on orthonormal components namely, the Walsh function components, of each signal level to be compensated. At most only one weighting value per bit is required, the combination of which will compensate for errors of any bit combination. In a specific embodiment employing feedforward compensation, the output of the low resolution converter and of the compensating device may be summed to produce a high performance, high precision converter with increased accuracy and resolution. In other specific embodiments, the compensating device responds to selected digital bit inputs to produce an analog output which is summed at an intermediate summing junction with the analog signal of the converter.

digital to analog converter having an improved conversion linearity is disclosed.

The digital to analog converter comprises means for receiving an input digital signal (1), means for dividing the first digital signal to a plurality of digital signals (2, 3), a plurality of conversion means (8, 9) for converting the divided digital signals to analog signals, respectively, and means (10) for summing the analog signals to produce a summed analog signal corresponding to the input digital signal.

0 Sensors (10, 12, 14, 16) provide analog signals having different zero offsets and spans. The signals are applied by way of a multiplexer (18) to a single analog-to-digital converter (22). In order that all digital outputs shall have the same span, digital offset and span values for all of the sensors are stored in a non-volatile memory (40). A microprocessor control unit (30) controls the multiplexer (18) and simultaneously applies corresponding offset and span signals to two digital-to-analog converts (34, 36) which apply corresponding offset and reference voltages to the analog-to-digital converter (22).

digital to analog converter having an improved conversion linearity is disclosed.

The digital to analog converter comprises means for receiving an input digital signal (1), means for dividing the first digital signal to a plurality of digital signals (2, 3), a plurality of conversion means (8, 9) for converting the divided digital signals to analog signals, respectively, and means (10) for summing the analog signals to produce a summed analog signal corresponding to the input digital signal.

A method for calibrating time interleaved samplers comprises applying (102) a calibration signal to a time-interleaved sampling device, wherein the signal is coherent with at least one sample clock on the device and is periodic and has a predetermined spectral content and frequency, sampling (104), by said time-interleaved sampling device, the calibration signal at a plurality of phases to form samples, averaging (106) the formed samples, and calculating (108) the phase error of each sample based on the average calibration signal sample.

Two capacitors in a variable stage are controlled from outside to function as a feedback capacitor and a sampling capacitor, respectively. With a test signal being supplied to the variable stage from an input selecting section, a stage evaluation section estimates an error in the output of the variable stage based on a difference between the digital outputs of an output correction section produced in two situations in which the functions of the two capacitors in the variable stage are switched. A correction value calculation section calculates a digital correction value for each variable stage based on the estimated error and an intermediate output of a digital calculation section. The output correction section corrects the digital output of the digital calculation section based on these digital correction values.

@ A method and system for enhancing the accuracy of an analog-to-digital converter. Calibration codes for each of a plurality of possible output codes of an analog-to-digital converter are stored in a memory at locations corresponding to their respective converter output codes. The converter output code is used to select a corresponding calibration code, which may represent the system output code by itself, or may be concatonated with the converter output code to produce the system output code. An ancillary circuit may be provided to recalibrate the converter as needed.

@ A method and system for enhancing the accuracy of an analog-to-digital converter. Calibration codes for each of a plurality of possible output codes of an analog-to-digital converter are stored in a memory at locations corresponding to their respective converter output codes. The converter output code is used to select a corresponding calibration code, which may represent the system output code by itself, or may be concatonated with the converter output code to produce the system output code. An ancillary circuit may be provided to recalibrate the converter as needed.

Um ein hochauflösendes Digitalisieren schnell und trotzdem kostengünstig durchführen zu können, wird erfindungsgemäß der Meßbereich in kleinere Meßabschnitte eingeteilt und ein A/D-Wandier (1) mit einer Bitzahl verwendet, dessen Meßgebiet etwa einem Meßabschnitt entspricht. Ober einen Meßabschnittswähler (2) kann das Meßgebiet des A/D-Wandler (1) verschoben werden. Um Diskontinuitäten an den Schnittstellen zwischen den Meßabschnitten zu vermeiden, wird aus den letzten Informationen des A/D-Wandlers (1) vor dem Verschieben des Meßabschnittes ein neuer digitaler Signalwert extrapoliert, der als Referenz für die folgenden Signalwerte dient.

The present invention is characterized that a digital-to-analog converter (1) having ordinal accuracy and one or more current sources (11, 12, 13) are combined and the output currents (I₁, I₂,I₃) of the current sources are accurately controlled to have a predetermined relationship with regard to the reference current (I_o) which is a full-scale value of the analog output current of DAC (1) so that the output current of the current sources designated by bits added to the superior bit of the digital input signal depending on the number of the current sources and the analog output current in response to the digital input signal with the added bits are added to produce an analog signal corresponding to the digital input signal.