| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 181 | Integrated quantized signal smoothing processor | US842140 | 1977-10-14 | US4144577A | 1979-03-13 | Gordon S. Ley |
| An integrated quantized signal smoothing processor samples an analog signal, converts it to a digital number and averages n samples, the averages of n equal or nearly equal signals will be quantized with the quantization interval of an A/D converter. An improvement signal is added at the input of the A/D converter with the output quantization interval becoming q/n. For a given accuracy, the improvement permits a lower number of bits in the A/D converter. | ||||||
| 182 | Automated calibration and standardization apparatus | US484027 | 1974-06-28 | US3975727A | 1976-08-17 | Arthur H. Mader; Donatas V. Gasiunas; Edward W. Stark |
| New and improved apparatus is provided for the calibration and standardization of the analog output signal level of automated analysis equipment, which level varies as a function of the concentration of the constituent being analyzed. Such apparatus comprises an A/D converter including a dual-slope integrator for translating the output signal level to a time interval which varies as a function of the constituent. Such apparatus further includes means for generating the inverse function of the analytical function, which is applied to linearize and scale the output signal level and to convert such level directly to digital form. Also, provision is made for the calibration and standardization, on an individual basis, of each of a plurality of analytical channels in a multi-channel system. | ||||||
| 183 | US49850074 | 1974-08-19 | USB498500I5 | 1976-01-20 | ||
| 184 | Self calibrating digital to a.c. converter for multiple conversion | US40324673 | 1973-10-03 | US3827047A | 1974-07-30 | KASAKOWSKI H; WASHBURN D |
| Apparatus for performing multiple digital to a.c. conversions by using a self calibrating feedback loop. The conversions are performed accurately and without the need for a multiplicity of precision components.
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| 185 | 一种直流参数测试装置 | CN201520759660.8 | 2015-09-28 | CN205081770U | 2016-03-09 | 王大鹏 |
| 本实用新型实施例提供一种直流参数测试装置，所述装置设置有为数据转换器提供直流参数测试激励数据的直流参数测试单元；当需要对片上系统集成数模转换器执行直流参数测试时，通过在片上系统芯片中增加的直流参数测试单元来向数据转换器提供直流参数测试激励数据。 | ||||||
| 186 | WIDEBAND NYQUIST VCO-BASED ANALOG-TO-DIGITAL CONVERTER | PCT/US2015048110 | 2015-09-02 | WO2016081046A3 | 2016-07-21 | CHEN SHUO-WEI |
| An analog-to-digital converter may convert an analog signal into digital codes representative of the changing level of the analog signal. An analog high pass filter may receive and continuously differentiate the analog signal. A voltage controlled oscillator may receive the differentiated analog signal and continuously generates an output that is an integral of the differentiated analog signal in the phase domain. A time-to-digital converter may sample the output of the voltage controlled oscillator and convert each sample into a digital code representative of the current phase of the sampled output of the voltage controlled oscillator. | ||||||
| 187 | SYSTEMS AND METHODS OF ELEMENT SCRAMBLING FOR COMPENSATION AND CALIBRATION OF ANALOG-TO-DIGITAL CONVERTER FEEDBACK | PCT/US2015036211 | 2015-06-17 | WO2016003648A4 | 2016-05-06 | MELANSON JOHN L; MEHTA JAIMIN; HODAPP STEPHEN T |
| An apparatus may include a scrambler element configured to receive an input signal and generate a scrambled thermometer code-like signal having a plurality of bits based on the input signal and having a plurality of possible quantization values. The scrambler element may generate at least one equivalent code of the scrambled thermometer code-like signal for each possible quantization value. For each of one or more of the possible quantization values, the scrambler element may be configured to generate a plurality of possible equivalent codes of the scrambled thermometer code-like signal. Responsive to the input signal indicating a change in quantization value of the scrambled thermometer code-like signal, the scrambler element may change the scrambled thermometer code-like signal by transitioning the smallest possible number of the plurality of bits of the scrambled thermometer code-like signal to change quantization value of the scrambled thermometer code-like signal in accordance with the input signal. | ||||||
| 188 | SYSTEMS AND METHODS OF ELEMENT SCRAMBLING FOR COMPENSATION AND CALIBRATION OF ANALOG-TO-DIGITAL CONVERTER FEEDBACK | PCT/US2015036211 | 2015-06-17 | WO2016003648A3 | 2016-03-10 | MELANSON JOHN L; MEHTA JAIMIN; HODAPP STEPHEN T |
| An apparatus may include a scrambler element configured to receive an input signal and generate a scrambled thermometer code-like signal having a plurality of bits based on the input signal and having a plurality of possible quantization values. The scrambler element may generate at least one equivalent code of the scrambled thermometer code-like signal for each possible quantization value. For each of one or more of the possible quantization values, the scrambler element may be configured to generate a plurality of possible equivalent codes of the scrambled thermometer code-like signal. Responsive to the input signal indicating a change in quantization value of the scrambled thermometer code-like signal, the scrambler element may change the scrambled thermometer code-like signal by transitioning the smallest possible number of the plurality of bits of the scrambled thermometer code-like signal to change quantization value of the scrambled thermometer code-like signal in accordance with the input signal. | ||||||
| 189 | CALIBRATING TIMING, GAIN AND BANDWITH MISMATCH IN INTERLEAVED ADCS USING INJECTION OF RANDOM PULSES | PCT/US2013039262 | 2013-05-02 | WO2013173073A2 | 2013-11-21 | ALI AHMED MOHAMED ABDELATTY |
| A method and a corresponding device for calibrating an interleaved analog-to-digital converter (ADC) involve injecting a pulsed, substantially-random signal into a plurality of channels in the ADC. After the substantially-random signal is injected, a gain correlation value is determined for each channel, which value indicates a degree of correlation between the injected substantially-random signal and an output of the respective channel. The gain correlation values are then compared to determine a degree of mismatch between the channels. At least one of the channels is calibrated as a function of the determined degree of mismatch. | ||||||
| 190 | Ａ／Ｄ変換装置 | JP2017549911 | 2015-11-11 | JPWO2017081759A1 | 2018-03-15 | 小林 悠介; 生川 貴康; 恒岡 雅也; 船越 政行; 山口 敦弘; 岡上 卓弘 |
| 対象物(4,5)のアナログ電気量を1つずつ独立にA/D変換器(1)へ出力する第1のモードと、対象物(4,5)のアナログ電気量を全て出力しない第2のモードと、対象物(4,5)のアナログ電気量を全て出力せず、かつA/D変換器(1)への出力をプルダウン抵抗(10)によりプルダウンさせる第3のモードと、対象物(4,5)のアナログ電気量を複数同時にA/D変換器(1)へ出力する第4のモードと、を発生させ、前記第1のモードの時に対象物(4,5)のA/D変換値を個別に取得し、前記第2モードから第4モードの時に、A/D変換器(1)自体、またはA/D変換器(1)に接続される装置の異常を検出する。 | ||||||
| 191 | 車載制御装置、車載集積回路 | JP2017531106 | 2016-07-06 | JPWO2017018140A1 | 2017-11-16 | 洋一郎 小林; 理仁 曽根原 |
| 出荷後も継続的に安定した出力値を出力することができる半導体集積回路およびそれを用いた車載制御装置を提供する。本発明は、基準信号を出力する基準信号発生部を備え、前記基準信号発生部が異なる2時点において出力した前記基準信号それぞれに対応する半導体回路の出力値間の差分に基づき、前記半導体回路の動作状態を検出する。 | ||||||
| 192 | Zero point correction circuit of the load meter | JP2005065306 | 2005-03-09 | JP4299257B2 | 2009-07-22 | 弘行 森谷 |
| 193 | Circuit for correcting zero-point of load meter | JP2005065306 | 2005-03-09 | JP2006247679A | 2006-09-21 | MORIYA HIROYUKI |
| PROBLEM TO BE SOLVED: To provide a circuit for correcting the zero-point of a load meter to be used for a press machine, etc., which circuit is configured such that the corrected zero point is determined by performing the measurements for the zero point correction a plurality of times after a definite period of time after finishing the press work, and by calculating the mean value of the measured values. SOLUTION: After the press machine is driven, time is counted for a specified duration by means of, for example, an internal timer, etc., and after a definite lapse of time, a sampling process is carried out, and the mean value of the sampled values is calculated. Because the mean value is used as the zero point correction value, the accurate zero point correction value can be obtained. COPYRIGHT: (C)2006,JPO&NCIPI | ||||||
| 194 | A / d converter | JP21001385 | 1985-09-25 | JPH0761017B2 | 1995-06-28 | 誠一 上田; 裕一 中谷; 栄亀 今泉; 敏郎 塚田; 達治 松浦 |
| 195 | JPH041529B2 - | JP20747182 | 1982-11-25 | JPH041529B2 | 1992-01-13 | UIRIAMU JEI RIRISU |
| 196 | JPH0366852B2 - | JP19467482 | 1982-11-08 | JPH0366852B2 | 1991-10-18 | KATO KAZUO; SATO HIDEO |
| 197 | JPH0251301B2 - | JP16754881 | 1981-10-20 | JPH0251301B2 | 1990-11-07 | YAMADA HISASHI; SHIMIZU SHOICHI |
| 198 | Hihoseichidoshutsuhohooyobitajukasaretadeeta * akuijishonsochi | JP1031181 | 1981-01-28 | JPH0227716B2 | 1990-06-19 | GYORUGII ISUTABAN BANKUSA |
| 199 | A/d conversion device provided with a/d converter | JP25102788 | 1988-10-06 | JPH01126826A | 1989-05-18 | YURUGEN BUERUMUUTO |
| PURPOSE: To prevent the dynamic range of an A/D converter from being limited by reversely extending the analog compression of a compressor connected to the prestage of an A/D converter immediately after A/D conversion. CONSTITUTION: The A/D conversion device is constituted of connecting an amplifier V for an analog signal, an analog compressor 1, an A/D converter 2, and a digital extender 3 in series. An analog signal to be supplied to the amplifier V has a dynamic characteristic exceeding the allowable dynamic range of the A/D converter 2 and the compressor 1 reduces the dynamic range of the A/D converter 2 to an allowable level. The extender 3 is directly connected to the A/D converter 2 on a signal line and allowed to release the analog compression of the compressor 1. Consequently a digital signal having the whole dynamic range of an analog signal supplied from the amplifier V is obtained from the output side of the extender 3. COPYRIGHT: (C)1989,JPO | ||||||
| 200 | JPS646569B2 - | JP12931983 | 1983-07-18 | JPS646569B2 | 1989-02-03 | ISO YOSHIMI; NODA TSUTOMU; SATO TETSUO |
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