| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 61 | SIGNAL COMMUNICATION ACROSS AN ISOLATION BARRIER | US11674395 | 2007-02-13 | US20080191685A1 | 2008-08-14 | Timothy A. Dhuyvetter; Sajol Ghoshal |
| A method for transmitting an information signal across an isolation barrier comprises receiving an input signal, preconditioning the input signal according to a modulation function, passing the preconditioned signal through the isolation barrier, and recovering the passed signal according to a demodulation function corresponding to the modulation function, the recovered signal being operative as a feedback signal. | ||||||
| 62 | Superconducting single flux quantum modulator circuit | US11808337 | 2007-06-08 | US20080129368A1 | 2008-06-05 | Futoshi Furuta; Kazuo Saitoh |
| Objects of the present invention are to provide an integration circuit which produces no integration leak so that the bit accuracy is improved in a sigma-delta modulation circuit or a delta modulator circuit, which is based on a single flux quantum circuit that uses a flux quantum as an information carrier, and to provide a method for reducing thermal noise and quantization noise. According to the present invention, an integration circuit is formed by Josephson junctions and an inductor to reduce the integration leak, and a plurality of modulator circuits are connected to one another so as to add up each output. As a result, it is possible to reduce the influence of thermal noise exerted upon the bit accuracy, the thermal noise having no correlativity to one another. Moreover, by changing the density or phase of a SFQ pulse to be supplied to the Josephson junctions of the integration circuit, the correlativity of quantization noise between the outputs of the modulator circuits is eliminated so that the bit accuracy is improved. | ||||||
| 63 | System for continuous-time modulation | US09478040 | 2000-01-05 | US20010048381A1 | 2001-12-06 | Tom P. E. Broekaert |
| A continuous-time modulator comprises a modulator bridge having a bridge input terminal, an inverted bridge input terminal, a clock terminal and an inverted clock terminal. The modulator further comprises an input amplifier for amplifying an input signal and the input signal inverted and a bridge amplifier coupled to the input amplifier. The bridge is coupled to the bridge amplifier. The modulator further comprises a feedback amplifier coupled to the bridge, with the bridge amplifier coupled to the feedback amplifier. A clock amplifier for amplifying a clock signal and the clock signal inverted is also coupled to the bridge. An output signal is provided at an output terminal coupled to the bridge input terminal. An inverted output signal is provided at an output terminal coupled to the inverted bridge input terminal. | ||||||
| 64 | Data converters for sound equipment | US685151 | 1996-07-23 | US5815530A | 1998-09-29 | Jun Hirai |
| A delta modulation type data converter is adapted to carry out signal processing by sequentially comparing in cycles an inputted signal with a reference voltage set according to the results of previous comparisons and includes a plurality of current sources, switch circuits for setting a current value by appropriately selecting one or more of these current sources, an integrator circuit for generating the reference voltage according to a specified current value, and a control circuit for controlling the switch circuits to make an appropriate selection of these current sources according to the result of a comparison between the reference voltage and the inputted analog signal. The control circuit controls the switch circuits such that, if the result of comparison is the same as in the precious cycle, a selection from the current sources is made such that the current value will be increased, provided such selection is possible. If the result of comparison is inverted from the previous cycle, a selection is made such that the current direction with respect to the integrator circuit is reversed. If the result of comparison is inverted repeatedly for a specified plural number of cycles, a selection is made such that the current direction with respect to integrator circuit is reversed and the associated current value is reduced, provided such selection is possible. The plurality of current sources may include a first group connected to a source voltage and a second group connected to a reference voltage source, the current sources in each group having associated therewith current values which differ by a factor of 2 from one to another. | ||||||
| 65 | Balance companded delta conversion for homodyne receiver | US401124 | 1995-03-09 | US5614904A | 1997-03-25 | Paul W. Dent |
| A balanced delta-modulation analog-to-digital conversion circuit is disclosed. A first principal integrator produces a first output signal which rises when a first control signal is generated and falls when a second control signal is generated. A second principal integrator produces a second output signal which fails when the first control signal is generated and rises when the second control signal is generated. The first and second control signals are then generated based upon the differences between the first and second output signals. | ||||||
| 66 | Notch filter noise rejection system in a cardiac control device | US782586 | 1991-10-25 | US5188117A | 1993-02-23 | Bruce M. Steinhaus; Richard M. T. Lu |
| A physiological event signal sensing system in a cardiac control or monitoring device for detecting spontaneous cardiac electrical events which may be obscured by continuous or burst EMI line frequency noise. The noise rejecting sensing system of this invention senses and samples cardiac signals which may include a noise component which is produced by power line interference in addition to a physiological signal component. The sampling frequency is selected to be an integer multiple of at least one common power line frequency. The system notch filters the cardiac signal to remove line frequency components, using either or both lowpass and highpass notch filtering coefficients, then limits the filtered output to the amplitude of the corresponding filter input to remove filter output signals caused by the sudden termination of line frequency noise which is characteristic of burst noise. | ||||||
| 67 | System for analog-digital-analog conversion | US83277 | 1987-08-10 | US4843391A | 1989-06-27 | George O. Lernout |
| The invention is applicable to delta modulation. A method of codifying the bit-stream for more efficient storage and transmission is disclosed. The number of pulses from the a-to-d converter is counted, per batch of B clock beats. The count, or tally value T of the batch, may be issued as an N-bit group, e.g. a 4-bit nibble. The order and spacing of the pulses within the batch is ignored. When the signal is rebuilt, a batch of B clock beats are counted out, T of which are pulses. One value which the nibble can take is reserved and used to indicate a period of silence, by replacing a whole frame of silent nibbles. Both a fixed frame length and a variable frame length are disclosed. For greater sensitivity, the extreme tally values may be utilized to signal a change in the gain or response of the system. A median tally value may be used to cancel the gain change. | ||||||
| 68 | Self-balancing current sources for a delta modulator | US393800 | 1982-06-30 | US4527133A | 1985-07-02 | David K. Money |
| A delta modulator for controlling time-domain processing of sensed signals, and particularly internal physiological signals. The delta modulator includes two constant current sources both of which are on continuously, but only one of which is connected to the input capacitor at any given time. The two constant current sources are self balancing. Periodically, the two current sources are connected simultaneously to a control capacitor, the potential across which is thus a function of the relative current source amplitudes. The potential across the control capacitor is used in a feedback circuit to control the amplitude of at least one of the current sources so that the two sources are made to have equal amplitudes. Preferably, the control capacitor is an on-chip capacitor whose effective capacitance is increased by the Miller effect. | ||||||
| 69 | Enhanced delta modulation encoder | US446012 | 1982-12-01 | US4509037A | 1985-04-02 | Robert W. Harris |
| An improved analog-to-digital encoder comprising an enhanced delta modulation encoder. The enhanced delta modulation encoder includes a spectrum tilter, a 1 bit analog-to-digital converter, a sampling circuit and an internal decoder. An analog input signal and an internal analog signal from the internal decoder are summed to provide an analog dither which is essentially an internal error signal. The analog dither signal is tilted by the spectrum tilter and is provided to the 1 bit analog-to-digital converter which generates a digital signal. The sampling circuit receives the digital signal from the analog-to-digital converter and generates a digital output which is fed back to the internal decoder. The spectrum tilter comprises at least three integrator circuits and a clipping circuit connected in parallel to two of the three integrator circuits. The three integrator circuits tilt the frequency spectrum of noise above the maximum frequency of interest, and the clipping circuit prevents the encoder from becoming unstable. A digital filter may be connected to the output of the sampling circuit in order to filter the digital output to make it compatible with systems commonly employed to process the digital output. | ||||||
| 70 | Delta modulator having increased dynamic range | US46487074 | 1974-04-29 | US3918042A | 1975-11-04 | WERNER RICHARD E |
| Delta modulator wherein a digital output signal is produced from an analog modulating signal, with the digital signal being filtered and compared with the modulating signal to produce an error signal for controlling the modulator, and wherein the filtered digital signal is fed back to the comparator through a nonlinear circuit which decreases the amplitude of small amplitude signals being fed back. The nonlinear circuit may have a first linear response portion for translating signals below the normal threshold of the modulator, and a second linear response portion for signals above the normal threshold, with the gain of the second portion being substantially greater than that of the first portion. Since the signal fed back is smaller than it would otherwise be for weak signal conditions, less input signal is required to establish adequate error voltage to operate the delta modulator, thus extending the dynamic range to signal levels too weak to operate a known delta modulator. The nonlinear circuit may include first and second parallel paths, with a transistor stage in one path having means rendered operative at a given signal level to limit the output, so that at low signal levels the signal is translated without substantial attenuation and at high signal levels the signal is attenuated. The signal in the path including the transistor stage acts to cancel a portion of the signal in the other path to control the signal fed back from the filter to the comparator, to increase the signal fed back at high level digital outputs.
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| 71 | Loop filter for delta modulator | US38078473 | 1973-07-19 | US3896399A | 1975-07-22 | MCDONALD JAMES A |
| An improved loop filter-integrator for a delta modulator having a bandpass characteristic for increasing the dynamic range of the modulator to modulating signals having frequencies within the pass-band of the filter. Means are provided for emphasizing frequencies within the bandwidth of the modulating signals relative to frequencies above and below the modulating signal band, and to maintain the phase shift of the filter within the limits necessary to provide modulator stability.
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| 72 | Digital communications system with time-frequency multiplexing | US35986473 | 1973-05-14 | US3872255A | 1975-03-18 | NANCE W FRANKLIN; SHACKLETT ROBERT L |
| A communication system employing a time-frequency matrix for separately addressing discretely, words derived from sequentially sampled inputs and signal inputs indicating direction of change of input per sampling period to maximize transmission per bandwidth. The system precludes phase problems and loss of information.
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| 73 | Delta modulation communication system | US39439373 | 1973-09-04 | US3839675A | 1974-10-01 | WERNIKOFF R; ROSEN G |
| The disclosed delta modulation communication system digitally describes small differences between successive samples of an analog signal; when a large difference occurs, the actual value of the sample, not its difference from the preceding sample, is digitally described. The system also automatically reframes incorrectly grouped code word symbols at the receiver.
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| 74 | Pcm coder | US3638219D | 1969-05-23 | US3638219A | 1972-01-25 | HARMS DAVID A |
| A delta modulator converts an analog signal into a PCM code and also provides a corresponding delta modulated signal. The modulator includes a bidirectional counter in its feedback path which counter stores a code corresponding to the sequence of sampled delta modulated signals. The stored code is converted into an analog feedback signal and a PCM code is derived from the counter outputs.
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| 75 | System for delta encoding at selected intervals | US3524926D | 1966-08-10 | US3524926A | 1970-08-18 | STARR ARTHUR T; GREAVES PETER JAMES; STILLWELL PETER F T C |
| 76 | High speed digital phase modulation encoder | US32608463 | 1963-11-26 | US3384823A | 1968-05-21 | SOUTHWORTH GLEN R |
| 77 | Delta modulation system | US15246661 | 1961-11-15 | US3173092A | 1965-03-09 | MESCHI JOSEPH E |
| 78 | Delta modulation system | US85421259 | 1959-11-19 | US2990520A | 1961-06-27 | COURCHENE JR ERNEST E; JOHANN HOLZER |
| 79 | Transmission of a derivative signal by pulse code | US37242453 | 1953-08-05 | US2862186A | 1958-11-25 | ROGER AIGRAIN PIERRE RAOUL |
| 80 | 光学テープウォブル信号のための高速ADC | JP2016521762 | 2014-10-02 | JP6419799B2 | 2018-11-07 | マフナド,ファラマルズ |
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