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序号 专利名 申请号 申请日 公开(公告)号 公开(公告)日 发明人
281 Lower latency coding/decoding US10447400 2003-05-29 US06724327B1 2004-04-20 Stephen P. Pope; John T. Coffey; Srikanth Gummadi
An electronic device may receive a packet comprising a plurality of codewords comprising pre-processing logic, a first decoder, and a second decoder. The pre-processing logic causes some of said codewords to be provided to the first decoder and other of said codewords to be provided to the second decoder. The codewords may be of different lengths and/or different code rates. Further, the first and second decoders may implement the same or different decoding technique.
282 Communication system and method for multi-rate, channel-optimized trellis-coded quantization US09478058 2000-01-05 US06717990B1 2004-04-06 Glen Patrick Abousleman
A communication system (20) employs fixed rate channel-optimized, trellis-coded quantization (COTCQ) at a plurality of diverse encoding bit rates. COTCQ is performed through a COTCQ encoder (40) and COTCQ decoder (54). The COTCQ encoder and decoder (40,54) each include a codebook table (62) having at least one codebook (64) for each encoding bit rate. Each codebook (64) is configured in response to the bit error probability of the channel (26) through which the communication system (20) communicates. The bit error probability influences codebooks through the calculation of channel transition probabilities for all combinations of codewords (90) receivable from the channel (26) given all combinations of codewords (90) transmittable through the channel (26). Channel transition probabilities are responsive to base channel transition probabilities and the hamming distances between indices for codewords within subsets of the transmittable and receivable codewords.
283 Device and method for detecting synchronization patterns in CD-ROM media US09709689 2000-11-10 US06708307B1 2004-03-16 Firooz Massoudi
Disclosed is a peripheral device for reliably detecting synchronization patterns in CD-ROM media. The peripheral device has an internal circuitry for controlling and processing data that is read from a medium of the peripheral device is disclosed. The peripheral device comprises a digital signal processor, a decoder circuit, and a state machine. The digital signal processor is configured to receive the data that is being read from the medium of the peripheral device. The decoder circuit is coupled to the digital signal processor and forms a part of the internal circuitry. Further, the decoder circuit includes an internal RAM that is configured to store a sector of the data including a current sync pattern and a next sync pattern. The state machine resides in the decoder for analyzing the current sync pattern and the next sync pattern of the sector of the data. In the analysis mode, the state code is configured to determine whether a fatal error is present in the data.
284 Method and apparatus for writing and reading optical recording medium US10261982 2002-09-30 US06700849B2 2004-03-02 Kenji Narumi; Kenichi Nishiuchi
An apparatus for writing on and reading an overwritable optical disk comprises an identifier detector that identifies a recording condition in the sector to be overwritten, and a delay time controller circuit that sets a variation range of the start point for writing according to the recording condition. The record timing of the modulated data signal is changed at random within the set variation range when overwriting the sector of the optical disk.
285 Transmission apparatus, reception apparatus, transmission method and reception method, each for efficiently transmitting error information US09469789 1999-12-22 US06684360B1 2004-01-27 Asanobu Ito; Minoru Nishioka; Tatsushi Bannai
Disclosed is a digital data transmission system comprising a transmission apparatus and a reception apparatus. The transmission apparatus generates error location information at which an error occurs in each block, in accordance with a data signal including a video signal composed of a first number of words and generated for each block, and an error information signal indicating presence or absence of an error corresponding to the data signal, multiplexes the generated error location information and the data signal into a multiplexed signal, and then, transmits the multiplexed signal through a transmission line. On the other hand, the reception apparatus receives, through the transmission line, a transmission data signal including a data signal including a video signal composed of a predetermined first number of words and generated for each block and an error pointer signal indicating error location information corresponding to the data signal, demultiplexes the received transmission data signal into the data signal and the error pointer signal, and generates error information indicating presence or absence of the error corresponding to the data signal, in accordance with the error pointer signal. The data signal is decompressed in accordance with the generated error information, and this leads to reduction of occurrence of errors.
286 Method for communicating data between digital camera and portable electronic communication device US10155063 2002-05-28 US20030226099A1 2003-12-04 Tony Tsai; Wei Han
The invention is to provide a method for communicating data between a digital camera and a portable electronic communication device comprising the processes of transmitting an instruction packet created by the electronic communication device to the digital camera for storage by means of a defined image data protocol; converting image data stored in the digital camera into at least one reply packet based on the instruction packet by performing the image data protocol by the digital camera and transmitting the reply packet back to the electronic communication device; and performing an error checking on at least one check field of the reply packet by the electronic communication device by means of the image data protocol so as to ensure that no erroneous image data being received.
287 Systems and methods for correcting errors in a received frame US10159523 2002-05-31 US20030226086A1 2003-12-04 Walid Ahmed; Juan G. Gonzalez; Salim Manji; Jose Luis Paredes
The present invention provides systems and methods for correcting errors in a received frame. The present invention introduces diversity into an error detection and correction system at the receiver side by decoding a received frame using a plurality of decoding schemes. Each of these schemes are optimized for a different set of underlying assumptions. The schemes may be optimized to account for various types of noise including, not limited to, Gaussian noise and impulsive noise. The plurality of decoded frames are then validated using an outer decoder to choose a valid frame from candidate decoded frames. By including a plurality of decoders using a plurality of decoding schemes, the error detection and correction system may accurately detect and correct errors in a constantly changing environment having constantly changing noise patterns.
288 Integrated circuit that is robust against circuit errors US10407088 2003-04-04 US20030191999A1 2003-10-09 Richard Petrus Kleihorst; Renatus Josephus Van Der Vleuten; Nico Frits Benschop; Geeke Muurling
Errors are corrected that occur in the operation of a combinatorial logic circuit in an integrated circuit. The combinatorial circuit computes a vector of intermediate signals from the input signal. The combinatorial logic circuit is designed so that, when the combinatorial logic circuit operates without error, the vector belongs to an error correcting code, not being a repetition code. The combinatorial logic circuit comprises combinatorial logic sections, each for computing a respective one of the intermediate signals independently from the other sections. An error correction circuit computes an output signal from the vector, with a computation that maps erroneous vectors to the output signal for a nearest correct vector from the error correcting code when these erroneous vectors differ from the correct vector in less than a predetermined number of the intermediate signals.
289 Optimization of acceptance of erroneous codewords and throughput US09654779 2000-09-05 US06606726B1 2003-08-12 Leif Wilhelmsson; Robert Hed; Hante Meuleman
An encoded signal that comprises a plurality of received encoded signal values is received by using an error correction decoding technique to generate a plurality of decoded signals from the encoded signal, wherein the plurality of decoded signals includes one or more decoded information signals and one or more decoded error detection signals. A correction value is generated that is representative of how much correction was performed by the error correction decoding technique to generate the plurality of decoded signals. The one or more decoded error detection signals are used to generate an error detection result. The decoded information signals are then alternatively accepted or rejected as a function of the error detection result and a comparison of the correction value with a threshold value.
290 System and method for shared decoding using a data replay scheme US09954777 2001-09-17 US20030118130A1 2003-06-26 Mark Greenberg; Manish Shah
A system and method are described in which a decoder decodes data from a plurality of data streams. In one embodiment, the decoder is restored to the state it was in the last time it processed data from each data stream by re-decoding data stored in a replay buffer before decoding new data from each respective data stream. In one embodiment, multiple decoders are grouped together to process data from a plurality of satellite transponders.
291 Demodulating encoded data US10000817 2001-11-30 US20030112897A1 2003-06-19 Chandra R. Murthy; Serguei A. Glazko; Christopher C. Riddle; Angelica Wong
The invention provides the ability to exploit redundancy characteristics of an equation set used to generate waveforms for wireless communication. In doing so, the invention can reduce the number of correlation values that need to be calculated in order to determine the most likely transmitted code word. In particular, the invention can exploit the redundancy characteristics of the equation set in a novel and unique fashion by separating the vector and calculating partial correlations for each separated portion of the vector. The techniques can drastically reduce the number of correlation values that need to be computed for demodulation, and can also reduce the total number of computations. In this manner, the demodulator of a wireless communication device can be simplified without negatively impacting performance.
292 Reversible arithmetic coding for quantum data compression US09873345 2001-09-21 US20030093451A1 2003-05-15 Isaac Liu Chuang; Dharmendra Shantilal Modha
A method and structure for encoding/decoding a block of quantum data including removing trailing eigenstates from the block that have eigenvalues below a predetermined limit to retain leading eigenstates that have eigenvalues above the predetermined limit, encoding the remaining quantum bits retained in the block after the removing. The remaining quantum bits can also include a linear superposition of the leading eigenstates. The predetermined limit is based upon a density matrix of the block. This method of encoding produces encoded quantum bits and can further include decoding the encoded quantum bits by reversing the encoding. The decoding reproduces the remaining quantum bits and the encoding completely erases the remaining quantum bits. Further, the invention can include outputting only an encoded or decoded result.
293 Method and system for limiting the maximum number of consecutive zeroes in a block for communications or storage US09437698 1999-11-10 US06557136B1 2003-04-29 Arnon Friedmann
A digital encoding subsystem encodes binary input data, which comprises payload data. The subsystem facilitates the preservation of the payload data destined for a temporary holding media, such as a transmission media or a storage media. A scrambler receives and scrambles given binary input data to produce given scrambled data. A criteria checker determines whether the given scrambled data satisfies desired criteria. The criteria may comprise a k-constraint, which represents the maximum number of consecutive zeros in a block of the given scrambled data. A de-scrambler receives and unscrambles the given scrambled data to produce given output data. A scramble modifier may be provided which changes the given scrambled data until the given scrambled data satisfies the desired criteria.
294 Semiconductor device having decision feedback equalizer US09706716 2000-11-07 US06556637B1 2003-04-29 Tsunehiko Moriuchi
A read channel for a hard disk includes a decision feedback equalizer (DFE) that is used to demodulate and decode a read signal from a read head or a received signal from a fast communication apparatus by eliminating intersymbol interference from sampled data of the read signal. The DFE has a feed forward equalizer (FFE) that filters the sampled data and generates filtered data. An adder is connected to the FFE and adds the filtered data with a feedback signal to generate an equalization signal. A decision unit connected to the adder compares the equalization signal with a reference signal and generates a decision signal. A shift register connected to the decision unit receives the decision signal. A feedback filter connected to the shift register and the adder receives the decision signal from the shift register and generates the feedback signal. The phase and frequency of a clock signal and the phase and frequency of the input signal are matched using the equalization signal and the decision signal. A replica signal generator connected to the shift register supplies a replica signal, which corresponds with a predetermined decision result, to the shift register in place of the decision signal during phase and frequency matching.
295 Systems and methods for performing bit rate allocation for a video data stream US10092383 2002-03-05 US20030067981A1 2003-04-10 Lifeng Zhao; Ioannis Katsavounidis
The present invention is related to video encoding. In an embodiment, a bit budget is calculated for a first scene. In addition, bit budgets for corresponding frames, including at least a first frame, within the first scene are determined. Optionally, bit budgets corresponding to macroblocks within the first frame are also determined.
296 Systems and methods for enhanced error concealment in a video decoder US10092366 2002-03-05 US20030026343A1 2003-02-06 Chang-Su Kim; Jong Won Kim; Ioannis Katsavounidis
The invention is related to methods and apparatus that conceal errors in images of a corrupted video bitstream. One embodiment conceals errors in a missing or corrupted intra-coded macroblock by linearly interpolating data from other macroblocks that correspond to portions of the image above and below the missing or corrupted macroblock. One embodiment can utilize substitute motion vectors for a missing or corrupted predictive-coded macroblock. Another embodiment doubles the received motion vectors and references the doubled motion vectors to a previous-previous frame. Another embodiment adaptively selects which concealment or reconstruction technique is applied according to projected error estimates. Another embodiment conceals errors by replacing corrupted or missing data by combining concealment data in a weighted sum to reduce an estimated error.
297 Code transmission scheme for communication system using error correcting codes US10230991 2002-08-30 US20030005387A1 2003-01-02 Keiji Tsunoda
In a code transmission scheme for a communication system using error correcting codes, the transmitting side generates at least one transmitting side syndrome value by carrying out a syndrome calculation for the information to be transmitted, and transmits to a receiving side at least one information packet containing the information to be transmitted and at least one redundant packet containing the transmitting side syndrome value. Then, upon receiving at least a part of the information packet and the redundant packet, the receiving side obtains at least one receiving side syndrome value by carrying out a syndrome calculation for an information contained in the information packet as received, and performs error correction, if required, by calculating a difference between the transmitting side syndrome value contained in the received redundant packet and the receiving side syndrome value, so that a circuit size and an amount of software programs can be reduced without affecting the error correction performance.
298 Systems and methods for decoding of partially corrupted reversible variable length code (RVLC) intra-coded macroblocks and partial block decoding of corrupted macroblocks in a video decoder US10092376 2002-03-05 US20020181594A1 2002-12-05 Ioannis Katsavounidis; Chang-Su Kim; Jong Won Kim
The invention is related to methods and apparatus that recover usable video data from partially corrupted data. Embodiments inspect corrupted data packets and identify the location or locations of an error, whether the corrupted data packet contains data expected to be error-free, and whether the error-free data should be used. Decoding of a packet in both the forward direction and the backward direction can be used to locate a position of an error. Intra-coded macroblocks can also be recovered. A decoder can elect to use or to drop an intra-coded macroblock recovered from a corrupted data packet according to further criteria that is applied to the recovered intra-coded macroblock. One embodiment inspects video bitstream data that has been encoded with an optional data partitioning feature enabled, and retrieves specified data in areas of a corrupted packet that are expected to be free from error.
299 Method and apparatus for writing and reading optical recording medium US09373185 1999-08-12 US06483788B1 2002-11-19 Kenji Narumi; Kenichi Nishiuchi
An apparatus for writing on and reading an overwritable optical disk comprises an identifier detector that identifies a recording condition in the sector to be overwritten, and a delay time controller circuit that sets a variation range of the start point for writing according to the recording condition. The record timing of the modulated data signal is changed at random within the set variation range when overwriting the sector of the optical disk.
300 Method and system for providing a multi-level power control loop US09963222 2001-09-26 US20020160800A1 2002-10-31 Jack Rozmaryn
An approach for providing power control of a radio terminal is disclosed. A first control loop is performed according to a first set of signal parameters (e.g., signal-to-noise level) to adjust power level of the radio terminal based upon a received signal from the radio terminal. Further, a second control loop is performed according to a second set of signal parameters (e.g., raw bit error rate (BER)) to refine the power adjustment of the first control loop. The present invention has particular applicability to a point-to-multi-point or a point-to-point radio system.
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