子分类：
- H03M13/005： .{使用凿孔码的}
- H03M13/01： .编码理论基本假设;编码约束;误差概率估算方法;信道模型;代码的模拟或测试
- H03M13/03： .用数据表示中的冗余项检错或前向纠错,即码字包含比源字更多的位数
- H03M13/25： .由信号空间编码进行的检错或前向纠错,即在信号丛中增加冗余项,例如梳状编码调制(TCM){(调制码,入H03M13/31)}
- H03M13/27： .应用交织技术的
- H03M13/29： .合并两个或多个代码或代码结构,例如乘积码、广义乘积码、链接码、内层码和外层码
- H03M13/31： .合并用于检错或纠错并有效应用频谱的编码(没有检错或纠错的入H03M5/14,{H03M 5/145})
- H03M13/33： .基于误差编码或译码的同步{用于传输的入H04L7/048 }
- H03M13/35： .不等或自适应防错,例如根据源信息的重要性提供不同级别的保护,或根据传输信道特性的变化自适应编码
- H03M13/37： .不专用于H03M13/03至H03M13/35各组中规定的特定类型的编码的译码方法或技术
- H03M13/47： .不包含在H03M13/01至H03M13/37各组中的检错、前向纠错或防错
- H03M13/61： .{纠错或检错方法及装置的方面及特性,在其他中未包括的}
- H03M13/63： .{联合纠错和其他技术(H03M13/31和H03M13/33优先)}
- H03M13/65： .{目的和实施方面}
| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 221 | Split sector recovery method | US13410068 | 2012-03-01 | US08321763B1 | 2012-11-27 | Zining Wu; Gregory Burd; Nitin Nangare |
| Reproduction of encoded data which includes a split-mark. FIR data corresponding to split-mark and FIR data affected by the split-mark due to inter-symbol-interference are identified. FIR data corresponding to the split-mark is removed from the received FIR data. Recovered data is created by removing incorrect inter-symbol-interference from the FIR data due to the split-mark, and adding correct inter-symbol-interference from codeword bits. The recovered data is stitched together with data unaffected by split-mark data. | ||||||
| 222 | DTV transmitting system and receiving system and method of processing broadcast data | US13324914 | 2011-12-13 | US08171369B2 | 2012-05-01 | Hyoung Gon Lee; In Hwan Choi; Byoung Gill Kim; Won Gyu Song; Jong Moon Kim; Jin Woo Kim |
| A DTV transmitting system includes a frame encoder, a randomizer, a block processor, a group formatter, a deinterleaver, and a packet formatter. The frame encoder builds an enhanced data frame and encodes the frame two times for first and second error correction, respectively. It further permutes a plurality of encoded data frames. The randomizer randomizes the permuted enhanced data, and the block processor codes the randomized data at a rate of 1/N1. The group formatter forms a group of enhanced data having one or more data regions and inserts the data coded at the rate of 1/N1 into at least one of the data regions. The deinterleaver deinterleaves the group of enhanced data, and the packet formatter formats the deinterleaved data into enhanced data packets. | ||||||
| 223 | DTV transmitting system and receiving system and method of processing broadcast data | US13194829 | 2011-07-29 | US08103932B2 | 2012-01-24 | Hyoung Gon Lee; In Hwan Choi; Byoung Gill Kim; Won Gyu Song; Jong Moon Kim; Jin Woo Kim |
| A DTV transmitting system includes a frame encoder, a randomizer, a block processor, a group formatter, a deinterleaver, and a packet formatter. The frame encoder builds an enhanced data frame and encodes the frame two times for first and second error correction, respectively. It further permutes a plurality of encoded data frames. The randomizer randomizes the permuted enhanced data, and the block processor codes the randomized data at a rate of 1/N1. The group formatter forms a group of enhanced data having one or more data regions and inserts the data coded at the rate of 1/N1 into at least one of the data regions. The deinterleaver deinterleaves the group of enhanced data, and the packet formatter formats the deinterleaved data into enhanced data packets. | ||||||
| 224 | DTV TRANSMITTING SYSTEM AND RECEIVING SYSTEM AND METHOD OF PROCESSING BROADCAST DATA | US13194829 | 2011-07-29 | US20110285914A1 | 2011-11-24 | Hyoung Gon Lee; In Hwan Choi; Byoung Gill Kim; Won Gyu Song; Jong Moon Kim; Jin Woo Kim |
| A DTV transmitting system includes a frame encoder, a randomizer, a block processor, a group formatter, a deinterleaver, and a packet formatter. The frame encoder builds an enhanced data frame and encodes the frame two times for first and second error correction, respectively. It further permutes a plurality of encoded data frames. The randomizer randomizes the permuted enhanced data, and the block processor codes the randomized data at a rate of 1/N1. The group formatter forms a group of enhanced data having one or more data regions and inserts the data coded at the rate of 1/N1 into at least one of the data regions. The deinterleaver deinterleaves the group of enhanced data, and the packet formatter formats the deinterleaved data into enhanced data packets. | ||||||
| 225 | Spatial Multiplexing Communication System With Enhanced Codeword Mapping With Flexible Rate Selection On Each Spatial Layer And With Single HARQ Process | US13063958 | 2009-09-18 | US20110185249A1 | 2011-07-28 | George Jongren; Stefano Sorrentino |
| A method of data transmission includes encoding an information block according to a predetermined retransmission protocol to generate, for a single hybrid automatic repeat request (HARQ) instance, a transport block having information bits and error detection bits and channel coding different parts of said transport block using different modulation and coding schemes to generate one or more codewords for transmission to a receiving station. | ||||||
| 226 | Correction of data errors in a memory buffer | US11787357 | 2007-04-16 | US07984359B2 | 2011-07-19 | Julian Gorfajn; Bruce Buch; E. William Bruce, II |
| Methods, circuits, and disk drive that correct errors in data that is temporarily stored in a memory buffer are disclosed. An error detection code and an error correction code are generated for data. The data, the error detection code, and the error correction code are stored in the memory buffer. The data is retrieved from the memory buffer and error detected using the error detection code. In response to detecting an error, the error correction code is applied to the retrieved data to generate corrected data. | ||||||
| 227 | DTV TRANSMITTING SYSTEM AND RECEIVING SYSTEM AND METHOD OF PROCESSING BROADCAST DATA | US13011750 | 2011-01-21 | US20110110419A1 | 2011-05-12 | Hyoung Gon Lee; In Hwan Choi; Byoung Gill Kim; Won Gyu Song; Jong Moon Kim; Jin Woo Kim |
| A DTV transmitting system includes a frame encoder, a randomizer, a block processor, a group formatter, a deinterleaver, and a packet formatter. The frame encoder builds an enhanced data frame and encodes the frame two times for first and second error correction, respectively. It further permutes a plurality of encoded data frames. The randomizer randomizes the permuted enhanced data, and the block processor codes the randomized data at a rate of 1/N1. The group formatter forms a group of enhanced data having one or more data regions and inserts the data coded at the rate of 1/N1 into at least one of the data regions. The deinterleaver deinterleaves the group of enhanced data, and the packet formatter formats the deinterleaved data into enhanced data packets. | ||||||
| 228 | PROCESS FOR FABRICATING AN ELECTRONIC DEVICE | US12787840 | 2010-05-26 | US20100258898A1 | 2010-10-14 | Hacène Lahreche |
| An electronic device made of group III/N materials and a method of fabricating the device. The method includes growing by epitaxy on a substrate layer the following successive layers: a layer adapted to contain an electron gas, a barrier layer, and a surface layer. The method also includes an etching step performed on at least part of the surface layer. After the etching step, an epitaxial regrowth is performed to grow a covering layer on the etched surface layer. The material of the surface layer and the material of the covering layer include at least one Group III element and nitrogen. | ||||||
| 229 | APPARATUS AND METHOD FOR ENCODING AND DECODING SIGNALS | US12599757 | 2008-05-16 | US20100246664A1 | 2010-09-30 | Richard W. Citta; Scott M. Lopresto |
| New capabilities will allow conventional broadcast transmission to be available to mobile devices. A method is described including the steps of receiving data, encoding the data using a first encoding process, inserting training data into the encoded data, and encoding the encoded data and the training data using a second encoding process. An apparatus is also described including a first encoder receiving at least a portion of data and encoding the portion of data using a first encoding process, a training data inserter inserting training data into the first encoded data, and a second encoder encoding the first encoded data and the training data using a second encoding process. | ||||||
| 230 | Signal Acquisition System and Method | US12126345 | 2008-05-23 | US20090292507A1 | 2009-11-26 | Chi-Ping Nee; Shachar Kons; Uri Parker; Yoni Baron |
| A system for signal processing is provided. The system includes a steady state processing system for receiving a signal. A general purpose processing system is coupled to the steady state processing system and includes a signal acquisition system for receiving the signal and generating acquisition data. The steady state processing system can receive the acquisition data from the signal acquisition system and use the acquisition data to acquire the signal. | ||||||
| 231 | Method and System for Accelerated Stream Processing | US12121473 | 2008-05-15 | US20090287628A1 | 2009-11-19 | Ronald S. Indeck; David Mark Indeck; Naveen Singla; Jason R. White |
| Disclosed herein is a method and system for hardware-accelerating various data processing operations in a rule-based decision-making system such as a business rules engine, an event stream processor, and a complex event stream processor. Preferably, incoming data streams are checked against a plurality of rule conditions. Among the data processing operations that are hardware-accelerated include rule condition check operations, filtering operations, and path merging operations. The rule condition check operations generate rule condition check results for the processed data streams, wherein the rule condition check results are indicative of any rule conditions which have been satisfied by the data streams. The generation of such results with a low degree of latency provides enterprises with the ability to perform timely decision-making based on the data present in received data streams. | ||||||
| 232 | MAXIMUM LIKELIHOOD SEQUENCE ESTIMATION DECODING | US12295763 | 2007-03-29 | US20090147648A1 | 2009-06-11 | Ruud Vlutters |
| A Maximum Likelihood Sequence Estimator comprises a signal receiver (401) which receives a first signal for decoding. An ISI processor (403) generates a compensation signal from the first signal. The compensation signal represents intersymbol interference outside a channel model window of a Maximum Likelihood Sequence Estimation (MLSE) but does not represent intersymbol interference within the channel model window of the MLSE. A compensation processor (405) generates a compensated signal by compensating the first signal by the compensation signal, e.g. by subtracting the compensation signal from the first signal. The compensated signal is fed to a MLSE decoder (407) which decodes data of the first signal by performing the MLSE on the compensated signal. The invention may provide reduced detection error rates and may in particular be suitable for optical disc reading systems. | ||||||
| 233 | HYBRID ENCODING OF DATA TRANSMISSIONS IN A SECURITY SYSTEM | US12358464 | 2009-01-23 | US20090132826A1 | 2009-05-21 | Thomas Schmit |
| A security system in which wireless transmitting security devices use a hybrid or dual encoding methodology, wherein a first part of a data message is encoded in a return-to-zero (RZ) format and a second part of the data message is encoded in a non-return-to-zero (NRZ) format, thereby increasing error detection and correction. In a first aspect of the invention, status information is included in the first part of the message and redundant status information is included in the second part of the message. In a second aspect of the invention, message sequence information is included in the second part of the message to avoid processing of stale or out-of-sequence messages. | ||||||
| 234 | Reconfigurable bit-manipulation node | US11682705 | 2007-03-06 | US07506237B2 | 2009-03-17 | Brian Box; John M. Rudosky; Walter James Scheuermann |
| A reconfigurable bit-manipulation node is disclosed that includes an execution unit configured to perform a number of bit-oriented functions and a control unit configured to control the execution unit to allow one of the bit-oriented functions to be performed. The execution unit is comprised of interconnected elements that include a programmable butterfly unit, a number of non-programmable butterfly units, a number of data path elements, a look-up table memory, and a reorder memory. The execution unit is capable of engaging in one of a number of operating modes to perform the bit-oriented functions. The operating modes include a programmable mode and a number of fixed operating modes including Viterbi decoding, turbo decoding and variable length encoding and decoding. The data path elements include a programmable shifter and a programmable combiner. | ||||||
| 235 | Fast error-correcting of embedded interaction codes | US11142844 | 2005-05-31 | US20090027241A1 | 2009-01-29 | Zhouchen Lin; Qiang Wang; Jian Wang |
| A fast decoding technique for decoding a position of a bit in a pattern provided on a media surface that can generate large amounts of solution candidates quickly by switching or flipping bits and utilizing a recursion scheme. The fast decoding technique may be employed to simultaneously decode multiple dimensions of a pattern on the media surface. | ||||||
| 236 | Error detection using codes targeted to prescribed error types | US11169159 | 2005-06-28 | US07484167B2 | 2009-01-27 | Jihoon Park; Jaekyun Moon |
| Techniques are described for detecting error events in codewords detected from data signals transmitted via a communication system. The error events are detected with an error detection code that corresponds to one or more dominant error events for the communication system. The invention develops a class of error detection codes to detect specific error events of known types. In some embodiments, the communication system comprises a recording system. The error detection coding method may be used in conjunction with error correction processing to provide substantial performance gain compared to conventional parity-based post processing methods. For example, the error correction processing may include one or more correlation filters that correspond to the one or more dominant error events for the communication system. A correction module may correct the codeword based on a type of the detected error event and a location of the detected error event in the codeword. | ||||||
| 237 | Method and apparatus for antenna selection using channel response information in a multi-carrier system | US10518555 | 2002-06-28 | US07468962B2 | 2008-12-23 | Maxim Borisovich Belotserkovsky; Vincent Demoulin; Louis Robert Litwin |
| The disclosed embodiments relate to a technique for selecting one of several antennas or channels in a receiver based on the quality of the channel response at each of the antennas in a multicarrier system employing convolutional forward error-correction coding. Channel estimates are computed for each subcarrier and monotonic weights are assigned to each subcarrier based on the relative strength of the channel response for that subcarrier. The monotonic weights are mapped to each bit in a symbol for each subcarrier and bits are de-interleaved, if needed. A sliding window evaluation is performed to determine an overall channel quality metric for each channel. The antenna or channel having the highest overall CQM is selected to receive data. | ||||||
| 238 | Error correction method and system | US10735128 | 2003-12-12 | US07350127B2 | 2008-03-25 | Darel N. Emmot; Asheesh Kashyap |
| An error correction code method comprises examining a validator of one of a plurality of data in a data stream at a first processing stage and directing the one of the plurality of data through at least one subsequent processing stage to a corrected output if the validator indicates an error. The method also includes directing the one of the plurality of data to the corrected output if the validator does not indicate an error. | ||||||
| 239 | Error method, system and medium | US09948299 | 2001-09-06 | US07346825B2 | 2008-03-18 | Linda J. Rankin; David J. O'Shea |
| Error detection methods, systems and medium are provided. The error detection method may comprise processing error conditions associated with transactions in a manner that may enable error source identification. The system may comprise a plurality of nodes of components. The nodes may include storage elements to record an error condition indicative of whether a component provided an indication of detecting an error in response to processing the transaction. | ||||||
| 240 | DTV TRANSMITTING SYSTEM AND RECEIVING SYSTEM AND METHOD OF PROCESSING BROADCAST DATA | US11752859 | 2007-05-23 | US20080031349A1 | 2008-02-07 | Hyoung Gon Lee; In Choi; Byoung Kim; Won Song; Jong Kim; Jin Kim |
| A DTV transmitting system includes a frame encoder, a randomizer, a block processor, a group formatter, a deinterleaver, and a packet formatter. The frame encoder builds an enhanced data frame and encodes the frame two times for first and second error correction, respectively. It further permutes a plurality of encoded data frames. The randomizer randomizes the permuted enhanced data, and the block processor codes the randomized data at a rate of 1/N1. The group formatter forms a group of enhanced data having one or more data regions and inserts the data coded at the rate of 1/N1 into at least one of the data regions. The deinterleaver deinterleaves the group of enhanced data, and the packet formatter formats the deinterleaved data into enhanced data packets. | ||||||
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