| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 1 | 解码装置、方法和程序 | CN201110331587.0 | 2011-10-27 | CN102457287A | 2012-05-16 | 横川峰志; 新谷修; 中田丰; 池谷亮志 |
| 本公开提供一种解码装置，包括：存储部分，配置为存储接收值；检测部分，配置为检测所述接收值中的误差；误差校正部分，配置为针对所述接收值校正由所述检测部分检测到的误差；以及控制部分，配置为控制从所述存储部分读取所述接收值；其中，所述控制部分控制第一读取，使得所述接收值读取到所述检测部分中，并且在通过所述检测部分的误差检测之后，所述控制部分控制第二读取，使得与所述第一读取中的接收值实质上相同的接收值读取到所述误差校正部分。 | ||||||
| 2 | 解码设备和方法 | CN201110332260.5 | 2011-10-27 | CN102457355B | 2016-08-03 | 横川峰志; 中田丰; 池谷亮志 |
| 在此公开了一种解码设备，包括：提取部分、存储部分、分配部分和解码部分。提取部分获取包含一帧中的多个码字和除了多个码字外的信息的数据，并且按每个码字从所述数据提取多个码字。存储部分至少存储由所述提取部分提取的一个码字。分配部分将通过用于一帧的时间除以一帧中包含的码字的数目所获得的时间设为分配到一个码字的解码的时间。解码部分在由所述分配部分分配的时间中解码码字。 | ||||||
| 3 | 解码设备、方法和程序 | CN201110332260.5 | 2011-10-27 | CN102457355A | 2012-05-16 | 横川峰志; 中田丰; 池谷亮志 |
| 在此公开了一种解码设备，包括：提取部分、存储部分、分配部分和解码部分。提取部分获取包含一帧中的多个码字和除了多个码字外的信息的数据，并且按每个码字从所述数据提取多个码字。存储部分至少存储由所述提取部分提取的一个码字。分配部分将通过用于一帧的时间除以一帧中包含的码字的数目所获得的时间设为分配到一个码字的解码的时间。解码部分在由所述分配部分分配的时间中解码码字。 | ||||||
| 4 | Decoding device and method, and program | EP11180403.5 | 2011-09-07 | EP2448125A1 | 2012-05-02 | Yokokawa, Takashi; Nakada, Yutaka; Ikegaya, Ryoji |
A decoding device including: an extracting section, a storing section, an allocating section, and a decoding section. The extracting section acquires data containing plural code words and information other than the plural code words in one frame, and extracts the plural code words from the data every one code word. The storing section at least stores the one code word extracted by the extracting section. The allocating section sets time obtained by dividing time for the one frame by the number of code words contained in the one frame as time allocated to decoding of one code word. The decoding section decodes the code word within the time allocated by the allocating section.
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| 5 | METHOD AND APPARATUS FOR COMPUTING SOFT DECISION INPUT METRICS TO A TURBO DECODER | EP01916461.5 | 2001-03-07 | EP1264408A2 | 2002-12-11 | SINDHUSHAYANA, Nagabhushayana |
| A method and apparatus for computing soft decision input metrics to a turbo decoder includes circuits associated with eight-ary phase shift keyed (8PSK) modulation and sixteen-ary quadrature amplitude modulation (16QAM). In both implementations log-likelihood ratio (LLR) metrics on code symbols are estimated as products of various constant values and various combinations of the in-phase and quadrature components of a demodulated soft decision. In the implementation associated with the 16QAM modulation scheme, an estimate of the carrier-signal-to-interference (C/I) ratio is also used to estimate some of the LLR metrics. Estimates of the LLR metrics may also be obtained in association with generalized square QAM and M-ary PSK modulation schemes including, e.g., 64QAM, 256QAM, and 16PSK. | ||||||
| 6 | Generating molecular encoding information for data storage | US14613899 | 2015-02-04 | US10020826B2 | 2018-07-10 | S. Christopher Gladwin; Jason K. Resch; Manish Motwani |
| A method begins by a processing module of one or more processing modules of one or more computing devices generating a number for each encoded data slice of a set of encoded data slices based on the encoded data slice, identifying a gene based on the number to produce an identified gene, and creating a linking identifier that links the encoded data slice to the identified gene, where, for the set of encoded data slices, a set of identified genes and a set of linking identifiers are created. The method continues with the processing module generating molecular encoding information from the set of identified genes and the set of linking identifiers, where the molecular encoding information is used to create a molecular storage structure for each identified gene of the set of identified genes yielding a set of molecular storage structures. | ||||||
| 7 | DECODING DEVICE AND METHOD, AND PROGRAM | US13235794 | 2011-09-19 | US20120110407A1 | 2012-05-03 | Takashi YOKOKAWA; Yutaka NAKADA; Ryoji IKEGAYA |
| Disclosed herein is a decoding device including: an extracting section, a storing section, an allocating section, and a decoding section. The extracting section acquires data containing plural code words and information other than the plural code words in one frame, and extracts the plural code words from the data every one code word. The storing section at least stores the one code word extracted by the extracting section. The allocating section sets time obtained by dividing time for the one frame by the number of code words contained in the one frame as time allocated to decoding of one code word. The decoding section decodes the code word within the time allocated by the allocating section. | ||||||
| 8 | Method of decoding utilizing a recursive table-lookup decoding method | US10601948 | 2003-06-23 | US07073114B2 | 2006-07-04 | Peter C. Massey |
| A recursive table-lookup decoding method for decoding a convolutional block code by approximating the well-known MAP, LOG-MAP, APP and BCJR decoding algorithms to obtain approximations for the a-posteriori estimates and the extrinsic estimates for the block of information bits; and a method of decoding a turbo code or a parallel-concatenated convolutional code (PCCC) to obtain a block of decoded bits for the information bits. The turbo decoding method utilizes the recursive table-lookup decoding method to decode the constituent convolutional sub-codes of a turbo code or PCCC. Hardware implementations may not require a processor. | ||||||
| 9 | GENERATING MOLECULAR ENCODING INFORMATION FOR DATA STORAGE | US14613899 | 2015-02-04 | US20150288384A1 | 2015-10-08 | S. Christopher Gladwin; Jason K. Resch; Manish Motwani |
| A method begins by a processing module of one or more processing modules of one or more computing devices generating a number for each encoded data slice of a set of encoded data slices based on the encoded data slice, identifying a gene based on the number to produce an identified gene, and creating a linking identifier that links the encoded data slice to the identified gene, where, for the set of encoded data slices, a set of identified genes and a set of linking identifiers are created. The method continues with the processing module generating molecular encoding information from the set of identified genes and the set of linking identifiers, where the molecular encoding information is used to create a molecular storage structure for each identified gene of the set of identified genes yielding a set of molecular storage structures. | ||||||
| 10 | Methods for viterbi decoder implementation | US13739852 | 2013-01-11 | US08839082B2 | 2014-09-16 | Francky Catthoor; Frederik Naessens; Praveen Raghavan |
| Disclosed is a method for selecting a design option for a Viterbi decoder model. In some embodiments, the method includes deriving a set of design options for a Viterbi decoder model by differentiating at least one design parameter, where the at least one design parameter comprises at least a first value for a look-ahead parameter. The method further includes performing an evaluation of each design option in the set of design options in a multi-dimensional design space and, based on the evaluation of each design option, selecting a design option in the set of design options that (i) satisfies a predetermined energy efficiency constraint and (ii) yields at least a second value for the look-ahead parameter, wherein the second value is greater than the first value and satisfies a predetermined area budget. | ||||||
| 11 | Vectorized rebinning for fast data down-sampling | US13600992 | 2012-08-31 | US08816884B2 | 2014-08-26 | Bruce H. Dean; Jeffrey S. Smith; David L. Aronstein |
| A rebinning device includes a rebinning engine that transforms signal data from a first format to a second format with vectorized binning. Moreover, a data storage operably coupled to the rebinning engine stores the signal data in the second format. The rebinning device may optionally includes a capturing engine that captures the signal data in the first format and a rendering engine that renders the signal data in the second format. | ||||||
| 12 | Decoding device and method, and program | US13235794 | 2011-09-19 | US08751908B2 | 2014-06-10 | Takashi Yokokawa; Yutaka Nakada; Ryoji Ikegaya |
| Disclosed herein is a decoding device including: an extracting section, a storing section, an allocating section, and a decoding section. The extracting section acquires data containing plural code words and information other than the plural code words in one frame, and extracts the plural code words from the data every one code word. The storing section at least stores the one code word extracted by the extracting section. The allocating section sets time obtained by dividing time for the one frame by the number of code words contained in the one frame as time allocated to decoding of one code word. The decoding section decodes the code word within the time allocated by the allocating section. | ||||||
| 13 | Methods for Viterbi Decoder Implementation | US13739852 | 2013-01-11 | US20130198594A1 | 2013-08-01 | Francky Catthoor; Frederik Naessens; Praveen Raghavan |
| Disclosed is a method for selecting a design option for a Viterbi decoder model. In some embodiments, the method includes deriving a set of design options for a Viterbi decoder model by differentiating at least one design parameter, where the at least one design parameter comprises at least a first value for a look-ahead parameter. The method further includes performing an evaluation of each design option in the set of design options in a multi-dimensional design space and, based on the evaluation of each design option, selecting a design option in the set of design options that (i) satisfies a predetermined energy efficiency constraint and (ii) yields at least a second value for the look-ahead parameter, wherein the second value is greater than the first value and satisfies a predetermined area budget. | ||||||
| 14 | Method and apparatus for computing soft decision input metrics to a turbo decoder | US09521358 | 2000-03-08 | US06594318B1 | 2003-07-15 | Nagabhushana Sindhushayana |
| A method and apparatus for computing soft decision input metrics to a turbo decoder includes circuits associated with eight-ary phase shift keyed (8PSK) modulation and sixteen-ary quadrature amplitude modulation (16QAM). In both implementations log-likelihood ratio (LLR) metrics on code symbols are estimated as products of various constant values and various combinations of the in-phase and quadrature components of a demodulated soft decision. In the implementation associated with the 16QAM modulation scheme, an estimate of the carrier-signal-to-interference (C/I) ratio is also used to estimate some of the LLR metrics. Estimates of the LLR metrics may also be obtained in association with generalized square QAM and M-ary PSK modulation schemes including, e.g., 64QAM, 256QAM, and 16PSK. | ||||||
| 15 | 復号装置および方法、並びにプログラム | JP2010240242 | 2010-10-27 | JP5674015B2 | 2015-02-18 | 横川 峰志; 峰志 横川; 豊 中田; 亮志 池谷 |
| 16 | Apparatus and method for computing a metric for soft decision input to the turbo decoder | JP2001566277 | 2001-03-07 | JP4741154B2 | 2011-08-03 | シンデュシャヤナ、ナガブーシャナ |
| A method and apparatus for computing soft decision input metrics to a turbo decoder includes circuits associated with eight-ary phase shift keyed (8PSK) modulation and sixteen-ary quadrature amplitude modulation (16QAM). In both implementations log-likelihood ratio (LLR) metrics on code symbols are estimated as products of various constant values and various combinations of the in-phase and quadrature components of a demodulated soft decision. In the implementation associated with the 16QAM modulation scheme, an estimate of the carrier-signal-to-interference (C/I) ratio is also used to estimate some of the LLR metrics. Estimates of the LLR metrics may also be obtained in association with generalized square QAM and M-ary PSK modulation schemes including, e.g., 64QAM, 256QAM, and 16PSK. | ||||||
| 17 | Decoding apparatus and method, and program | JP2010240242 | 2010-10-27 | JP2012095063A | 2012-05-17 | YOKOGAWA MINESHI; NAKADA YUTAKA; IKETANI RYOJI |
| PROBLEM TO BE SOLVED: To increase the accuracy of decoding by implementing iterative decoding ensuring a uniform iteration count.SOLUTION: An LDPC code word segmentation section 51 segments input data into single code words of LDPC decoding and outputs them to a memory 53. The memory 53 is instructed by a control section 52 to output the code words one by one to an LDPC decoding section 54. The control section 52 calculates a decoding time per code word determined by the number of code words per unit time, and controls the memory 53 such that the memory 53 outputs the code words at the time intervals. The time set by the control section 52 is the same for every code word included in one unit time, so that an iteration count of decoding in the LDPC decoding section 54 is also the same. The invention can be applied to a reception apparatus for receiving a digital broadcast wave. | ||||||
| 18 | Apparatus and method for computing a metric for soft decision input to the turbo decoder | JP2001566277 | 2001-03-07 | JP2003526987A | 2003-09-09 | シンデュシャヤナ、ナガブーシャナ |
| A method and apparatus for computing soft decision input metrics to a turbo decoder includes circuits associated with eight-ary phase shift keyed (8PSK) modulation and sixteen-ary quadrature amplitude modulation (16QAM). In both implementations log-likelihood ratio (LLR) metrics on code symbols are estimated as products of various constant values and various combinations of the in-phase and quadrature components of a demodulated soft decision. In the implementation associated with the 16QAM modulation scheme, an estimate of the carrier-signal-to-interference (C/I) ratio is also used to estimate some of the LLR metrics. Estimates of the LLR metrics may also be obtained in association with generalized square QAM and M-ary PSK modulation schemes including, e.g., 64QAM, 256QAM, and 16PSK. | ||||||
| 19 | Decoding device and method, and program | JP2010240243 | 2010-10-27 | JP5581969B2 | 2014-09-03 | 峰志 横川; 修 新谷; 豊 中田; 亮志 池谷 |
| 20 | Decoding apparatus and method, and program | JP2010240243 | 2010-10-27 | JP2012095064A | 2012-05-17 | YOKOGAWA MINESHI; SHINTANI OSAMU; NAKADA YUTAKA; IKETANI RYOJI |
| PROBLEM TO BE SOLVED: To reduce memory.SOLUTION: A BCH code word length of data R0 stored in a received value memory 152 is supplied to a BCH decoding section 153. The BCH decoding section 153 calculates an error position and an error amount in the supplied data R0 and supplies them to an error correcting section 154, and outputs a decoding completion flag to a control section 151. On receiving the decoding completion flag, the control section 151 instructs the received value memory 152 to supply the data R0 to the error correcting section 154. The control section 151 instructs the received value memory 152 to read out the same data twice. The invention can be applied to a reception apparatus for receiving a digital broadcast wave which includes a decoding apparatus for performing BCH decoding. | ||||||
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