| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 221 | Method and apparatus for code conversion | US3750147D | 1971-04-05 | US3750147A | 1973-07-31 | GREGG R |
| A system for converting codes between a system data (e.g., ASCII) code format and a video display (e.g., dot matrix) code format is disclosed for use in a data display system employing a cathode ray tube. Conversion is accomplished one line of characters at a time by a procedure in which the character code groups to be converted (system to video or video to system) are circulated in a register in synchronism with a ''''dictionary'''' consisting of a series of all possible character code groups, each with its related code group of the other format. The circulating register for the dictionary is shorter than the register for the line of data to be converted such that with each cycle of the data circulating register, the dictionary is ''''precessed'''' (shifted) one character position in the line of data. When a correlation is found, the related code group of the other format is substituted from the dictionary into the data register. Thus, one line of data is converted in a number of cycles of the data register equal to or less than the number of different character code groups of either format in the dictionary register.
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| 222 | Multiple error detector | US3707714D | 1971-01-08 | US3707714A | 1972-12-26 | PLUMLEY CHRISTOPHER |
| Apparatus for producing a coded indication of which single incoming line carries an error signal responds to the receipt of plural error signals concurrently on different lines by producing an unambiguous multiple error signal.
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| 223 | Data terminal system | US3701856D | 1970-12-15 | US3701856A | 1972-10-31 | STUCK CARL G; WILKES ARTHUR L |
| An electronic apparatus and code conversion method for use in a data terminal system incorporating a modified type head electric typewriter as the data input-output device. A single timing sequence automatically controls all code converting operations of the terminal for both transmitting and receiving data. In a transmit cycle of the timing sequence, a keyboard code of the typewriter is converted to a selected one of a number of communications line codes which is then transmitted over the line. In a receive cycle of the timing sequence, the line code is then further converted into a suitable print code for operating the print or function mechanisms for the typewriter. When the terminal is receiving data, only the receive cycle of the complete timing sequence is effective. All conversions are made by means of a master register which is gated in parallel through code conversion logic gates, or a read-only memory, back into the register. The states of the master register flip-flops containing the print code determine which of a series of electromechanical actuators are activated to operate the print mechanism of the typewriter. Additionally, a method and apparatus is disclosed for generating a six bit line code from only three outputs of the read-only memory.
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| 224 | Data compaction using modified variable-length coding | US3675211D | 1970-09-08 | US3675211A | 1972-07-04 | RAVIV JOSEF |
| A three-state associative memory is employed as an encodingdecoding instrumentality for making conversions between fixedlength codes and variable-length codes. The available variablelength codes are stored in a field of the associative memory that has uniform word lengths. Memory cells which are not needed for storing bits of the variable-length codes are set to a ''''don''t care'''' state. Fixed-length codes and code length indications corresponding to these stored variable-length codes are stored in other fields of the associative memory. A ''''COPY'''' feature enables the system to function with an associative memory of relatively small size which performs normal encoding and decoding operations for the more frequently occurring codes, thereby achieving a high degree of data compaction, while the less frequently occurring codes are handled in a manner that does not achieve such compaction but requires much less memory. Encoding in the ''''COPY'''' mode of operation involves appending the fixedlength code word to a special COPY code which is the same for all code words in this category. Decoding a combination code word of this kind involves discarding the COPY code portion and directly utilizing the remainder as the decoded fixed-length code word. Only one line of stored data is needed in the associative memory to handle all code words which use the COPY code.
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| 225 | Digital code to digital code conversions | US3624637D | 1970-04-29 | US3624637A | 1971-11-30 | IRWIN JOHN W |
| Correlation between digit positions of code groups of the two digital codes having different code group size, enables conversion with minimum logic. One of the digit positions in each of the code groups may have a one-for-one relationship with the corresponding digit position in another code group. The larger code group may have a set of digit positions having unique relationships to a like number of digit positions in the smaller code group. Such relationships effect predetermined permutation characteristics within each of the code groups. The larger code group may be a run-length limited code. The number of digit positions in the set of related digit positions is equal to the limit of the run length. The position of a digit fed directly through a converter without conversion is preferably located adjacent the set of related digit positions. In a specific form of the invention, conversions are made between a four-bit binary code and five-bit run-length-limited code. The conversion from a small code group to a larger code group is effected by adding binary 1''s during the conversion process. In converting from a larger or second code group to a smaller or first code group, 1''s are subtracted from the code representations.
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| 226 | Code translator | US3613091D | 1969-10-06 | US3613091A | 1971-10-12 | THOMAS RALPH H; PERLOFF RONALD S |
| A device for translating a multibit input code into a desired multibit output code including a double-ended decoding circuit which converts the signals representing an input character into a single signal and apparatus which encodes this single signal into the signals representing a corresponding output character.
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| 227 | Time marking fluctuation and error reduction by code conversion at pulse transmitter,repeater and receiver stations | US3491298D | 1966-10-31 | US3491298A | 1970-01-20 | JAGER FRANK DE; ZEGERS LEO EDUARD; KUILMAN JAN |
| 228 | Asychronous magnetic shift register circuit | US3447142D | 1965-11-30 | US3447142A | 1969-05-27 | KAENEL REGINALD A |
| 229 | Parallel gray to binary converter with ambiguity check between two encoders | US3426347D | 1965-11-24 | US3426347A | 1969-02-04 | TABISZ SYLVESTER C |
| 230 | Telegraph polar adapter | US31388863 | 1963-10-04 | US3330905A | 1967-07-11 | FIRTH FRANCIS R |
| 231 | Binary coding-decoding circuits | US49315865 | 1965-10-05 | US3308236A | 1967-03-07 | JONES JR JOHN PAUL |
| 232 | Electronic keyboard control system | US28234263 | 1963-05-22 | US3249199A | 1966-05-03 | JONES JR JOHN PAUL |
| 233 | Bidirectional translator | US25724263 | 1963-02-08 | US3241134A | 1966-03-15 | WILLIAM LOOSCHEN FLOYD |
| 234 | Translator | US16617962 | 1962-01-15 | US3210755A | 1965-10-05 | MONAHAN DONALD F |
| 235 | Teleprinter apparatus | US86162659 | 1959-12-23 | US3139483A | 1964-06-30 | WALTER DEMANT; EUGEN HILDINGER |
| 236 | Variable bit-rate converter | US3622160 | 1960-06-15 | US3135947A | 1964-06-02 | GRONDIN GEORGE F; MCGHIE ROBERT L |
| 237 | Mixed base code generation | US75082858 | 1958-07-24 | US3132334A | 1964-05-05 | WILLIAMS RICHARD E |
| 238 | Binary code conversion | US85585959 | 1959-11-27 | US3123816A | 1964-03-03 | |
| 239 | Intelligence storage equipment | US67993557 | 1957-08-23 | US3104375A | 1963-09-17 | GOODWIN WRIGHT ESMOND PHILIP |
| 240 | Electronic coding and decoding device | US79015659 | 1959-01-30 | US3085163A | 1963-04-09 | PIERRE BURSTOW |
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