| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 1 | 一种基于多比特△—Σ调制的数字扬声器系统实现方法和装置 | CN201310636558.4 | 2013-12-02 | CN103701465A | 2014-04-02 | 马登永; 杨军; 周建明; 柴国强; 蔡野锋; 沐永生 |
| 本发明公开了一种基于多比特Δ-∑调制的数字扬声器系统实现方法和装置。该方法包括：1）数字输入格式转换；2）过采样插值滤波；3）多比特Δ-∑调制；4）温度计编码；5）多通道失配整形；6）编码格式转换；7）多通道数字功放；8）驱动扬声器阵列或多音圈扬声器单元发声。该装置包括：一数字输入接口、一过采样插值滤波器、一多比特Δ-∑调制器、一温度计编码器、一多通道失配整形器、一编码格式转换器、一多通道数字功放、一扬声器阵列或者多音圈扬声器单元；各部分依次顺序连接。本发明能够实现低压供电下的大功率输出，节省电能消耗，实现多通道重放系统的单芯片集成，减少了系统体积重量和实现成本，提高了重放声品质。 | ||||||
| 2 | 一种基于多比特△—Σ调制的数字扬声器系统实现方法和装置 | CN201310636558.4 | 2013-12-02 | CN103701465B | 2016-09-21 | 马登永; 杨军; 周建明; 柴国强; 蔡野锋; 沐永生 |
| 本发明公开了一种基于多比特Δ‑∑调制的数字扬声器系统实现方法和装置。该方法包括：1）数字输入格式转换；2）过采样插值滤波；3）多比特Δ‑∑调制；4）温度计编码；5）多通道失配整形；6）编码格式转换；7）多通道数字功放；8）驱动扬声器阵列或多音圈扬声器单元发声。该装置包括：一数字输入接口、一过采样插值滤波器、一多比特Δ‑∑调制器、一温度计编码器、一多通道失配整形器、一编码格式转换器、一多通道数字功放、一扬声器阵列或者多音圈扬声器单元；各部分依次顺序连接。本发明能够实现低压供电下的大功率输出，节省电能消耗，实现多通道重放系统的单芯片集成，减少了系统体积重量和实现成本，提高了重放声品质。 | ||||||
| 3 | Verfahren zur Ermittlung von Prädiktionswerten bei der DPCM-Prädiktionscodierung sowie und Anwendung | EP93118117.6 | 1993-11-09 | EP0599124B1 | 1999-04-21 | Mayer, Jörg, Dipl.-Ing. |
| 4 | Verfahren zur Ermittlung von Prädiktionswerten bei der DPCM-Prädiktionscodierung sowie Prädiktor und Anwendung | EP93118117.6 | 1993-11-09 | EP0599124A2 | 1994-06-01 | Mayer, Jörg, Dipl.-Ing. |
Bei der DPCM-Prädiktionscodierung von Bildsequenzen wird der Prädiktionsfehler aus zurückliegenden Prädiktionswerten ermittelt. Beim Verfahren nach der Erfindung wird im Normalfall ein aktueller Prädiktionswert (Pn) aus einem zeitlich zurückliegenden Prädiktionswert (Pn-1) und der Differenz aus zwei zurückliegenden Prädiktionswerten (Pn-1,Pn-2) ermittelt. Beim Auftreten von Kanten hingegen wird nur ein zurückliegender Prädiktionswert (Pn-1) herangezogen. Durch diese Maßnahme kann eine Oszillation des Prädiktionsfehlers unterbunden werden. |
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| 5 | An audio signal recording and reproducing apparatus | EP88306344.8 | 1988-07-12 | EP0299711B1 | 1994-03-09 | Miki, Tsutomu Mitsubishi Denki Kabushiki Kaisha |
| 6 | SENSOR CIRCUIT | EP15183285.4 | 2015-09-01 | EP3139186B1 | 2018-08-01 | SCHAPENDONK, Edwin |
| The disclosure relates to sensor systems, in particular to such systems incorporating analogue to digital converters, for example for use in providing a digital signal derived from sensing elements connected in a bridge configuration. Example embodiments include a sensor circuit (300) comprising: first and second paths (301 a, 301 b) comprising respective first and second sensing elements (R1 a, R2a) connected between first and second supply lines (302a, 302b); an analogue to digital converter (304, 305, 306) having a differential input connected to receive a differential voltage signal (Vinp-Vinn) between the first and second sensing elements (R1 a, R2a) and an output for providing a digital output signal (Dout) representing a difference between the first and second sensing elements (R1 a, R2a), the analogue to digital converter comprising: a plurality of current sources (311 0 ...311 n ) connected between the first and second supply lines (302a, 302b), each current source being switchably connected to either the first or second sensing elements (R1 a, R2a); and control logic (306) configured to selectively switch current from each of the current sources (311 0 ...311 n ) to either the first path (301 a) or the second path (301 b) in dependence on the differential voltage signal (Vinp-Vinn). | ||||||
| 7 | SENSOR CIRCUIT | EP15183285.4 | 2015-09-01 | EP3139186A1 | 2017-03-08 | SCHAPENDONK, Edwin |
The disclosure relates to sensor systems, in particular to such systems incorporating analogue to digital converters, for example for use in providing a digital signal derived from sensing elements connected in a bridge configuration. Example embodiments include a sensor circuit (300) comprising: first and second paths (301 a, 301 b) comprising respective first and second sensing elements (R1 a, R2a) connected between first and second supply lines (302a, 302b); an analogue to digital converter (304, 305, 306) having a differential input connected to receive a differential voltage signal (Vinp-Vinn) between the first and second sensing elements (R1 a, R2a) and an output for providing a digital output signal (Dout) representing a difference between the first and second sensing elements (R1 a, R2a), the analogue to digital converter comprising: a plurality of current sources (3110...311n) connected between the first and second supply lines (302a, 302b), each current source being switchably connected to either the first or second sensing elements (R1 a, R2a); and control logic (306) configured to selectively switch current from each of the current sources (3110...311n) to either the first path (301 a) or the second path (301 b) in dependence on the differential voltage signal (Vinp-Vinn).
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| 8 | Verfahren zur Ermittlung von Prädiktionswerten bei der DPCM-Prädiktionscodierung sowie Prädiktor und Anwendung | EP93118117.6 | 1993-11-09 | EP0599124A3 | 1995-01-11 | Mayer, Jörg, Dipl.-Ing. |
Bei der DPCM-Prädiktionscodierung von Bildsequenzen wird der Prädiktionsfehler aus zurückliegenden Prädiktionswerten ermittelt. Beim Verfahren nach der Erfindung wird im Normalfall ein aktueller Prädiktionswert (Pn) aus einem zeitlich zurückliegenden Prädiktionswert (Pn-1) und der Differenz aus zwei zurückliegenden Prädiktionswerten (Pn-1,Pn-2) ermittelt. Beim Auftreten von Kanten hingegen wird nur ein zurückliegender Prädiktionswert (Pn-1) herangezogen. Durch diese Maßnahme kann eine Oszillation des Prädiktionsfehlers unterbunden werden. |
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| 9 | INTERPOLATIVE ANALOG-TO-DIGITAL CONVERTER | EP81901383.0 | 1980-06-18 | EP0054035B1 | 1985-09-18 | APFEL, Russel Jay; ERIKSSON, Anders Gunnar; Svensson, Lars Tommy Edward |
| An interpolative analog-to-digital converter comprising an integrator (77) for integrating the difference between an input analog signal x(t) and a quantized signal q(t) to develop an integrated signal, a first comparator (78) for sampling the integrated signal at a first sampling frequency and for generating first signals of one data state when the integrated signal is positive and of another data state when the integrated signal is negative, a second comparator (91) for comparing the input signal x(t) to the quantized signal q(t) and for sampling the results of the comparison at the first sampling frequency to develop second signals of one data state when the input signal x(t) is greater than the quantized signal q(t) and of another data state when the input signal x(t) is less than the quantized signal q(t), logic circuitry (93) responsive to the first and second signals and operative to develop a plurality of signals including a sign bit signal, a shift left signal, a shift right signal and a no shift signal, a shift register (98) responsive to the shift left signal, the shift right and the no shift signal and operative to develop a series of multi-bit binary words each having a predetermined number of bits and a magnitude determined by the shift and no shift signals, a digital-to-analog converter (80) responsive to the binary words and the sign bit signal and operative to convert the binary words into the quantized signals q(t), the quantized signals q(t) being positive or negative dependant upon the data state of the sign bit, and a digital signal processor (101) for digitally filtering the series of binary words and for developing binary output signals at a frequency of at least twice the highest signal frequency in the input signal x(t). | ||||||
| 10 | Verfahren zur Codierung von Analogsignalen | EP81109277.4 | 1981-10-29 | EP0059257B1 | 1984-06-13 | Blüthgen, Björn |
| 11 | Method and apparatus for converting single-ended signals into differential signals | US14342221 | 2011-08-30 | US09531341B2 | 2016-12-27 | Neil Adams |
| An electronic apparatus comprises a first stage that functions as a single-ended to differential converter for signals in a low frequency range and a second stage that is electrically connected to the first stage and functions as a single-ended to differential converter for signals in a high frequency range. | ||||||
| 12 | Signal encoding and compression with dynamic downsampling | US14836916 | 2015-08-26 | US09520894B1 | 2016-12-13 | Amir L. Liaghati |
| A signal encoding and compression system with dynamic downsampling may include an encoder module configured to decimate a first digital signal, thereby producing a second digital signal. Each signal may then be DPCM-encoded. Decision logic may then be used to determine which encoded signal to provide as an output, based on a characteristic of the original signal. | ||||||
| 13 | Speech analyzing and synthesizing apparatus using reduced number of codes | US395204 | 1989-08-16 | US5016279A | 1991-05-14 | Shuichi Kawama; Yoshiji Fujimoto |
| A speech analyzing and synthesizing apparatus samples a speech signal and its coding section outputs one or more codes of variable length per sampling according to the differential value between two mutually adjacent sampled signals to represent this differential value. The apparatus also includes a decoding section which decodes the outputted codes to obtain the differential value and a limiting circuit for limiting the number of outputtable codes per sample according to the differential value and codes representing differential values previously outputted from the coding section. | ||||||
| 14 | Audio signal recording and reproducing apparatus utilizing digital data compression and extension | US216539 | 1988-07-08 | US4910780A | 1990-03-20 | Tsutomu Miki |
| An audio signal recording and reproducing apparatus digitizes sound into an electric audio signal, data compresses the signal into compressed data to reduce information quantity, records the compressed data into a semiconductor memory, and reproduces an audio signal from the recorded data. The apparatus includes a plurality of input compression and output extension conversion tables which are used for compression conversion of input signal and extension conversion of output signal, respectively. Input compression and output extension conversion table selection counters are count-controlled by difference data representing the change of the audio signal. The apparatus selects one among a plurality of input compression and output extension conversion tables in accordance with count values of the selection counters. The conversion tables are arranged in sequence and contain successively larger ranges of values. | ||||||
| 15 | Embedding quantization system for vector signals | US635679 | 1984-07-30 | US4639778A | 1987-01-27 | Hirohisa Yamaguchi; Kazuo Yamada |
| The DPCM (differential pulse code modulation) for color television signal transmission has been improved both in picture quality and information compression, by a vector signal quantization called embedding quantization. According to the present invention, vector signal comprising a plurality of elements is quantized while the quantized output signal is obtained after a plurality of quantization and prediction operations. Number of repetition times of the quantization and prediction is for instance equal to the number of elements composing vector signal. A vector is for instance composed of three elements relating to red, green, and blue primary signals of a color television signal. | ||||||
| 16 | Method and apparatus for signal transmission | US92520 | 1979-11-08 | US4296412A | 1981-10-20 | Jiri Mastner |
| Differential pulse code modulation (DPCM) is used for a fast digital transmission of the analog input signal. In the DPCM modulator, a difference is built between the scaled input signal and the output of a digital/analog converter, which is controlled by a digital integrator. Comparator means generate a DPCM signal with values corresponding to "no change", "up-" or "down-integration" in dependence on the amplitude and polarity of the mentioned difference. The zero-crossings of the input signal itself are detected separately and are converted into a one-bit PCM signal, having the value "reset". The DPCM and PCM signals are combined into a multi-value control signal, which is fed to the integrator and causes it to follow-up the input signal and make a reset at each zero-crossing. The multi-value control signal is coded, transmitted to the receiver side of the link and decoded. The different decoded values control an integrator in the demodulator in the same way, as in the modulator. The input signal is reconstructed by digital integration of the DPCM. The periodical reset of the receiving integrator avoids a dc offset of its output, caused in any conventional DPCM system by the initial conditions of the integrator, by transmission errors, by an offset of the modulator and so forth. | ||||||
| 17 | Apparatus for analog to digital conversion | US756539 | 1977-01-03 | US4107669A | 1978-08-15 | Stuart Keene Tewksbury |
| An input analog signal is converted to a digital output signal by an oversampled predictive DPCM coder which includes an n stage delay line in the feedback loop. The n delay line outputs are weighted by coefficients a.sub.i . . . a.sub.n selected according to the relationship ##EQU1## AND THEN SUMMED. Alternatively, the feedback loop may comprise a chain of n integrators arranged so that the signal fed back to the comparator is the sum of single, double, triple . . . n order integration. By so doing, the coder attenuates the signal power at the quantizer input while the attenuator coefficients are independent of the input signal statistics.A similar technique may also be applied in an oversampled error feedback coder, which includes a feedback loop having an n stage delay line. Here again, the delay line outputs are weighted in accordance with the above relationship. Alternatively, a chain of n integrators may be used in the coder input, and an identical chain employed in the feedback loop. By so doing, the coder attenuates the coding noise power in the signal band while the coder design is rendered independent of the quantizing error statistics. | ||||||
| 18 | Transmission system by means of time quantization and trivalent amplitude quantization | US690647 | 1976-05-27 | US4099122A | 1978-07-04 | Marinus Cornelis Willem van Buul |
| Indicated as hybrid D-PCM a new transmission system is given which is based on differential pulse code modulation (DPCM) with signal compression at the transmitter end and signal expansion at the receiver end.In the transmitter defined auxiliary information is fed to the DPCM code groups to obtain composite code groups, while in the receiver a local auxiliary signal derived from a reconstruction device is subtracted in a separating device from the received composite signal. With a particularly simple construction hybrid D-PCM is distinguished as compared with DPCM by effective perturbation reduction, in addition to which a pulse can be saved in the transmitted code groups. | ||||||
| 19 | Differential pulse coded system using shift register companding | US46187874 | 1974-04-18 | US3925731A | 1975-12-09 | BRAINARD RALPH CARTER; CANDY JAMES CHARLES |
| A digital accumulator employing a reversible shift register converts a 1-bit differential pulse code to a logarithmically companded, or n:m, pulse code. The accumulator is coupled through a digital-to-analog converter to a subtraction circuit which also receives an analog signal to be represented in the differential pulse code. Output from the subtractor is integrated and thresholded to produce the differential pulse code. A decoder using the same type of accumulator is also shown.
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| 20 | Differential pulse code communications system having dual quantization schemes | US3781686D | 1972-11-13 | US3781686A | 1973-12-25 | CHING Y |
| A differential pulse code communications system is disclosed wherein the transmitter quantizes differential signals on two quantizing scales having different numbers of levels. The combined signal is transmitted to a receiver which may either utilize the higher quality signal or re-transmit either the lower and/or higher quality signal, without re-quantization and the error associated therewith, to yet another receiver; the quality of the signal re-transmitted being determined by the bandwidth of the re-transmission channel.
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