| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 61 | Apparatus for analog to digital conversion | US756399 | 1977-01-03 | US4071842A | 1978-01-31 | Stuart Keene Tewksbury |
| An input analog signal is converted to a digital output signal by an oversampled predictive DPCM coder which includes an n stage delay line in the feedback loop. The n delay line outputs are weighted by coefficients a.sub.i . . . a.sub.n selected according to the relationship ##EQU1## AND THEN SUMMED. Alternatively, the feedback loop may comprise a chain of n integrators arranged so that the signal fed back to the comparator is the sum of single, double, triple...n order integration. By so doing, the coder attenuates the signal power at the quantizer input while the attenuator coefficients are independent of the input signal statistics.A similar technique may also be applied in an oversampled error feedback coder, which includes a feedback loop having an n stage delay line. Here again, the delay line outputs are weighted in accordance with the above relationship. Alternatively, a chain of n integrators may be used in the coder input, and an identical chain employed in the feedback loop. By so doing, the coder attenuates the coding noise power in the signal band while the coder design is rendered independent of the quantizing error statistics. | ||||||
| 62 | Apparatus for analog to digital conversion | US608524 | 1975-08-28 | US4017849A | 1977-04-12 | Stuart Keene Tewksbury |
| An input analog signal is converted to a digital output signal by an oversampled predictive DPCM coder which includes an n stage delay line in the feedback loop. The n delay line outputs are weighted by coefficients a.sub.i. . . a.sub.n selected according to the relationship ##EQU1## AND THEN SUMMED. Alternatively, the feedback loop may comprise a chain of n integrators arranged so that the signal fed back to the comparator is the sum of single, double, triple . . . n order integration. By so doing, the coder attenuates the signal power at the quantizer input while the attenuator coefficients are independent of the input signal statistics.A similar technique may also be applied in an oversampled error feedback coder, which includes a feedback loop having an n stage delay line. Here again, the delay line outputs are weighted in accordance with the above relationship. Alternatively, a chain of n integrators may be used in the coder input, and an identical chain employed in the feedback loop. By so doing, the coder attenuates the coding noise power in the signal band while the coder design is rendered independent of the quantizing error statistics. | ||||||
| 63 | Digital recording and reproducing system employing ' pcm | US26228772 | 1972-06-13 | US3921209A | 1975-11-18 | YOSHINO HIROKAZU; YAMAGUCHI TETSUO; TSUBOKA EIICHI; HATANO HIROSHI |
| A magnetic recording and reproducing system including apparatus for converting a signal to be recorded into a Delta PCM code, a sampled value being represented by n bits, and apparatus for applying a signal corresponding to each of the n bits in the form of a NRZ code to each of n magnetic heads arranged in parallel in the transverse direction of a magnetic tape, the n bits being recorded on at least n parallel tracks and being reproduced from the magnetic tape.
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| 64 | Digital encoding system | US28180772 | 1972-08-18 | US3921204A | 1975-11-18 | THOMPSON JOHN EDWARD |
| Methods of encoding in digital form an analogue signal including a modulated sub-carrier wave, such as a colour television video signal, are described in which the rate of sampling of the analogue signal is a simple factor, for example 3, times the frequency of the sub-carrier wave. The methods of encoding include comparing the instantaneous value of the analogue signal with a previously occurring value, which conveniently is spaced by one or more cycles of the sub-carrier from the instantaneous value, and then encoding the difference between the two values. From an N.T.S.C. signal the spacing between the two values may be one cycle of the sub-carrier wave, or about one line of the scan, (the actual spacing being an integral number of cycles of the sub-carrier wave, or both differences can be combined to produce a diagonal difference signal. The same spacings can be used for a PAL signal if a PAL modifier is used, otherwise a vertical spacing of two lines is necessary because of the change of phase of the sub-carrier in alternate lines. The differences from several spacings can be combined trigonometrically to synthesise a difference corresponding to a desired spacing, such as one cycle of the sub-carrier wave.
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| 65 | Differential pulse code modulation apparatus | US19219871 | 1971-10-26 | US3825831A | 1974-07-23 | ISHIGURO T |
| A differential pulse code modulator includes a delta modulator for converting an analog input signal to a delta modulated signal, a digital filter for removing quantizing noise components, and a direct feedback pulse code modulation encoder. The feedback encoder includes a subtractor for determining the difference between a decoded digital signal and the output of the digital filter, a digital integrator for integrating the output of the subtractor, a digital coder for converting the output of the integrator to a differential pulse code modulation signal and a digital decoder for converting the differential signal to the decoded digital signal supplied to the subtractor. Clock pulses are supplied to the delta modulator, the digital filter, and the direct feedback pulse code modulation encoder.
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| 66 | Differential pulse code communications system having dual quantization schemes | US3781685D | 1972-11-13 | US3781685A | 1973-12-25 | CHING Y |
| A differential pulse code communications system is disclosed in which a digital difference signal having a higher number of quantization levels is transmitted to a distant receiver wherein the received higher grade quality digital signal is degraded, for re-transmission, to a digital signal having a lesser number of quantization levels without introducing an additional quantization error component into the system. In the transmitter, the transmitted higher grade quality difference signals are degraded to the lower grade quality digital signals before being digitally accumulated for subtraction from the input signal. At the receiver, the higher grade quality transmitted difference signals are similarly degraded to the lower grade quality digital signals and digitally accumulated. The higher grade quality reconstruction of the input signal is obtained by summing the received higher grade quality difference signal plus the accumulated lower grade quality digital signals. The lower grade quality digital difference signal derived from the higher grade quality digital signal may be re-transmitted to another distant location with a quantization error equivalent to the error introduced by quantizing the input signal to a difference signal having the fewer number of quantization levels.
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| 67 | Coding of sign information in dpcm systems | US3689840D | 1971-04-29 | US3689840A | 1972-09-05 | BROWN EARL FRANKLIN; KAMINSKI WILLIAM |
| A differential pulse code modulation system substantially reduces sign redundancy by transmitting sign information only for actual changes in polarity between differential samples. Upon the occurrence of a change in sign when both differential samples of opposite sign do not exceed a predetermined level, one of two polarity words is transmitted in place of the code word that represents the differential sample with the smaller magnitude. One polarity word indicates a positive polarity while the other word indicates a negative polarity. Only the absolute magnitudes of the differential samples are transmitted between sign changes. When both differential samples of opposite sign exceed a predetermined level, the absolute magnitude is transmitted for both differential samples and a run-length code work indicative of the location of the change in sign together with a polarity word are transmitted at a later time.
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| 68 | Sign prediction coding for pulse code communication systems | US3593141D | 1969-09-26 | US3593141A | 1971-07-13 | BROWN EARL F; KAMINSKI WILLIAM; LIMB JOHN O; MOUNTS FRANK W |
| A differential pulse code communication system is disclosed with sign prediction coding which reduces the number of digits required to describe the levels produced in the quantization of the differential signal. In the system the sign of the largest positive and negative levels of the quantizer are predicted by assuming that they have the same sign as the previous level. If the prediction is wrong a lower level with the correct sign is transmitted rather than the level with the predicted sign. Because of the prediction, additional levels may be added in the quantizer in the space otherwise reserved for the signs predicted without increasing the pulse rate of the system.
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| 69 | Reversible analog to digital converter | US28062463 | 1963-05-15 | US3251052A | 1966-05-10 | HOFFMAN PHILIP A; EGERTON JR MCKENNY W |
| 70 | Analog-to-digital converter | US6651260 | 1960-11-01 | US3127601A | 1964-03-31 | KAENEL REGINALD A |
| 71 | Reduction of quantizing error in quantized transmission systems | US70543457 | 1957-12-26 | US3048781A | 1962-08-07 | GLASER JOHN L |
| 72 | Analog-to-digital converter system | US41012054 | 1954-02-15 | US2927312A | 1960-03-01 | RENE PIEL GERARD JEAN |
| 73 | DIGITAL TO ANALOGUE CONVERSION | EP16726634.5 | 2016-05-26 | EP3304745A1 | 2018-04-11 | STUART, John Robert |
| Devices and methods for digital to analogue conversion (DAC) are provided, in which the analogue outputs of an even number of digital to analogue converters are combined. The individual converters operate on the same data but there is a relative time delay between the input digital signal received by one or more of the converters and the input digital signal received by other of the converters, wherein the delay is a fraction of the data sample period. Moreover, the data signal fed to half of the converters has an inverse relationship with the data signal fed to the other half of the converters and their analogue outputs are subtracted. Dither and filtering techniques may also be employed. | ||||||
| 74 | An audio signal recording and reproducing apparatus | EP88306344.8 | 1988-07-12 | EP0299711A3 | 1989-09-20 | Miki, Tsutomu Mitsubishi Denki Kabushiki Kaisha |
An audio signal recording and reproducing apparatus which digitizes sound into an electric audio signal, and data compresses so as to reduce information quantity, and records the same into a semiconductor memory (31) and reproduces an audio signal from the recorded data, includes a plurality of input compression and output extention conversion tables (29, 33) which are used for compression conversion of input signal and extention conversion of output signal, respectively, and input compression and output extention conversion table selection counters (27, 34) which are count-controlled by the difference data representing the change of the audio signal and selects one among a plurality of input compression and output extention conversion tables (29, 33) in accordance with its count value. |
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| 75 | An audio signal recording and reproducing apparatus | EP88306344.8 | 1988-07-12 | EP0299711A2 | 1989-01-18 | Miki, Tsutomu Mitsubishi Denki Kabushiki Kaisha |
An audio signal recording and reproducing apparatus which digitizes sound into an electric audio signal, and data compresses so as to reduce information quantity, and records the same into a semiconductor memory (31) and reproduces an audio signal from the recorded data, includes a plurality of input compression and output extention conversion tables (29, 33) which are used for compression conversion of input signal and extention conversion of output signal, respectively, and input compression and output extention conversion table selection counters (27, 34) which are count-controlled by the difference data representing the change of the audio signal and selects one among a plurality of input compression and output extention conversion tables (29, 33) in accordance with its count value. |
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| 76 | Analog-Digital-Wandler | EP85103049.4 | 1985-03-16 | EP0158841A1 | 1985-10-23 | Lanz, Otto E.; Maschek, Martin; Mastner, Georg, Dr. |
Ein erster Diskriminator (7a) vergleicht die Eingangsspannung mit der Ausgangsspannung eines einem digitalen Integrator (1) nachgeschalteten Digital-Analog-Wandlers (3) und bewirkt Vorwärts- oder Rückwärtszählen des digitalen Integrators (1) um ein niedrigstwertiges Bit, falls die Eingangsspannung um mehr als etwa die Hälfte der einem niedrigstwertigen Bit entsprechenden Spannung tiefer oder höher liegt. Zwecks Verbesserung der Nachführung des digitalen Ausgangssignals bei raschen Schwankungen der Eingangsspannung sprechen zusätzliche Fensterdiskriminatoren (7b, 7c) an, wenn die Eingangsspannung von der Ausgangsspannung des Digital-Analog-Wandlers (3) um mehr als das 10-fache bzw. das 150-fache der einem niedrigstwertigen Bit entsprechenden Spannung abweicht. Sie bewirken dann Vorwärts- oder Rückwärts-Zählen des als dreistufige Kaskade von 4-Bit-Vorwärts-Rückwärts-Zählern (2a, 2b, 2c) ausgebildeten Integrators (1) um ein Bit mit der Wertigkeit 24 bzw. 28. Der Analog-Digital-Wandler eignet sich besonders zur Verarbeitung des Ausgangssignals eines Strom- oder Spannungs-wandlers. |
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| 77 | Verfahren zur Codierung von Analogsignalen | EP80106050.0 | 1980-10-06 | EP0027233B1 | 1983-08-24 | Blüthgen Björn |
| 78 | INTERPOLATIVE ANALOG-TO-DIGITAL CONVERTER. | EP81901383 | 1980-06-18 | EP0054035A4 | 1982-12-09 | APFEL RUSSEL JAY; ERIKSSON ANDERS GUNNAR; SVENSSON LARS TOMMY EDWARD |
| 79 | Verfahren zur Codierung von Analogsignalen | EP81109277.4 | 1981-10-29 | EP0059257A1 | 1982-09-08 | Blüthgen, Björn |
Bei dem im Patent 29 41 452 angegebenen Verfahren werden zur Reduzierung des digitalen Signalflusses von codierten Analogsignalen Differenzen aufeinanderfolgender PCM-Codeworte gebildet, deren Länge durch ein relativ kurzes Referenzcodewort vorgegeben ist. Die PCM-Differenzcodeworte mit hinsichtlich des Referenzcodewortes auftretender Überlänge werden dabei entweder durch kompandierte PCM-Differenzcodeworte oder aber durch PCM-Worte angepaßter Länge dargestellt, wobei ein solches PCM-Codewort entweder als kompandiertes PCM-Codewort oder aber durch gruppenweise Aufteilung seiner Codeelemente auf zwei aufeinander folgende Codeworte gebildet wird. Die Erfindung betrifft eine Weiterbildung dieses Verfahrens, wobei im Zuge der Reduktion des digitalen Signalflusses PCM-Differenzcodeworte durch PCM-Codeworte dann ersetzt werden, wenn der zugehörige Signalinhalt einschließlich der für die Markierung der verschiedenen Codeworte erforderlichen Hilfscodeelemente den durch das Referenzcodewort vorgegebenen Codeelementerahmen nicht überschreitet und bei vernachlässigbar geringer bzw. Null-Signaldifferenz zweier Abtastwerte mit einem den vorgegebenen Übertragungsrahmen überschreitenden Amplitudenwert, ein einzelner Amplitudenwert als ein auf zwei Übertragungs-Codeworte verteiltes PCM-Wort übertragen wird. Um hierbei für die Markierung der verschiedenen Codeworte mit jeweils einem Hilfscodeelement auszukommen, wird von einer Kontrollbit-Sequenz Gebrauch gemacht. |
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| 80 | INTERPOLATIVE ANALOG-TO-DIGITAL CONVERTER FOR SUSCRIBER LINE AUDIO PROCESSING CIRCUIT APPARATUS | EP81901383.0 | 1980-06-18 | EP0054035A1 | 1982-06-23 | APFEL, Russel Jay; ERIKSSON, Anders Gunnar; Svensson, Lars Tommy Edward |
| Convertisseur analogique/numerique d'interpolation comprenant un integrateur (77) pour integrer la difference entre un signal analogique x(t) d'entree et un signal q(t) quantifie de maniere a developper un signal integre, un premier comparateur (78) pour echantillonner le signal integre a une premiere frequence d'echantillonnage et pour produire les premiers signaux d'un etat de donnees lorsque le signal integre est positif et d'un autre etat de donnees lorsque le signal integre est negatif, un deuxieme comparateur (91) pour comparer le signal x(t) d'entree au signal q(t) quantifie et pour echantillonner les resultats de la comparaison a la premiere frequence d'echantillonnage pour developper les deuxiemes signaux d'un etat de donnees lorsque le signal x(t) d'entree est plus grand que le signal q(t) quantifie et d'un autre etat de donnees lorsque le signal x(t) est inferieur au signal q(t) quantifie, des circuits logiques (93) sensibles au premier et au deuxieme signaux et servant a developper une pluralite de signaux comprenant un signal de bit de signe, un signal de decalage a gauche, un signal de decalage a droite et un signal de non-decalage, un registre a decalage (98) sensible au signal de decalage a gauche, de decalage a droite et de non-decalage et servant a developper une serie de mots binaires multibits possedant chacun un nombre predetermine de bits et une grandeur determinee par les signaux de decalage et de non-decalage, un convertisseur (80) numerique/analogique sensible aux mots binaires et au signal de bit de signe et servant a convertir les mots binaires en signaux q(t) quantifies, les signaux q(t) quantifies etant positifs ou negatifs suivant l'etat de donnees du bit de signe, et un processeur (101) de signaux numeriques servant a filtrer de maniere numerique les series de mots binaires et a developper des signaux numeriques de sortie a une frequence au moins deux fois plus elevee que la frequence la plus elevee dans le signal x(t) d'entree. | ||||||
