| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 101 | Data decoding device and its method | JP28456897 | 1997-10-01 | JPH11112361A | 1999-04-23 | WATANABE MASATOSHI |
| PROBLEM TO BE SOLVED: To always set optimum initial weight in soft judgment Viterbi decoding at a floating point and to execute the Viterbi decoding of high error correction ability. SOLUTION: A reception signal l is inputted to a one frame memory 2 and an initial weight operation part 3. The one frame memory 2 delays the reception signal 1 by one frame and inputs it to a floating point ACS processing part 4. The initial weight operation part 3 integrates the amplitude of the reception signal 1 by one frame and inputs it to the floating point ACS processing part 4. The floating point ACS processing part 4 executes an ACS processing with input from the initial weight operation part 3 as initial weight and inputs a path selection result to a trace-back processing part 5. The trace-back processing part 5 reproduces the state transition of an encoder based on input from the floating point ACS processing part 4 and outputs a decoding information system 6. COPYRIGHT: (C)1999,JPO | ||||||
| 102 | Error processing method and apparatus of Adpcm voice transmission system | JP11023595 | 1995-04-12 | JP2789578B2 | 1998-08-20 | HATSUTORI TAKESHI |
| 103 | Error correction code decoding method and circuit adopting this method | JP13246195 | 1995-05-30 | JPH08330975A | 1996-12-13 | YOSHIDA HIDEO |
| PURPOSE: To omit a redundant circuit to detect and correct the error with a simple constitution and to improve the reliability of error correction code decoding by handling only data of the size of an information symbol at the time of encoding and decoding the Reed Solomon code constituted on a symbol larger than the information symbol. CONSTITUTION: 2-bit dummy data as remainder bits out of 10 bits of one symbol of information is given to 8-bit input data from a dummy data input circuit 2. Meanwhile, syndrome data based on excess of a check symbol is generated by a syndrome data correction circuit 3. One of 10-bit data is selected by a selector 4 and is given to a Galois field addition circuit 5. The output of the Galois field addition circuit 5 is outputted to a register 7, and the output of this register 7 is given to the Galois field addition circuit 5 through a Galois field coefficient multiplication circuit 8 or directly by a selector 6. The output of the register 7 is outputted as syndrome data from a syndrome output terminal 9. | ||||||
| 104 | Data decoding method | JP7472795 | 1995-03-08 | JPH07273671A | 1995-10-20 | HOONGUUDAA RIN |
| PURPOSE: To actualize the decoding of a high-rate trellis code with good area efficiency. CONSTITUTION: Code states are assigned to respective process elements 135. Then the calculation of new path metrics in a process element is scheduled by using calculated path metrics and branch metrics which are different by encoded data, Further, access to the calculated path metrics from respective process elements 135 is scheduled so that some of the calculated path metrics are accessed in order. A survival sequence of the path metrics calculated according to the alcove-mentioned scheduling is used to evaluate data before encoding. Further, the path metrics are rearrayed after calculation so as to facilitate access in subsequent calculation. This method divides data points corresponding to the path metrics into several slots and replaces the data points so that data points occupying incorrect slot positions to other slot positions. | ||||||
| 105 | Error correcting method | US14953422 | 2015-11-30 | US10097214B2 | 2018-10-09 | Chih-Ming Chang; Kuang-Shine Yang; Ho-Chung Fu; Ying-Cherng Lu |
| An error correcting method is provided, which includes the following steps. An error value is obtained. The error value is substituted into an error correcting function, so that the error correcting function causes the error value to converge to 0 in a finite time. The error correcting function conforms to a non-Lipschitzian characteristic. An embodiment of the disclosure solves the problem in traditional system stability analysis through a differential equation, adjusts parameters to determine a convergence time, and ensures that a convergence target fully conforms to an expected value and that a unique solution of the error value is 0. | ||||||
| 106 | MANAGING INTEGRITY OF FRAMED PAYLOADS USING REDUNDANT SIGNALS | US15622039 | 2017-06-13 | US20170346600A1 | 2017-11-30 | Sergio Licardie; Rishipal Arya; Robert Brown |
| A frame error correction circuit may identify and correct errors in data frames provided to a receiver as part of a diversity communications scheme. The frame error correction circuit may further align the data frames so that the data frames can be compared. The frame error correction circuit may perform a bit-wise comparison of the data frames and identify inconsistent bit positions where bits in the data frames differ from one another. Once inconsistent bit positions have been identified, the frame error correction circuit may access a permutation table of permutations of bits at the inconsistent bit positions. In some implementations, the frame error correction circuit uses the permutation table to reassemble permutations of the data frames. In various implementations, the frame error correction circuit performs a CRC of each permutation of the data frames, and provides a valid permutation to a network. | ||||||
| 107 | MATCHED SYNDROME ERROR CORRECTION | US14746356 | 2015-06-22 | US20160371141A1 | 2016-12-22 | Andrew David Daniel |
| A system and method are disclosed for detecting and correcting data errors. The system analyzes a transmitted data stream and generates a transmitted primary code from the transmitted data stream. The transmitted primary code may be sent in association with the transmitted data stream. The system further analyzes the data stream as received and generates a received primary code from the received data stream. Comparison of the transmitted and received primary codes may be used to detect and correct one bit and generally multiple bit data errors in the received data stream. | ||||||
| 108 | SYSTEMS AND METHODS FOR ERROR CORRECTION IN STRUCTURED LIGHT | US14820419 | 2015-08-06 | US20160255332A1 | 2016-09-01 | James Wilson Nash; Kalin Mitkov Atanassov; Sergiu Radu Goma |
| Systems and methods for error correction in structured light are disclosed. In one aspect, a method includes receiving, via a receiver sensor, a structured light image of at least a portion of a composite code mask encoding a plurality of codewords, the image including an invalid codeword. The method further includes detecting the invalid codeword. The method further includes generating a plurality of candidate codewords based on the invalid codeword. The method further includes selecting one of the plurality of candidate codewords to replace the invalid codeword. The method further includes generating a depth map for an image of the scene based on the selected candidate codeword. The method further includes generating a digital representation of a scene based on the depth map. The method further includes outputting the digital representation of the scene to an output device. | ||||||
| 109 | MANAGING INTEGRITY OF FRAMED PAYLOADS USING REDUNDANT SIGNALS | US14948203 | 2015-11-20 | US20160147595A1 | 2016-05-26 | Sergio Licardie; Rishipal Arya; Robert Brown |
| A frame error correction circuit may identify and correct errors in data frames provided to a receiver as part of a diversity communications scheme. The frame error correction circuit may further align the data frames so that the data frames can be compared. The frame error correction circuit may perform a bit-wise comparison of the data frames and identify inconsistent bit positions where bits in the data frames differ from one another. Once inconsistent bit positions have been identified, the frame error correction circuit may access a permutation table of permutations of bits at the inconsistent bit positions. In some implementations, the frame error correction circuit uses the permutation table to reassemble permutations of the data frames. In various implementations, the frame error correction circuit performs a CRC of each permutation of the data frames, and provides a valid permutation to a network. | ||||||
| 110 | Optimal period rate matching for turbo coding | US14522257 | 2014-10-23 | US09203443B2 | 2015-12-01 | Ba-Zhong Shen; Tak K. Lee |
| Optimal period rate matching for turbo coding. A means is provided herein by which a nearly optimal (e.g., optimal for one block size and sub-optimal for others) periodic puncturing pattern that depends on a mother code. Any desired rate matching can be achieved using the means and approaches presented herein to ensure an appropriate rate of an encoded block output from a turbo encoder so that the subsequently modulated signal generated there from has the appropriate rate. In addition, some embodiments can also employ shifting for another design level available in accordance with puncturing employed to provide for periodic rate matching. Selectivity can also be employed, such that, a first periodic puncturing pattern can be applied at a first time to ensure a first rate, and a second periodic puncturing pattern can be applied at a second time to ensure a second rate. | ||||||
| 111 | METHOD AND SYSTEM FOR ESTIMATING PARAMETER OF DATA CHANNEL MODEL IN COMMUNICATION SYSTEM | US14593417 | 2015-01-09 | US20150200684A1 | 2015-07-16 | Oleksandr KANIEVSKYI; Mykola RAIEVSKYI; Oleg KOPYSOV; Roman HUSH |
| A method and a system for estimating a parameter in a communication system are provided. The method includes estimating a parameter of a data channel model in a communication system, decoding a packet received through a determined noise channel to convert the packet into data indicating one of a success and failure of a reception of the packet, configuring a prototype channel having at least one unknown parameter, estimating the at least one unknown parameter using the data indicating the one of the success and the failure of the reception of the packet, and determining the size of a parity field of a forward error correction (FEC) symbol, using the estimated at least one unknown parameter. | ||||||
| 112 | Method and arrangement for conveying additional bits in a communication system | US13381612 | 2011-10-18 | US09077530B2 | 2015-07-07 | Erik Larsson |
| Methods and nodes in a communication system for conveying N additional bits with a block of data. A method in an encoding node involves determining the respective value of the N additional bits, and selecting a code based on the N values. The block of data is then encoded by use of the selected code. A method in a decoding node involves determining which code, from a predetermined set of candidate codes associated with different possible combinations of values of the N additional bits, that was used for encoding the block of data. The respective values of the N additional bits are then determined based on the determined code. The methods and nodes enable that the N additional bits may be conveyed and determined in the decoding node in an efficient way, without decoding the block of data and at low computational complexity. | ||||||
| 113 | Data encoding methods, data decoding methods, data reconstruction methods, data encoding devices, data decoding devices, and data reconstruction devices | US13809823 | 2010-12-08 | US08928503B2 | 2015-01-06 | Frederique Oggier; Anwitaman Datta |
| In an embodiment, a data encoding method may be provided. The data encoding method may include: inputting data to be encoded; determining a polynomial so that an evaluation of the polynomial at a sum of a first supporting point of the polynomial and a second supporting point of the polynomial corresponds to the sum of an evaluation of the polynomial at the first supporting point and an evaluation of the polynomial at the second supporting point, wherein coefficients of the polynomial are determined based on the data to be encoded; and generating a plurality of encoded data items by evaluating the polynomial at a plurality of supporting points. | ||||||
| 114 | Methods and apparatus for computing soft data or log likelihood ratios for received values in communication or storage systems | US12751966 | 2010-03-31 | US08775913B2 | 2014-07-08 | Erich F. Haratsch; Nenad Miladinovic; Andrei Vityaev |
| Methods and apparatus are provided for computing soft data or log likelihood ratios for received values in communication or storage systems. Soft data values or log likelihood ratios are computed for received values in a communication system or a memory device by obtaining at least one received value; identifying a segment of a function corresponding to the received value, wherein the function is defined over a plurality of segments, wherein each of the segments has an associated set of parameters; and calculating the soft data value or log likelihood ratio using the set of parameters associated with the identified segment. The computed soft data values or log likelihood ratios are optionally provided to a decoder. | ||||||
| 115 | Data processing system with failure recovery | US13465214 | 2012-05-07 | US08775897B2 | 2014-07-08 | Chung-Li Wang; Lei Chen; Fan Zhang; Shaohua Yang; Johnson Yen |
| Various embodiments of the present invention provide systems and methods for a data processing system with failure recovery. For example, a data processing system is disclosed that includes a data processing circuit operable to process a block of data from an input and to yield a plurality of possible results based on the block of data, and an error detection circuit operable to test the plurality of possible results for errors and to report to the data processing circuit whether the plurality of possible results contain errors. The data processing system is operable to output any of the possible results in which the error detection circuit found no errors. | ||||||
| 116 | Encoding device, controller and system including the same | US13012304 | 2011-01-24 | US08621333B2 | 2013-12-31 | Ki-Jun Lee; Jun-Jin Kong; Hong-Rak Son; Hyung-June Kim; Dong-Joon Shin; Sung-Han Jung; Sung-Rae Kim |
| An encoding device includes an encoder and a puncturing unit. The encoder generates parity bits based on information bits. The puncturing unit punctures the parity bits based on a puncturing pattern complying with a first criterion determining a period of the puncturing pattern and a second criterion determining positions of remaining parity bits. | ||||||
| 117 | ERROR DETECTION AND OFFSET CANCELLATION DURING MULTI-WIRE COMMUNICATION | US13914091 | 2013-06-10 | US20130346822A1 | 2013-12-26 | Jade M. Kizer; John Wilson; Lei Luo; Frederick A. Ware; Jared L. Zerbe |
| Embodiments of a circuit are described. In this circuit, a receive circuit includes M input nodes that receive a set of M symbols on M links during a time interval, where the set of M symbols are associated with a codeword. Moreover, the receive circuit includes a decoder, coupled to the M input nodes, that determines the codeword in a code space based on the set of M symbols and that decodes the codeword to a corresponding set of N decoded symbols. Additionally, the receive circuit may include a detector that detects an imbalance in a number of instances of a first value in the set of M symbols and a number of instances of a second value in the set of M symbols, and, if an imbalance is detected, that asserts an error condition. | ||||||
| 118 | Method and apparatus for storing data | US13020318 | 2011-02-03 | US08533566B2 | 2013-09-10 | Ulrich Backhausen; Michael Goessel; Thomas Kern; Thomas Rabenalt |
| When coding user data, it may be desirable to mark user data as invalid. This may arise, by way of example, in applications in which a stored data item needs to be updated by virtue of an updated data item additionally being stored and the old stored data item being marked as invalid. In order to mark the invalidity of a stored data item by means of the value of the data item and to be able to apply an error-recognizing or error-correcting coding dependably, the user data are extended by supplementary data and the coding is applied to the extended user data. | ||||||
| 119 | Method and system for decoding low density parity check codes | US12510899 | 2009-07-28 | US08392789B2 | 2013-03-05 | Eric Biscondi; David Hoyle; Tod David Wolf |
| A method for decoding a codeword in a data stream encoded according to a low density parity check (LDPC) code having an m×j parity check matrix H by initializing variable nodes with soft values based on symbols in the codeword, wherein a graph representation of H includes m check nodes and j variable nodes, and wherein a check node m provides a row value estimate to a variable node j and a variable node j provides a column value estimate to a check node m if H(m,j) contains a 1, computing row value estimates for each check node, wherein amplitudes of only a subset of column value estimates provided to the check node are computed, computing soft values for each variable node based on the computed row value estimates, determining whether the codeword is decoded based on the soft values, and terminating decoding when the codeword is decoded. | ||||||
| 120 | Method for assigning and utilizing forward error correcting (FEC) codes | US12415596 | 2009-03-31 | US08281216B2 | 2012-10-02 | Sanjay G. Desai; Kevin G. Doberstein; Harish Natarahjan |
| An assignment scheme exploits the Media Access Control (MAC) layer protocol features under various MAC layer call scenarios. In one embodiment, the Hamming distance between pairs of critical Data Units are assigned to codewords with a minimum distance of dmin2=8 bits, thereby increasing the hard decision error correcting capability from 1 bit to 3 bits when deciding between these pairs of Data Units. The method for assigning data unit identification (DUID) codes by a radio operating within a wireless communication system includes determining by the radio whether an expected burst is a 4 Voice Burst with Encryption Synchronization Signaling (4V); when the expected burst is 4V, decoding the DUID within the received burst using an increased minimum distance; and when the expected burst is not 4V, decoding the DUID within the received burst using a minimum distance. | ||||||
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