| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 41 | AMPLIFIER WITH BASE CURRENT REUSE | EP15185853.7 | 2015-09-18 | EP2999114A1 | 2016-03-23 | Lehtola, Phillip John |
An RF amplifier module (10) that has a plurality of amplifiers (32a, 32b) wherein at least one of the amplifiers (32a, 32b) is powered via an envelope tracking module (22). The biasing input of at least one of the amplifiers (32a, 32b) is provided to the first amplifier (32a) to power the first amplifier (32a) to reduce power consumption. The first amplifier (32a) may also be powered via fixed biasing (21) to provide greater stability of the module (10).
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| 42 | STACKED BUFFERS | EP07810915.4 | 2007-07-31 | EP2047593A1 | 2009-04-15 | SINGER, Lawrence, A.; KAPUSTA, Ronald, A. |
| Two or more buffers may configured and arranged such that a quiescent current that flows through and biases a first buffer also flows through and biases a second buffer. The first and second buffers may, for example, be source followers used as reference buffers that drive inputs of a switched-capacitor circuit. | ||||||
| 43 | System and method for dynamic drain voltage adjustment to control linearity, output power, and efficiency in RF power amplifiers | EP08151486.1 | 2008-02-15 | EP1959564A3 | 2008-11-19 | Nguyen, Dung C.; Yoon, Soon K.; Khanifar, Ahmad; Devendorf, Don. C. |
A system and method for dynamic adjustment of drain or collector voltage of a power amplifier (PA), including a PA having a voltage input, a temperature sensor (616) measuring ambient temperature of the PA, and an adaptive PA control processor (608) that dynamically changes the input voltage based on the ambient temperature, achieving a desired peak power when the system is subjected to high temperatures. In a further embodiment, a power sensor (614) measures output power of the PA, and the control processor (608) dynamically changes the voltage based on output power when the system serves a large cell in a mobile communication infrastructure employing high power. In a further embodiment, a multistage PA and method include amplifier stages having drain or collector voltage inputs, wherein a voltage applied to the inputs are set so as to be proportional to the peak power requirements of each stage, enhancing overall efficiency.
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| 44 | AN AMPLIFIER CIRCUIT, A TRANSMITTER AND A WIRELESS TELEPHONE | EP98900041.0 | 1998-01-15 | EP0891650A2 | 1999-01-20 | VISSER, Hendrik, Arend |
| An amplifier circuit, particularly for RF-purposes comprises: a main current stream of a controllable RF-semiconductor device having a control input, a control means having a control output coupled to the control input for controlling the main current stream, and a compensation circuit having a compensation output coupled to the control input for compensating the controllable semiconductor device. The compensation circuit is constructed so as to be temporarily active during a period of time wherein the control means do not supply a control output signal to the control input of the controllable semiconductor device. This provides a suitable solution for IC's and for dealing with DC-adjustment disturbances in a low DC-current dissipating manner caused by a lack of pull-down capability when the amplifier circuit operates at very high frequencies or at relatively large amplitudes. | ||||||
| 45 | LNA with programmable linearity | US15272103 | 2016-09-21 | US09929701B1 | 2018-03-27 | Hossein Noori; Chih-Chieh Cheng |
| A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” input stage and a “common gate” output stage can be turned on or off using the gate of the output stage. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input stage of each cascode. Further switches used for switching degeneration inductors, gate/sources caps and gate to ground caps for each legs can be used to further improve the matching performance of the invention. | ||||||
| 46 | DIFFERENTIAL AMPLIFIERS | US15536242 | 2015-12-14 | US20170353165A1 | 2017-12-07 | Phil CORBISHLEY |
| A differential amplifier comprises: a long tailed pair transistor configuration comprising a differential pair of transistors and a tail transistor; and a replica circuit configured to vary a feedback current in the replica circuit to match a replica voltage to a reference voltage, wherein varying the feedback current in the replica circuit 4 provides a bias voltage to the tail transistor in the long tailed pair which controls a tail current through the tail transistor to determine a common mode voltage in the long tailed pair. | ||||||
| 47 | Constant transconductance bias circuit | US15202193 | 2016-07-05 | US09729113B2 | 2017-08-08 | Yu-Jiu Wang; Ching-Yun Chu |
| A bias circuit is adapted for biasing a to-be-biased transconductance cell such that the to-be-biased transconductance cell has a constant transconductance, and includes a converter and a controller. The converter receives first and second current signals, and generates, based on the first and second current signals, a first voltage signal, a second voltage signal and a bias voltage that is for biasing the to-be-biased transconductance cell. The controller receives the first and second voltage signals from the converter, generates the first and second current signals for the converter based on the first and second voltage signals so as to make a magnitude of the first voltage signal equal a magnitude of the second voltage signal. | ||||||
| 48 | AMPLIFIER WITH BASE CURRENT REUSE | US15418434 | 2017-01-27 | US20170207752A1 | 2017-07-20 | Philip John Lehtola |
| An RF amplifier module that has a plurality of amplifiers wherein at least one of the amplifiers is powered via an envelope tracking module. The biasing input of at least one of the amplifiers is provided to the first amplifier to power the first amplifier to reduce power consumption. The first amplifier may also be powered via fixed biasing to provide greater stability of the module. | ||||||
| 49 | Memory effect reduction using low impedance biasing | US15207362 | 2016-07-11 | US09705454B2 | 2017-07-11 | David M. Signoff; Ming He; Wayne A. Loeb |
| A circuit includes a bias circuit for a biased transistor. The bias circuit includes a master-slave source follower circuit, a reference transistor, and a bias circuit voltage output coupled to the biased transistor and configured to provide a bias voltage. The reference transistor has a transconductance substantially identical to a transconductance of the biased transistor. A signal ground circuit may be coupled between the biased transistor and one or more components of the bias circuit that do not generate significant return currents to a power supply ground. A method includes generating a current in a reference transistor according to a first voltage generated using a master source follower circuit, generating a second voltage substantially identical to the first voltage using a slave source follower circuit, and providing the second voltage to a biased transistor. The reference transistor has a transconductance substantially identical to a transconductance of the biased transistor. | ||||||
| 50 | BASEBAND FILTERS AND INTERFACES BETWEEN A DIGITAL-TO-ANALOG CONVERTER AND A BASEBAND FILTER | US14941419 | 2015-11-13 | US20170141760A1 | 2017-05-18 | Ibrahim Chamas |
| Exemplary embodiments of the present disclosure are related to baseband filters. A device may include a digital-to-analog converter (DAC) configured to output a DC current. The device may also include an operational amplifier coupled to an output of the DAC and configured to bias an input stage of the operational amplifier with the DC current. | ||||||
| 51 | Amplifier with base current reuse | US14855058 | 2015-09-15 | US09602056B2 | 2017-03-21 | Philip John Lehtola |
| An RF amplifier module that has a plurality of amplifiers wherein at least one of the amplifiers is powered via an envelope tracking module. The biasing input of at least one of the amplifiers is provided to the first amplifier to power the first amplifier to reduce power consumption. The first amplifier may also be powered via fixed biasing to provide greater stability of the module. | ||||||
| 52 | Memory effect reduction using low impedance biasing | US14532816 | 2014-11-04 | US09417641B2 | 2016-08-16 | David M. Signoff; Ming He; Wayne A. Loeb |
| A circuit includes a bias circuit for a biased transistor. The bias circuit includes a master-slave source follower circuit, a reference transistor, and a bias circuit voltage output coupled to the biased transistor and configured to provide a bias voltage. The reference transistor has a transconductance substantially identical to a transconductance of the biased transistor. A signal ground circuit may be coupled between the biased transistor and one or more components of the bias circuit that do not generate significant return currents to a power supply ground. A method includes generating a current in a reference transistor according to a first voltage generated using a master source follower circuit, generating a second voltage substantially identical to the first voltage using a slave source follower circuit, and providing the second voltage to a biased transistor. The reference transistor has a transconductance substantially identical to a transconductance of the biased transistor. | ||||||
| 53 | PPA linearization | US14187480 | 2014-02-24 | US09385665B2 | 2016-07-05 | Ossi Toivonen; Sami Vilhonen |
| A linearization circuit improves the linearity of a power amplifier based on an envelope of an input RF signal. The linearization circuit comprises an RF signal generation circuit, a replica circuit, and an adaptive amplifier. The RF signal generation circuit generates the RF signal from a phase and an amplitude of an input digital signal. The replica circuit extracts the envelope from the RF signal and generates a sensing voltage based on the extracted envelope. The adaptive amplifier generates an adaptive bias voltage for the power amplifier based on the sensing voltage, and applies the adaptive bias voltage to the power amplifier and to the replica circuit to improve the linearity of the power amplifier by regulating the power amplifier and the replica circuit according to the envelope. | ||||||
| 54 | PPA Linearization | US14187480 | 2014-02-24 | US20150244328A1 | 2015-08-27 | Ossi Toivonen; Sami Vilhonen |
| A linearization circuit improves the linearity of a power amplifier based on an envelope of an input RF signal. The linearization circuit comprises an RF signal generation circuit, a replica circuit, and an adaptive amplifier. The RF signal generation circuit generates the RF signal from a phase and an amplitude of an input digital signal. The replica circuit extracts the envelope from the RF signal and generates a sensing voltage based on the extracted envelope. The adaptive amplifier generates an adaptive bias voltage for the power amplifier based on the sensing voltage, and applies the adaptive bias voltage to the power amplifier and to the replica circuit to improve the linearity of the power amplifier by regulating the power amplifier and the replica circuit according to the envelope. | ||||||
| 55 | METHOD AND SYSTEM FOR PROVIDING AUTOMATIC GATE BIAS AND BIAS SEQUENCING FOR FIELD EFFECT TRANSISTORS | US14149468 | 2014-01-07 | US20140333382A1 | 2014-11-13 | Llyod L. Lautzenhiser |
| A feedback gate bias circuit for use in radio frequency amplifiers to more effectively control operation of LDFET, GaNFET, GaAsFET, and JFET type transistors used in such circuits. A transistor gate bias circuit that senses drain current and automatically adjusts or biases the gate voltage to maintain drain current independently of temperature, time, input drive, frequency, as well as from device to device variations. Additional circuits to provide temperature compensation, RF power monitoring and drain current control, RF output power leveler, high power gain block, and optional digital control of various functions. A gate bias circuit including a bias sequencer and negative voltage deriver for operation of N-channel depletion mode devices. | ||||||
| 56 | Amplifier with non-linear current mirror | US13343521 | 2012-01-04 | US08648660B2 | 2014-02-11 | Carlo Fiocchi |
| An amplifier with a non-linear current mirror comprises an amplification stage having an input terminal for an input signal as well as an output stage coupled to the amplification stage by a current mirror stage. The current mirror stage comprises at least one mirror transistor coupled to the amplification stage and at least one output transistor coupled to the output stage. The amplifier comprises two variable resistive elements, each of them connected in series to one of the mirror transistor and the output transistor. A tuning stage is adapted to tune the variable resistive elements in response to the input signal. | ||||||
| 57 | Amplifier with Non-Linear Current Mirror | US13343521 | 2012-01-04 | US20120169422A1 | 2012-07-05 | Carlo FIOCCHI |
| An amplifier with a non-linear current mirror comprises an amplification stage having an input terminal for an input signal as well as an output stage coupled to the amplification stage by a current mirror stage. The current mirror stage comprises at least one mirror transistor coupled to the amplification stage and at least one output transistor coupled to the output stage. The amplifier comprises two variable resistive elements, each of them connected in series to one of the mirror transistor and the output transistor. A tuning stage is adapted to tune the variable resistive elements in response to the input signal. | ||||||
| 58 | System and method for dynamic drain voltage adjustment to control linearity, output power, and efficiency in RF power amplifiers | US12790838 | 2010-05-30 | US07907014B2 | 2011-03-15 | Dung C. Nguyen; Soon Yoon; Ahmad Khanifar; Don C. Devendorf |
| A system and method for dynamic adjustment of drain or collector voltage of a power amplifier (PA), including a PA having a voltage input, a temperature sensor measuring ambient temperature of the PA, and an adaptive PA control processor that dynamically changes the input voltage based on the ambient temperature, achieving a desired peak power when the system is subjected to high temperatures. In a further embodiment, a power sensor measures output power of the PA, and the control processor dynamically changes the voltage based on output power when the system serves a large cell in a mobile communication infrastructure employing high power. In a further embodiment, a multistage PA and method include amplifier stages having drain or collector voltage inputs, wherein a voltage applied to the inputs are set so as to be proportional to the peak power requirements of each stage, enhancing overall efficiency. | ||||||
| 59 | System and method for dynamic drain voltage adjustment to control linearity, output power, and efficiency in RF power amplifiers | US12031249 | 2008-02-14 | US07755429B2 | 2010-07-13 | Dung C. Nguyen; Soon Yoon; Ahmad Khanifar; Don C. Devendorf |
| A system and method for dynamic adjustment of drain or collector voltage of a power amplifier (PA), including a PA having a voltage input, a temperature sensor measuring ambient temperature of the PA, and an adaptive PA control processor that dynamically changes the input voltage based on the ambient temperature, achieving a desired peak power when the system is subjected to high temperatures. In a further embodiment, a power sensor measures output power of the PA, and the control processor dynamically changes the voltage based on output power when the system serves a large cell in a mobile communication infrastructure employing high power. In a further embodiment, a multistage PA and method include amplifier stages having drain or collector voltage inputs, wherein a voltage applied to the inputs are set so as to be proportional to the peak power requirements of each stage, enhancing overall efficiency. | ||||||
| 60 | Amplifier circuit having dynamically biased configuration | US12154648 | 2008-05-23 | US07733181B2 | 2010-06-08 | Kent Jaeger; Lawrence E. Connell |
| Methods and corresponding systems for amplifying an input signal include inputting first and second differential input signals into first and second circuit legs, respectively, wherein the first circuit leg includes a first transistor coupled in series with a first variable current source, and wherein the second circuit leg includes a second transistor coupled in series with a second variable current source. The first and second variable current sources are dynamically set to provide first and second bias currents in response to the first and second differential input signals, wherein the first bias current is set inversely proportional to the second bias current. The first and second bias currents are sunk in the first and second circuit legs, respectively. First and second differential output signals are output from the first and second circuit legs, respectively. | ||||||
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