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序号 专利名 申请号 申请日 公开(公告)号 公开(公告)日 发明人
41 转盘轮计时器 CN99233321.0 1999-05-11 CN2380944Y 2000-05-31 李志富
本实用新型涉及一种转盘轮计时器,它由齿轮传动的子钟和石英钟或计时脉冲控制的光控电子电路母钟组成,以石英钟秒针遮盖光敏电阻或计时脉冲发出变更信号,电机带动棘轮驱动机构和蜗杆蜗轮装置使分针和时钟转动来显示时间,在分针转轴上设有有孔转盘,遇孔即停。具有结构紧凑,运行平稳,方便维护,机构占地空间小,成本低,节能,可广泛应用于车站、机场、码头、广场、城镇等场所作为大型计时显示装置。
42 世界时钟 CN99220268.X 1999-03-24 CN2376635Y 2000-05-03 韩冰
本实用新型涉及一种世界时钟,属钟表领域。包括有主时钟和分时钟及控制电路,主时钟为一圈十二时,位于世界时钟正中央,分时钟为一圈二十四时,均匀分布于主时钟四周,分时钟为2—24个,最好为8—12个。本实用新型主时钟与分时钟组成一整体,统一控制运转,走时准确、稳定,适合各种场合悬挂。
43 微型大减速比石英电子驱动器 CN97201504.3 1997-02-27 CN2340012Y 1999-09-22 陈达渊; 周文禄
微型大减速比石英电子驱动器,采用石英电子计时器替代机械计时仪器,用干电池或稳压电源长时间供电(一年以上)。驱动器一个输出轴的转速为1转/24小时,另一个输出轴的转速为1转/365天,两个输出轴为同轴输出。石英电子计时器的步进达的转子每秒钟转动180°,从转子轴到两个输出轴,为大减速比精密传动齿轮组成。
44 Mécanisme de blocage pour module d'entraînement horloger EP08166740.4 2008-10-16 EP2177960A1 2010-04-21 Bisig, Martin; Golay, Nicolas; Petremand, Yves; Paratte, Lionel

Dispositif pour le blocage et l'incrémentation unitaire d'un module d'entraînement (1) pour rouage horloger. Le module (1) comprend un actionneur (2) muni d'un cliquet actif (5) coopérant avec une roue dentée (7), et le dispositif comprend un premier (8) et un deuxième doigt (9) coopérant avec ladite roue dentée (7). Le dispositif est caractérisé en ce que le premier doigt (8) bloque intégralement la rotation de la roue dentée (7) lorsqu'il est engagé dans une des dents de la roue dentée (7); et en ce que le deuxième doigt (9) est disposé entre une première (10) et une deuxième butée (11), l'espacement entre les butées (10,11) limitant la course angulaire de la roue dentée (7) lorsque ledit deuxième doigt (9) est engagé dans une des dents de la roue dentée (7).

45 TIME KEEPING SYSTEM WITH AUTOMATIC DAYLIGHT SAVINGS TIME ADJUSTMENT EP02773534.9 2002-09-20 EP1428078A2 2004-06-16 O'NEILL, Terrence, J.; GOLLNICK, Robin, W.; BIHLER, Roland, W.
A timekeeping system having a first time module (22) operable to keep a first time, a second module (23) operable to keep a second time, and a display module (29) operable to visually display a third time that corresponds to the second time. The system also includes a control module (62) operatively coupled to the first module and the second module. The control module detects a time difference between the first time and the second time and adjusts the second time to reduce the time difference.
46 Melody alarm timepiece EP92301941.8 1992-03-06 EP0502747A3 1993-03-17 Ikeda, Hidetsugu; Yanaka, Makoto

An alarm timepiece in which in the specific embodiment disclosed the alarm signals are melodies changed over sequentially in accordance with hours at each of which an alarm melody is to be played as a time signal so that predetermined melodies from a sequence of melodies are always played at predetermined hours, respectively. In addition, even if the hours and the melodies become out of phase with each other as a result, for example, of the correction of the time made during the timekeeping operation of the timepiece, the melodies are automatically reset at a predetermined time so as to be coincident with the corresponding hours.

A switch S2 for detecting a correct hour is on-off controlled by a cam 6a provided as an integral part of a minute pipe 6 that makes one revolution per hour. A reset switch S3 is on-off controlled through a reset lever 5 pivoted by an hour wheel 4 that makes one revolution per twelve hours. An alarm control circuit in an IC 3 incorporates a plurality of melodies sequentially and plays each melody through a speaker SP. When supplied with a reset signal, the alarm control circuit makes the next alarm melody which is to be output the first melody in the sequence.

47 미아방지용시계장치 KR1019930026910 1993-12-08 KR1019950015204B1 1995-12-23 하왕준
The parent watch generates warning sound if the parent are apart from a child with a predefined distance so as not to receive the signal from the child watch. The pair of watches comprises microprocessor(100A,B) controlling the signal transmission with a regular frequency and generation of the warning sound; key input panels(200A,B) for inputting mode change, secret codes and others; displays(400A,B) displaying the current time and the mode states; a wireless receiver(500A); a wireless transmitter(500B); a warning sound generator(600B).
48 회전자 구동용 무브먼트의 회전축 상하 조절장치 KR2019890008648 1989-06-22 KR2019920003016Y1 1992-05-18 김영수
내용 없음.
49 미아방지용시계장치 KR1019930026910 1993-12-08 KR100097363B1 1996-03-23 하왕준
50 미아방지용시계장치 KR1019930026910 1993-12-08 KR1019950019996A 1995-07-24 하왕준
본 발명은 한쌍의 시계에 무선 송수신장치를 내장하여 일정주기로 자시계에서 송신한 데이터를 모시계에서 수신함으로써 두 시계가 일정거리이상 떨어져 데이터를 송수신하지 못하거나 일정거리내에 있더라도 데이터가 다를 경우에는 경보음을 울려 미아발생을 방지할 수 있도록 한 미아방지용 시계장치에 관한 것이다. 이러한 본 발명은 마이크로컴퓨터와 키입력부와 표시부와 무선송수신부를 내장한 자시계장치에서 모니터 온명령이 입력될 경우 모니터모드에서 입력되어 저장된 비밀번호를 고주파에 실어 일정한 주기로 송신하고, 마이크로 컴퓨터와 키입력부와 표시부와 무선수신부와 경보음 발생부를 내장한 모시계장치에서 자시계장치로부터 전송된 비밀번호를 수신하여 수신된 비밀번호와 모니터모드에서 입력되어 저장된 비밀번호를 비교하고, 두 비밀번호가 다르거나 일정시간동안 비밀번호가 수신되지 않을 경우 경보음을 출력하게 된다.
51 REMOTE CONTROL MECHANISM FOR TIMEPIECES US15964786 2018-04-27 US20180314211A1 2018-11-01 David HURNI
Watch comprising a movement with an axially and rotationally movable main stem, and a control mechanism for the remote control of the main stem which comprises a secondary stem operable by a user and guided in rotation by guide means of a plate, and axial stop means for a secondary pinion integral in rotation with the secondary stem, and a transmission train meshed with the secondary pinion to transmit any rotation of the secondary pinion to the main stem, and further comprises an articulated connection, arranged to transmit any axial motion of the secondary stem to the main stem.
52 THERMOCOMPENSATED CHRONOMETER CIRCUIT US14649029 2013-12-11 US20150316895A1 2015-11-05 Thierry BONNET; Silvio DALLA PIAZZA; Laurent CHRISTE; Francois KLOPFENSTEIN; Emmanuel FLEURY; Yves GODAT; Nicolas JEANNET
An electronic module including at least one electric motor for driving an analog display, a clock module including a time base delivering a clock signal connected to a divider circuit, the divider circuit delivering a reference signal sent to a control circuit arranged to control the electric motor, the clock module further including a measuring and correction circuit arranged between the time base and the divider circuit and delivering an intermediate compensated signal. The time base, the compensation module, the divider circuit, and the control circuit are arranged in a same case to form the clock module.
53 Satellite signal receiving device, satellite signal receiving method, and electronic device US13597872 2012-08-29 US08897097B2 2014-11-25 Norimitsu Baba; Katsuyuki Honda; Toshikazu Akiyama; Jun Matsuzaki
A satellite signal reception device that can desirably receive satellite signals has a charge state detection circuit 43 and a voltage detection circuit 44 that detect if the satellite signal reception device is outdoors, and a control circuit 40. If the satellite signal reception device is determined to be outdoors based on the detection result from the charge state detection circuit 43 and voltage detection circuit 44, the control circuit 40 operates a GPS reception circuit 30. If an indoor state in which the satellite signal reception device is determined to not be outdoors continues for at least a predetermined specific time, the control circuit 40 operates the GPS reception circuit 30 at a preset scheduled reception time.
54 Time updating and load management systems US11700433 2007-01-31 US07911326B2 2011-03-22 Sehat Sutardja
A master generator that updates time data of remote devices comprises an acquisition module, a clock module, an encoding module, and a transmission module. The acquisition module acquires time data representing current time of day. The clock module receives and stores the time data from the acquisition module and periodically updates the time data. The encoding module encodes the time data from the clock module into time messages. The transmission module selectively superimposes the time messages onto a power signal.
55 CLOCK DIAGNOSTICS US11745309 2007-05-07 US20070206446A1 2007-09-06 Ilan SHEMESH
Disclosed is a clock for use in a master/slave clock system, including a system and method for semi-automatically performing diagnostic self-tests on the status and operability of a plurality of components of one or more secondary clocks. The invention addresses a multitude of diagnostic and problem detection issues, including “no fault found.”
56 Systems and methods for synchronizing the internal clocks of a plurality of processor modules US10924640 2004-08-24 US07239581B2 2007-07-03 Diane Delgado; Jeff Darcy
In a multiprocessor system that includes a plurality of processor modules, each one of which includes its own internal clock, one of the plurality of processor modules is designated as a master processor module having a master internal clock. Each other processor module is designated as a slave processor module having a slave processor module internal clock. Each slave processor module synchronizes its internal clock with the master internal clock.
57 Method for position notification US10527792 2003-09-08 US20060034158A1 2006-02-16 Magnus Maurex; Ulf Gullstedt; Sergey Shudra
The method and system is for determining a position and time with a dynamic code (22). The method provides a time device (12) that shows a time (19) and a date (17). The time device (12) has a unique identification number (24). The dynamic real time code (22) is generated by combining the time (19) and the date (17) shown by the time device (12) and the identification number (24). The code (22) is packed and sent to a receiver (30). The receiver unpacks the code and determines the sending time (19) and date (17) and the identification of the time unit (12).
58 Clock supply apparatus US55676 1993-04-30 US5327402A 1994-07-05 Tadanao Shinomiya
A clock supply apparatus provided in each slave office, wherein a single master clock is received at a clock receiver unit; 0-system and 1-system system clocks are paired and are distributed to the transmission units at terminal ends via a plurality of duplexed clock supply routes; and multistage clock selection units are hierarchically inserted into the duplexed clock supply routes. The system-selection unit for controlling the selection of the 0-system or 1-system at each clock selection unit is given a 0-system and 1-system duplexed structure and is constituted by a system switching command unit for instructing this system-selection.
59 Programmed digital secondary clock US913141 1978-06-06 US4322831A 1982-03-30 Ronald H. Peterson
A programmed digital secondary clock which functions as a master clock, a sub-master clock or a slave clock. The master clock maintains an updated real time count based on a 50 hz or 60 hz ac line or digital oscillator signal, displays the count, and serially transmits digital information representative of the updated real time count for use by a slave clock. The sub-master clock, receives an hourly or twice-a-day correction signal from a conventional master clock or a conventional electronic receiver, corrects the real time count, displays the corrected count, and serially transmits digital information representative of the corrected real time count for use by a slave clock. Identical programmed digital secondary clocks can be connected in daisy chain. The first clock can operate as a master clock or as a sub-master clock. The following clocks can be operated as slave clocks. The slave clock, receives serial digital information representative of real time every second, maintains an updated real time count based on the received information, displays the count, and serially transmits digital information representative of the real time count for use by a following slave clock. The programmed digital secondary clock can be operated as an elapsed timer or as an interval timer without interfering with the operation of the clock as a master, sub-master or slave clock.
60 Integrated insulated-gate field-effect transistor control device US919320 1978-06-26 US4259600A 1981-03-31 Jean Fellrath; Eric Vittoz
An integrated control device for controlling a device such as a LED display or a miniature stepping motor for an electronic watch comprises at least one insulated-gate field effect transistor for controlling the supply of current to the element. The gate of the F.E.T. is connected to a control circuit including a voltage multiplier comprising a series-connected chain of rectifiers and a plurality of capacitors connected between the respective junctions between rectifiers and alternate inputs. High frequency signals of opposite phase are supplied to the inputs under control of an input control signal. Circuit means are provided for starting the action of the voltage multiplier at the beginning of an input control signal and for short-circuiting the output of the control circuit at the end of an input control signal.
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