This application claims the benefit of priority under 35 U.S.C. §119 of U.S. Provisional Application Ser. No. 61/417,453 filed on Nov. 29, 2010, the entirety of which is incorporated by reference herein.

TECHNICAL FIELD

The present disclosure relates, generally, to power converters that convert DC power to AC power, and more particularly, to power converters used in photovoltaic applications.

BACKGROUND

Photovoltaic (PV) cells may generate power that can be used for purposes such as supplying power to a utility grid. However, PV cells generate direct current (DC) power and utility grids use alternating current (AC) power. Thus, the DC power generated by a PV cells must be converted to AC power in order to be used within a utility grid. Power inverters may be used to provide such conversion. It is desired to perform the DC to AC power conversion with the greatest possible efficiency. During conversion various environmental conditions may exist, such as uneven distribution of solar energy across an array of PV cells, that may interfere with performing the conversion as efficiently as possible.

SUMMARY

According to one aspect of the disclosure, an apparatus may include a plurality of power inverters. Each power inverter may receive direct current (DC) power from a respective DC power source and respectively provide AC power to an AC load. The apparatus may also include a primary controller that may generate a primary control signal based on the total AC current and the total AC voltage being delivered to the AC load by the plurality of inverters. The apparatus may also include a plurality of secondary controllers that may each receive the primary control signal and produce a respective secondary control signal based on the primary control signal. The respective secondary control signal for each of the plurality of secondary controllers may control a corresponding one or more of the plurality of inverters to provide the respective AC power.

According to another aspect of the disclosure, a method of controlling AC power delivered to an AC load may include producing the AC power with an array of inverters based on an amount of received respective DC power. The method may further include generating a first control signal in response to the AC power. The method may further include generating a plurality of second control signals in response to the first control signal. The method may further include controlling respective output AC power of each inverter of the array of inverters based on a corresponding one of the second control signals and the AC power may a combination of the respective output AC power of each inverter of the array of inverters.

According to another aspect of the disclosure, a computer-readable medium may include a plurality of instructions executable by a processor. The computer-readable medium may include instructions to direct an array of inverters to produce AC power based on an amount of power received by the inverters. The computer-readable medium may further include instructions to generate a first control signal in response to the AC power. The computer-readable medium may further include instructions to generate a plurality of second control signals in response to the first control signal. The computer-readable medium may further include instructions to control respective output AC power of each inverter of the array of inverters based on a corresponding one of the second control signals with the AC power being a combination of the respective output AC power of each inverter of the array of inverters.

DESCRIPTION OF THE DRAWINGS

FIG. 1 is an example photovoltaic module and inverter module.

FIG. 2 is a block diagram of an example inverter module.

FIG. 3 is a circuit diagram of an example photovoltaic module and example inverter module

FIG. 4 is a block diagram of an example controller.

FIG. 5 is block diagram of another example controller.

FIG. 6 is block diagram of another example controller.

FIG. 7 is an example maximum power point tracking controller.

FIG. 8 is an example waveform of output current of an example inverter module over time.

FIG. 9 is an example waveform of output voltage of an example inverter module over time.

FIG. 10 is an example waveform of output power of an example inverter module over time.

FIG. 11 is an example waveform of power output of an example inverter sub-module over time.

FIG. 12 is another example waveform of power output of an example inverter sub-module over time.

FIG. 13 is an example operational flow diagram of a controller of an inverter module.

FIG. 14 is an example operational flow diagram of a controller of a sub-inverter module controller.

DETAILED DESCRIPTION

FIG. 1 is a diagram of a photovoltaic (PV) module 100 having an array of PV cells 102. The PV module 100 may be used to receive solar energy and convert the solar energy to direct current (DC) electricity. In some applications, alternating current (AC) power may be desired, such as when connected to a utility grid, for example. In such applications, an inverter module 104 may be used to convert the DC power produced by the array of PV cells 102 to AC power. In one example, the inverter module 104 may include a number of inverter sub-modules 106. Each inverter sub-module 106 may be electrically coupled to a subset of the array of PV cells 102 to convert the DC power produced by the subset of PV cells 102 to AC power. For example, each inverter sub-module 106 may be electrically coupled to single PV cell 102 in order to convert the DC power generated by the PV cell 102 to AC power. However, the inverter sub-modules 106 may be electrically coupled to a corresponding array of PV cells 102 so that the inverter sub-module 106 is responsible for converting DC power from the corresponding array of PV cells 102. The number of PV cells 102 in an array may vary in number and may be different or the same in with respect to one another.

The inverter module 104 may include a master controller 108 to provide one or more control signals 110 to each of the inverter sub-modules 106. Each of the inverter sub-modules 106 may include a local controller (see FIG. 2). Each of the inverter sub-modules 106 may use the control signals 110 to locally control the energy balance within each inverter sub-module 106.

FIG. 2 is a circuit diagram showing an example of the PV module 100 and the inverter module 104. In the example of FIG. 2, the PV module 100 there are a number (n) of inverter sub-modules 104 and a number (n) of PV cells 102 such each inverter sub-module 106 converts DC power generated by a single PV cell 102 to AC power. In FIG. 2, components associated with each individual inverter sub-module 106 are individually designated by a subscript “x,” where x is the x^th inverter sub-module 106 in the array of (n) inverter sub-modules 106. Each inverter sub-module 106 may include a DC-DC boost converter 200 electrically coupled to a PV cell 102. Each boost converter 200 includes a converter inductance L_b, and switches 204 and 206. Each switch 204 and 206 may receive a control signal qB1_x and qB2_x, respectively. The boost converter 200 boosts the DC voltage from the PV cell 102. Each PV cell 102 in FIG. 2 is represented as a DC voltage source 201 generating a DC voltage v_cellx and is electrically coupled in parallel with a filter capacitance C_fx of the corresponding boost converter 200. Each PV cell current i_cellx may be provided to the boost converter 200.

Each inverter sub-module 106 also includes an energy storage component 208 electrically coupled to the corresponding boost converter 200. In the example of FIG. 2, the energy storage component 208 is a capacitance (C_busx). The energy storage component 208 may reduce voltage ripple that may be due to switching associated with switching of the boost converter or power ripple that may be associated with a single phase AC load, such as a power utility grid.

Each inverter sub-module 106 may also include an output bridge 210 that includes a set of switches 212, 213, 214, and 215. Each of the sets of switches 212 through 215 may receive a respective control signal (qo1_x-qo4_x), respectively, used to turn each respective switch 212 through 215 on and off. In one example, the switches 212 through 215 may be metal oxide semiconductor field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBTs), or any other switch type suitable for power conversion switching. The switches 212 through 215 may be operated to convert the DC power stored in the energy storage component 208 to AC power to deliver to the AC load 220. In FIG. 2, the inverter sub-modules 106 are electrically coupled in series. However, in alternative examples, the inverter sub-modules 106 may be electrically coupled in other electrical configurations, such as being arranged in parallel, or a parallel and series combination.

An output inductance may be electrically coupled to the inverter sub-modules 106. In one example, the output inductance may be split into two output inductances L1o and L2o. In FIG. 2, the first output inductance L1o is electrically coupled between the first inverter sub-module 106 and the AC load 220 and the second output inductance L2o is electrically coupled between the last inverter sub-module 106 and the AC load 220. In alternative examples, the total output inductance (L1o+L2o) may be distributed differently than that shown in FIG. 2 such as lumped into a single inductance or distributed in various manners amongst the outputs of each of the sub-inverter modules 106.

The electrically coupled inverter sub-modules 106 may provide a single output voltage v_out and output current i_out to the AC load 220. In the configuration of FIG. 2, the output voltage v_out may be the sum of the sub-inverter output voltages of the sub-inverter modules 106 (v_o1+v_o2+ . . . +v_on) as experienced at the AC load 220. Due to the series configuration shown in FIG. 2, the output current i_out will be the same flowing through each of the output bridges. In FIG. 2, the AC load 220 is represented as an output voltage source v_grid, an output load inductance L_grid, and an output resistance R_grid. However, other manners of representing the AC load 220 may be used.

FIG. 3 is a block diagram illustrating example control features of the inverter module 104. In one example, each sub-inverter module 106 may include a local output bridge controller 300 and maximum power point tracker (MPPT) controller 302 (MPPT x). The master controller 108 may generate a master control signal (M_sys) 304 received by each local output bridge controller 300. Each local output bridge controller 300 may generate the respective switch control signals (qo1_x, qo2_x, qo3_x, and qo4_x) for each associated inverter sub-module 106 based on the control signal 304. Each local output bridge controller 300 may monitor the bus voltage V_busx for the corresponding storage component 208 in order to increase or decrease the current to the inverter sub-module 106 allowing the bus voltage V_busx to be adjusted.

Each MPPT controller 302 may receive the respective cell voltage v_cellx and cell current i_cellx and generate the boost converter switch control signals (qB1_x, qB2_x) for the associated inverter sub-module 106. The master controller 108 may receive the bus voltage v_busx for each inverter sub-module 106, the output voltage v_out, and the output current i_out.

FIG. 4 is a block diagram of an example of the master controller 108. The master controller 108 may maintain a system-level energy balance. For example, in a single phase utility grid connected power inverter application, such as that shown in FIG. 1, double frequency power is to be delivered to the utility grid and the total energy in the storage component 208 for each inverter sub-module 106 must be held as constant as possible. The double frequency power may be represented by:

p(t)=Po−Po*cos(2*ω_s*t+φ)),  Eqn. 1

where ω_s is the frequency of an AC load.

In one example, the master controller 108 receives the DC bus voltages from the inverter sub-modules 106 represented as V_busx. The master controller 108 may generate the summed squares of the bus voltages may be used to estimate the total available power current available from the array of PV cells 102. Using energy conservation and neglecting circuit losses, the approximated power available from the array of PV cells is:

∑

x

=

0

n

⁢

i

cellx

⁢

v

cellx

≈

P

net

=

i

out

⁢

v

out

+

ⅆ

ⅆ

t

⁢

1

2

⁢

C

bus

⁢

∑

x

=

0

n

⁢

v

busx

2

Eqn

.

⁢

2

Due to the numerical stability of the derivative calculation in Eqn. 2, the derivative may be approximated with the transfer function of:

G

deriv

⁡

(

s

)

=

s

τ

deriv

⁢

s

+

1

Eqn

.

⁢

3

The master controller 108 may be configured to multiply the sum of the squared bus voltages by a factor of ½C_bus using multiplier block 402 and provide the product to a lead compensator 404 using the transfer function of Eqn. 3. The output of the lead compensator 404 may be summed with the current power being received by the AC load 220 to determine the power stored in the storage components 208 and to determine the total power generated by PV module 100 (P_net). The power P_net may be received by a transfer function 406 and multiplied by sqrt(2)(1/V_LLms) at the multiplier block 408 to generate the desired approximated current to be provided by the inverter module 104 represented by the approximated desired current signal i_approx.

The master controller 108 may also generate a current adjustment signal i_adj representative of the amount the approximated desired current signal i_approx is to be adjusted. The current adjustment signal i_adj may be based on the sum of the bus voltages (v_busx) for each of the inverter sub-modules 106. The sum of the bus voltages may be received by a transfer function 410. The difference between the output of the transfer function 410 and a desired system voltage V_sysbus* may be received by a proportional-integral (PI) controller 412. The PI controller 412 may compensate for any error present in the difference between the output of the transfer function 410 and the desired system voltage V_sysbus*. The output of the PI controller 412 may be the current adjustment signal i_adj.

The approximated desired current signal i_approx and the current adjustment signal i_adj may be combined to generate the command current peak i_pk*. The peak current command may be multiplied by sin(ω_st) (ω_s is the desired output frequency of the inverter sub-module 106) at multiplier block 414 to generate the current command signal i* representative of the desired current to be provided to the AC load 220. The current command signal i* may be provided to a PI controller 416 and compared to the power provided to the AC load 220 based on the actual output voltage v_out and the output current i_out. A gain block 418 may receive the output of the PI controller 416 with the output of the gain block 418 providing the master control signal (M_sys) 304.

The master controller 108 may be analog-based, digital-based, or some combination thereof. In digital-based implementations, the master controller 108 may include a processor and a memory device. The memory device may include one or more memories and may be non-transitory computer-readable storage media or memories, such as a cache, buffer, RAM, removable media, hard drive or other computer readable storage media. Computer readable storage media may include various types of volatile and nonvolatile storage media. Various processing techniques may be implemented by the processor such as multiprocessing, multitasking, parallel processing and the like, for example. The processor may include one or more processors.

FIG. 5 is a block diagram of an example configuration of the local output bridge controller 300. The local output bridge controller 300 may contribute to maintaining local energy balance by adjusting the master control signal M_sys such that the voltage across the corresponding energy component 208 remains within a desired range. The effect of the local output bridge controller 300 is to shift the switching frequency of the output bridge switches qo1_x-qo4_x and increase the local bus voltage ripple in inverter sub-modules 106 having shaded corresponding PV cells. Each local output bridge controller 300 may receive the corresponding energy storage component voltage (v_busx) that may be received by a transfer function 500. The transfer function 500 represents a low pass filter to remove the double frequency power ripple from the bus voltage measurement. The difference between the output of the transfer function 500 and the desired energy storage component voltage V_bus* may be generated and supplied to a PI controller 502 to reduce any error in the difference. The output of the PI controller 502 provides an adjustment signal M_a that represents the desired amount by which the master control signal 304 is to be shifted to generate the local control signal M.

The local control signal M_x may be compared to a pair of triangular carrier waveforms (tri( ) and −tri( )) generated by the master controller 108 (not shown). Each pair of triangular carrier waveforms for each sub-inverter 106 may be phase shifted by a unique multiple of T_c/n, where T_c is the period of the carrier waveform. In alternative examples, sawtooth carrier waveforms may also be used. A first comparator 506 and a second comparator 508 may be used to compare each one of the triangle carrier waveform pairs with the local control signal M_x. The output of the first comparator 506 may be used to generate the local control signals qo1_x and qo2_x. The output of the second comparator 508 may be used to generate the local control signals qo3_x and qo4_x. The control signals qo1_x through qo4_x may be pulse width modulated (PWM) signals. Other manners of generating PWM signals may be used such as through timers.

FIG. 6 is a block diagram of an alternative example configuration of the local output bridge controller 300. In FIG. 6, the local control signal M_x is used to scale the master control signal M_sys. The examples of the local output bridge controller 300 shown in FIGS. 5 and 6 may be analog-based, digital-based, or a combination thereof. The local output bridge controller 300 may include a processor and memory, device similar to that of the master controller 108. In digital-based applications, the master controller 108 may implement the function of the waveform carriers and comparators 506 and 508 through timers.

FIG. 7 is a block diagram of an example MPPT controller 700 that may be implemented by each sub-inverter 106 in order to generate the control signals qB1_x and qB2_x for each corresponding boost converter 200. The MPPT controller 700 may implement various MPPT algorithms such as perturb and observe, incremental conductance, ripple correlation, control, or any other suitable MPPT algorithm. Each MPPT controller 700 may, include a processor and memory device as previously discussed allowing the selected algorithm to be stored on the memory device and executed by the processor.

FIGS. 8-12 show simulation waveforms of performance results generated by inverter module 104. In FIGS. 8-12, the following parameters in Table 1 are used for the various elements and variables of the inverter module 104.

TABLE 1

L_out = 1 mH

L_grid = 50 mH

P_rated = 250 mW

V_grid = 240*sqrt(2)sin(2π60t)

C_bus = 1 mF

R_grid = 1 mΩ

n = 72

Master Controller Parameters

K_psysbus = 0.00375

K_isysbus = 0.1

τ_vsysbus = 1/(2 π10) s

τ_power = 1/(2 π60) s

V_sysbus* = 400 V

K_p = 10/22.1

K_f = 10⁶/(22.1*8.2)

τ_deriv = 1/(2 π10⁵) s

V_LLrms = 240 V

G = V_LLrms/(sqrt(2)*P_rated

Local Controller—Modulation Shifting

τ_vbus = 1/(2 π5) s

K_pbus = 150K_psysbus

V_bus* = 400/n V

K_ibus = K_isysbus

T_c = 1/480 s

Local Controller Parameters—Modulation Scaling

τ_vbus = 1/(2 π5) s

K_pbus = 200K_psysbus

V_bus* = 400/n V

K_ibus = 10K_isysbus

T_c = 1/480 s

FIG. 8 is a plot of the output current i_out of the inverter module 104 versus time when having 72 PV cells 102 in the PV module 100 and a corresponding sub-inverter 106 for each PV cell 102. In FIG. 8, the total harmonic distortion of the output current is 2.8%. FIG. 9 is a plot of the voltage across 72 series-connected sub-inverters 106 receiving DC power from the PV cells 102 versus time. FIG. 10 is a plot of the power (P_out) delivered to the AC grid 220 by the PV module 100 having 72 sub-inverters 106.

FIG. 11 is an example simulation waveform of the power output (P_out) of an inverter sub-module 106 having a corresponding shaded PV cell 102. In the example of FIG. 11, 10 PV cells of the 72 PV cells 102 are shaded. The example of FIG. 11 is based on a local output bridge controller 300 having the controller configuration of FIG. 5. As shown in FIG. 11, power remains positive for the sub-inverter 106 having a shaded cell, but delivers the power in brief bursts.

FIG. 12 is an example simulation waveform of the power output (P_out) of an inverter sub-module 106 having a corresponding shaded PV cell 102. In the example of FIG. 12, 10 PV cells of the 72 PV cells 102 are shaded. The example of FIG. 12 is based on a local output bridge controller 300 having the controller configuration of FIG. 6.

FIG. 13 is an example operational flow diagram of the master controller 108. The inverter module 104 may receive the bus voltages (v_bus) of each inverter sub-module 106, the output voltage (v_grid), and the output current (i_grid) (1300). The net power P_net of the combined inverter sub-modules 106 may be determined based on the sum of the squared bus voltages (1302). The approximated desired current signal i_approx may be determined based on the net power P_net (1304). A current adjustment signal may be determined based on the sum of the bus voltages (v_bus) (1306). A desired current signal i* may be determined based on the approximated desired current signal i_approx and the current adjustment signal i_adj (1308). The desired current signal i* and the actual load power being delivered by the inverter module 104 to the AC load 220 may be compared (1310). The master control signal 304 may be generated based on the comparison (1312).

FIG. 14 is an example operational flow diagram of the local output bridge controller 300. The local output bridge controller configurations of FIG. 5 or 6 may be used, as well as other alternative configurations. The local output bridge controller 300 may receive the master control signal M_sys and the corresponding bus voltage (v_busx) (1400). The difference between the bus voltage and the desired bus voltage (V_bus*) may be determined (1402). The difference between the bus voltage and the desired bus voltage may be used to generate an adjustment signal (1404). In the example of FIGS. 5 and 6, a PI controller 502 may be used to reduce the error in the adjustment signal M_a. The local control signal M_x may be generated based on the adjustment signal M_a and the master control signal M_sys. (1406). The local control signal M_x may be compared to carrier waveforms (1408) to generate the local control signals qo1_x, qo2_x, qo3_x, and qo4_x (1410).

There is a plurality of advantages of the present disclosure arising from the various features of the apparatuses, circuits, and methods described herein. It will be noted that alternative examples of the apparatuses, circuits, and methods of the present disclosure may not include all of the features described yet still benefit from at least some of the advantages of such features. Those of ordinary skill in the art may readily devise their own implementations of the apparatuses, circuits, and methods that incorporate one or more of the features of the present disclosure and fall within the spirit and scope of the present disclosure.