Semiconductor device having surface electric-field effect
阅读：890发布：2021-12-31
专利汇可以提供Semiconductor device having surface electric-field effect专利检索，专利查询，专利分析的服务。并且A semiconductor device comprising a semiconductor, an insulating layer and a resistive or half conducting layer which are provided on the surface of said semiconductor, and a metallic electrode adjoined to said latter layers and having such a surface electric-field effect as that any potential distribution is established on said insulating layer, said effect causing multiplication and increase of the functional ability of the semiconductor device, whereby for example, effective utilization of the device as an amplifier comprising a high frequency, surface electric-field effect transistor, a high speed switching transistor or tetrode is made possible. Furthermore, a semiconductor device having the same structure as mentioned above except that the insulating layer and resistive layer or half conducting layers are made of a material capable of transmitting an input light ray therethrough and mutual interaction between the input light ray and said semiconductor is skillfully utilized for effective multiplication of the functional ability of the semiconductor device, whereby, for example, effective utilization of the device as a light detector, a surface photo transistor, a surface light generating element control of which is attained by gate voltage, or a surface light modulator is made possible.，下面是Semiconductor device having surface electric-field effect专利的具体信息内容。
1. An insulated gate type field-effect device comprising: a wafer of monocrystalline semiconductor having a first conductivity type; a source and a drain each of which has a region in said monocrystalline semiconductor, said region having a second conductivity type opposite to said first conductivity type; terminals secured on said source and drain through metallic materials used for electrodes, respectively; an insulating layer overlying on a substantial portion of said semiconductor wafer; a resistive layer attached on said insulating layer at the position between said source and said drain; and electrically electroconductive parts which form a first gate electrode and a second gate electrode, respectively, and which are provided on said insulating layer and resistive layer in parallel with a current flowing direction of a surface channel; one side of said first gate electrode overlapping with an end of said source with the other end thereof terminating in the midway of the surface channel between said source and said drain, one end of said second gate electrode overlapping with an end of said drain with the other end thereof being spaced from said first gate electrode while leaving said resistive layer there-between, said first gate, said second gate and a portion between said first and second gates being respectively insulated from said source, said drain and said surface channel by said insulating layer, means for applying to said first and second gates a gate voltage through said resistive layer so that a voltage drop direction in the gate voltage distribution is the same as that of a surface channel current flowing through the channel beneath said insulating layer.
1. An insulated gate type field-effect device comprising: a wafer of monocrystalline semiconductor having a first conductivity type; a source and a drain each of which has a region in said monocrystalline semiconductor, said region having a second conductivity type opposite to said first conductivity type; terminals secured on said source and drain through metallic materials used for electrodes, respectively; an insulating layer overlying on a substantial portion of said semiconductor wafer; a resistive layer attached on said insulating layer at the position between said source and said drain; and electrically electroconductive parts which form a first gate electrode and a second gate electrode, respectively, and which are provided on said insulating layer and resistive layer in parallel with a current flowing direction of a surface channel; one side of said first gate electrode overlapping with an end of said source with the other end thereof terminating in the midway of the surface channel between said source and said drain, one end of said second gate electrode overlapping with an end of said drain with the other end thereof being spaced from said first gate electrode while leaving said resistive layer there-between, said first gate, said second gate and a portion between said first and second gates being respectively insulated from said source, said drain and said surface channel by said insulating layer, means for applying to said first and second gates a gate voltage through said resistive layer so that a voltage drop direction in the gate voltage distribution is the same as that of a surface channel current flowing through the channel beneath said insulating layer.
2. A semiconductor field effect tetrode as claimed in claim 1 adapted for utilization as a high frequency field effect tetrode, comprising; means for applying a second gate voltage VG2 of a value much greater than a first gate voltage VG1 in case of high frequency device operation, said insulation gate type field-effect tetrode device being operative by a drain voltage VDS applied thereto within a range so calculated that a MIS transistor can be saturated by said first gate voltage which is defined by VG1, said second gate voltage being variable within a range such that VG2 is much greater than VG1 to thereby modulate said high-frequency transistor, and an effective channel length of said tetrode being made to be changed by variation of VG2 to thereby change the gain of said tetrode.
3. An insulated gate type field-effect tetrode device as is claimed in claim 1 which is adapted to apply a uniform high electric field in a surface channel direction, said device including said resistive layer attached on said insulating layer at the position between said source and said drain; an electrode member forming the first gate, an electrode member forming the second gate, and a diStributed gate member consisting of said resistive layer between said first gate and said second gate, and wherein said gate members are arranged on said insulating layer and resistive layer in parallel with a direction in which a surface channel current flows; said first gate member being placed above the source region through said insulating layer and resistive layer, one end of said first gate being substantially above the channel junction part of an end of said source, said second gate being placed above the drain region through said insulating layer and resistive layer, one end of said second gate being substantially above the channel junction part of an end of said drain, a portion over the surface channel portion between said source and said drain substantially comprising said insulating layer and said resistive layer and said first gate member and second gate member being substantially offset from the channel portion, the width and length of said channel being constant, said distributed resistive gate located between said first gate and said second gate being constant in length and width, means for applying through said first and second gates a voltage to said resistive layer so that the direction of the voltage drop of said resistive layer is made to be in parallel with that of a current flowing through the surface channel beneath said insulating layer, a potential distribution in the channel being made to be changed by the first gate voltage VG1, the second gate voltage VG2 and a drain voltage VD, and said device having an operating point at which the distribution potential of the channel linearly increases from said source to said drain with a proper VD under the gate voltages VG1 and VG2, said operating point causing application of a certain constant voltage difference across said insulating layer at any point of the channel due to the voltage difference effect between the voltage distribution of the distributed gate, where said voltage distribution is linearly changed on the insulating layer, and the linearly changing potential drop in said channel between said source and said drain, whereby a carrier distribution in the channel is made to be constant and uniform from the source to the drain.
4. A device as claimed in claim 3, in which a constant, uniform and high electric field in said surface channel is formed in a state that a channel carrier is properly induced, to thereby cause an avalanche phenomenon due to the uniform and high electric field and an oscillation phenomena of a channel current due to the high electric field along over the whole region of the surface channel between the source and the drain, these phenomena being controlled by said first gate and said second gate.
5. A semiconductor device as claimed in claim 1, in which a distributed network of resistance and capacitance is formed by said resistive layer and said insulating layer disposed between the first and second gates and said insulating layer provided beneath said resistive layer, and said first gate is used as an input electrode for a signal so as to transmit said signal through said R-C distributed network on the semiconductor toward said second gate which is adjacent to the drain, said second gate being kept off until a delay signal arrives therein whereby no signal is obtained at the output terminal of the drain, while said second gate is put into an on state upon arrival of the signal through said network, whereby an amplified output at the drain terminal is obtained with a time delay from the entering of said input signal.
6. A semiconductor device as claimed in claim 1, in which the drain output terminal comprises a MIS transistor as its load connected thereto and the second gate is connected so as to be supplied with a feedback signal to thereby vary the effective channel length of the MRIS tetrode device, whereby amplification gain of a signal applied from the first gate is varied at the drain output terminal.
7. A MRIS tetrode device having Metal-Resistive-layer-Insulator-Semiconductor structure as claimed in claim 1, which operates as an amplifier having a MIS transistor as its load and in which a photo-variable resistor the resistance of which is varied by light radiation thereon is used as the resistive layer provided above the insulating layer at the position between the first gate and the second gate, and a MIS transistor is connected to an output terminal of the drain as the load of the device, whereby modulation of amplification gain due to the first and second gate electrodes is attained, the voltage drop due to bias applied between the first and second gates by a light input is made to vary, and the effective channel length of the MRIS tetrode is made to vary by radiation of light input to thereby vary the ratio of the channel length of said MIS transistor and channel length of the MRIS tetrode, thus causing variation of the input and output characteristics of said amplifier.
8. An insulated gate type field-effect tetrode device as claimed in claim 1, in which the resistive layer and insulating layer provided between the first and second gate electrodes are made to be transparent with respect to incident light radiated thereto, whereby capacitance of the MIS gate in the surface channel is varied in response to input light and the amount of the minority carrier in the surface channel is varied to thereby vary the drain current.
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