Methods of manufacturing semiconductor devices
阅读：992发布：2022-01-06
专利汇可以提供Methods of manufacturing semiconductor devices专利检索，专利查询，专利分析的服务。并且A method of implanting ions in a semiconductor body in which a thin conductive layer is applied on the surface parts or surface adjacent parts at which the ion beam is to be directed. The ions penetrate the thin layer which maintains the surface parts or surface adjacent parts, including metal electrode layers when present, at a common potential. By suitable connection of the thin layer charging of said parts during implantation can be prevented. Subsequent to implantation the thin conductive layer is removed without effecting any substantial removal of the surface parts or surface adjacent parts. The specification describes the manufacture of a tetrode insulated gate field effect transistor, the applied thin conductive layer preventing charging of the gate electrodes and consequent breakdown of the underlying insulating layers during ion implantation.，下面是Methods of manufacturing semiconductor devices专利的具体信息内容。
2. A method of manufacturing a semiconductor device as claimed in claim 1, wherein during implantation the continuous conductive layer is maintained at the same potential as a substrate portion of the semiconductor.
3. A method of manufacturing a semiconductor device as claimed in claim 1, wherein said parts at which ions are directed include metal electrode layers on top of the body, the applied continuous conductive layer maintaining said electrode layers at a substantially constant potential during ion implantation.
4. A method of manufacturing a semiconductor device as claimed in claim 3, wherein the extent of each metal electrode layer is substantially completely determined prior to applying the continuous conductive layer and the subsequent ion implantation, the removal of the continuous conductive layer after ion implantation re-exposing said metal electrode layers.
5. A method of manufacturing a semiconductor device as claimed in claim 3, wherein the metal electrode layers are of such composition and thickness that the ions of the said given energy practically do not penetrate these layers which act as a mask during ion implantation.
6. A method as claimed in claim 5, wherein on the semiconductor surface situated laterally between the metal electrode layers there is an insulating layer of such composition and thickness that ions of the said given energy which penetrate the overlying continuous conductive layer further penetrate the insulating layer and pass into the semiconductor to form the regions of different electrical properties.
7. A method as claimed in claim 5, wherein the semiconductor device manufactured is an insulated-gate field-effect transistor, the metal electrode layers constituting source and drain electrodes in contact with the semiconductor and at least one gate electrode insulated from the semiconductor, the implantation in the semiconductor of one conductivity type of ions of an impurity element characteristic of the opposite conductivity type being effected to determine the adjacent extremities of source and drain regions of the opposite conductivity type and the location therebetween of at least one current carrying channel region having a length corresponding substantially to the lateral dimension of the overlying insulated gate electrode.
8. A method of manufacturing a semiconductor device as claimed in claim 7, wherein first and second gate electrode metal layers are present on the insulating layer, implantation being effected to determine in the semiconductor of one conductivity type at least the adjacent extremities of the source region and an intermediate region of the opposite conductivity type and the location therebetween of a first current carrying channel region having a length corresponding substantially to the lateral dimensioN of the overlying, first insulated gate electrode, and to determine in the semiconductor body at least the adjacent extremities of the intermediate region of the opposite conductivity type and the drain region and the location therebetween of a second current carrying channel region having a length corresponding substantially to the lateral dimension of the overlying, second gate electrode.
9. A method of manufacturing a semiconductor device as claimed in claim 8, wherein the implantation is effected to determine substantially completely the intermediate region of the opposite conductivity type.
10. A method of manufacturing a semiconductor device as claimed in claim 7, wherein outer portions of the source and drain regions are determined by a diffusion step prior to applying metal electrode layers and the ion implantation of the impurity element characteristic of the opposite conductivity type is effected to extend these source and drain region portions towards each other in the semiconductor.
11. A method of manufacturing a semiconductor device as claimed in claim 2, wherein electrical contact between the continuous conductive layer and a substrate portion of the semiconductor body is made via a metal clip.
12. A method of manufacturing a semiconductor device as claimed in claim 2, wherein prior to applying the continuous conductive layer a peripheral aperture is formed in an insulating layer on the semiconductor surface to expose a substrate portion of the semiconductor and the continuous conductive layer is applied in said peripheral opening.
13. A method of manufacturing a semiconductor device as claimed in claim 12, wherein the peripheral opening is in the form of a grid in the insulating layer on the semiconductor surface delineating a plurality of semiconductor body parts in each of which an individual circuit element or plurality of interconnected circuit elements are formed.
14. A method of manufacturing a semiconductor device as claimed in claim 1, wherein the continuous conductive layer is of metal.
15. A method of manufacturing a semiconductor device as claimed in claim 3, wherein the applied continuous metal layer and the metal electrode layers are of the same metal, the continuous metal layer having a thickness which is appreciably smaller than that of the metal electrode layer and being removed by etching after the ion implantation.
16. A method of manufacturing a semiconductor device as claimed in claim 15, wherein the semiconductor body is of silicon and the continuous metal layer and the metal electrode layers are of aluminum.
17. A method of manufacturing a semiconductor device as claimed in claim 3, wherein the continuous metal layer is of titanium and the metal electrode layers are of a different metal.
18. A method of manufacturing a semiconductor device as claimed in claim 17, wherein the semiconductor is of silicon and the metal electrode layers consist of a first layer portion of molybdenum and a second layer portion of gold situated on the first layer portion.
19. A method of manufacturing a semiconductor device in which ions of an impurity element are implanted in semiconductor portions of a body to form regions of different electrical properties, which comprises the steps of initially applying over the body parts at which the ions are to be directed a continuous conductive layer, applying over the continuous conductive layer masking material to define said regions, connecting said conductive layer to a potential point for maintaining said parts at a common potential during ion implantation, implanting by directing at said continuous conductive layer ions having a given energy sufficient to penetrate the continuous conductive layer but not the mask so as to pass into portions of the semiconductor to form said regions, and thereafter removing the exposed part of the continuous conductive layer without substantially effecting any removal of said semiconductor including said regions.
20. A method of manufacturing A semiconductor device in which ions of an impurity element are implanted in semiconductor portions of a body to form regions of different electrical properties in the semiconductor portions, which comprises the steps of initially applying masking material on the body to define said regions, then applying a continuous layer of conductive material on the mask and exposed surface portions of said body, connecting said conductive layer to a potential point for maintaining said portions at a common potential during ion implantation, implanting by directing at said continuous conductive layer ions having a given energy sufficient to penetrate the continuous conductive layer but not the mask so as to pass into portions of the semiconductor to form said regions, and thereafter removing at least part of the continuous conductive layer without substantially effecting any removal of said semiconductor portions including said regions.
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