Semiconductor device
专利汇可以提供Semiconductor device专利检索，专利查询，专利分析的服务。并且PURPOSE: To improve the high frequency characteristics of a semiconductor device by surrounding the bottom and side surfaces of electrode connecting wires by insulator to reduce the gate input capacity of a JFET.
CONSTITUTION: Ion is implanted to N-type silicon substrate 11, P
+ type layer 21 and N epitaxial layer 23 are laminated thereon, and Si
3 N
4 mask 25 is added thereto. Then, it is immersed in 49% HF aqueous solution, and anodized under light illumination to alter the layers 23, 21 to porous silicon 26. When the mask 25 is removed, channel forming N-type layer 14 and gate electrode connecting wire layer forming N-type layers 14a, 14b are formed with the side and bottom surfaces surrounded by porous silicon 26. Then, it is wet oxidized to alter the layer 26 to SiO
2 layers 12, 13. Then, N
+ type layers 15, 16 are formed to laminate P
+ type gate layer 17, wiring layers 17a, 17b are laminated on the layers 14, 14a, 14b. Finally, the gate layer 17 and the gate electrode connecting layers 17a, 17b are connected by aluminum wire 19. According to this configuration, the capacities of the N-type layer 14 and the substrate 11 are very low since SiO
2 is interposed so that the gate input capacity is the sum of the connecting capacity of the P
+ type layer 17 and N-type layer 14 and the floating capacity of the circuit to thereby obtain preferable high frequency semiconductor device.
COPYRIGHT: (C)1980,JPO&Japio，下面是Semiconductor device专利的具体信息内容。
| 标题 | 发布/更新时间 | 阅读量 |
|---|---|---|
| 绝缘体上半导体结构以及制备方法 | 2020-05-08 | 674 |
| 半导体器件及其制造方法 | 2020-05-08 | 571 |
| 用于管腔内超声成像换能器的埋入式沟槽以及相关的设备、系统和方法 | 2020-05-08 | 813 |
| 用于制备用于微组装的GaN及相关材料的系统及方法 | 2020-05-08 | 48 |
| 绝缘体上半导体元器件及其制造方法 | 2020-05-08 | 670 |
| 电容性微结构 | 2020-05-08 | 606 |
| 带有梳状传输线的单片电光调制器 | 2020-05-08 | 963 |
| 半导体装置 | 2020-05-11 | 961 |
| 一种基于压电材料的压力传感器及制备方法 | 2020-05-11 | 184 |
| 硅基光耦合结构、硅基单片集成光器件 | 2020-05-12 | 63 |
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5 浮栅的制备方法
