| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 121 | MODULATION CODING AND DECODING | US12262297 | 2008-10-31 | US20090115647A1 | 2009-05-07 | Thomas Mittelholzer |
| Methods and apparatus are provided for modulation coding a stream of binary input data. A 4-ary enumerative encoding algorithm is applied to the input bit-stream to produce a succession of 4-ary output symbols. The 4-ary algorithm is operative to simultaneously encode respective generalized Fibonacci codes in the odd and even interleaves of the input bit-stream. The bits of each successive 4-ary output symbol are then interleaved, producing an output bit-stream which has global and interleaved run-length constraints. Inverting the bits of the 4-ary output symbols produces an output bit-stream with (G, I)-constraints as in the PRML (G, I) codes used in reverse-concatenation modulation systems. Corresponding decoding systems are also provided. | ||||||
| 122 | DATA CODING BUFFER FOR ELECTRICAL COMPUTERS AND DIGITAL DATA PROCESSING SYSTEMS | US11777144 | 2007-07-12 | US20090015442A1 | 2009-01-15 | Donald Martin Monro |
| Embodiments described herein may include example embodiments of a method, article and/or apparatus for buffering coded data which may be used for communicating between two or more components connected to an interconnection medium (e.g., a bus) within a single computer or digital data processing system, and/or for communication between computing platforms via a network or other interconnection medium. | ||||||
| 123 | Method and Apparatus for Encoding of Low Voltage Swing Signals | US10565860 | 2004-07-12 | US20080043855A1 | 2008-02-21 | Rohini Krishnan; Jose de Jesus Pineda De Gyvez |
| An encoded-low swing scheme for transmission of a signal across an interconnect bus whereby the current values to be transmitted on the bus are compared with the previous state of the bus. When the number of bits flipping is greater than N, where N is the width of the bus, the decision to transmit the inverted signal values is made. In addition, an “invert” signal is also sent to the receiver to indicate whether the bus values are inverted or not. These encoded values are then converted into their low swing equivalents and transmitted. In this way, it can be ensured that the energy consumed over the interconnect is minimum. This strategy not only reduces the probability of transitions over the interconnect but also transmits only low swing values to achieve tremendous energy reductions relative to conventional techniques. | ||||||
| 124 | Multiplexing an additional bit stream with a primary bit stream with conversion between qB/rB and xB/yB encoded bit streams | US10617507 | 2003-07-11 | US06768429B2 | 2004-07-27 | Jerchen Kuo; Gerry Pesavento |
| Managing a primary bit stream involves converting a qB/rB encoded bit stream to an xB/yB encoded bit stream and multiplexing an additional bit stream with the xB/yB encoded bit stream at a transmission side of a link. The additional bit stream is then demultiplexed from the xB/yB encoded bit stream and the xB/yB encoded bit stream is converted back to the qB/rB encoded bit stream at the receiver side of the link. The qB/rB encoded bit stream is converted to and from the xB/yB encoded bit stream so that the additional bit stream can be multiplexed with the qB/rB encoded bit stream using multiplexing/demultiplexing systems that are compatible with the xB/yB multiplexing system. In an application, a 4B/5B encoded bit stream is converted to an 8B/10B encoded bit stream and an additional bit stream is multiplexed with the 10B code-words of the 8B/10B encoded bit stream using code-word manipulation. | ||||||
| 125 | Data conversion method, method for obtaining waveform information from square wave using the same, and method for generating square wave from waveform information using the same | US10369504 | 2003-02-21 | US06700511B1 | 2004-03-02 | Tae-Gyu Chang; Jee-Tae Park |
| The present invention relates to a data conversion method for providing efficient conversion between data of different unit lengths, a method for obtaining waveform information from a square wave using the same, and a method for generating the square wave from the waveform information using the same. According to the data conversion method of the present invention, there is an advantage in that data compression and data decompression can be readily and efficiently performed. Further, according to the method of obtaining the waveform information and the method of generating the square wave using the data conversion method of the present invention, there are advantages in that the waveform information can be efficiently generated from the square wave signal and the square wave signal can be efficiently generated from data on the waveform information of the square wave. | ||||||
| 126 | Multiplexing an additional bit stream with a primary bit stream | US10245854 | 2002-09-17 | US06624763B2 | 2003-09-23 | Jerchen Kuo; Gerry Pesavento |
| Multiplexing an additional bit stream with a primary bit stream, where the primary bit stream is encoded into an xB/yB encoded bit stream, involves selecting yB code-words to convey the additional bit stream. Each xB word is represented by one yB code-word from a corresponding group of yB code-words, with each group of yB code-words including at least one yB code-word belonging to a category of code-words that tends to exhibit positive DC balance and at least one yB code-word belonging to a category that tends to exhibit negative DC balance. Bits of the additional bit stream are multiplexed with the primary bit stream by selecting code-words from one of the two categories to convey 1's and from the other category to convey 0's. Code-words that are not selected to convey bits of the additional bit stream are selected to balance the running disparity of the encoded bit stream. | ||||||
| 127 | Binary weighted thermometer code for PVT controlled output drivers | US09921025 | 2001-08-02 | US06509757B1 | 2003-01-21 | Guy Harlan Humphrey |
| A binary weighted thermometer code is employed to adjust the output impedance of a variable impedance output driver circuit. The driver circuit includes an impedance network comprising a plurality of resistive devices each programmably electrically connectable in parallel between a first voltage source and the signal pad. The resistive devices are partitioned into a plurality of sets. A first set of the resistive devices may be programmed in a binary incremental manner to electrically connect one or more of the resistive devices in the first set between the first voltage source and the signal pad. Only if all of the resistive devices in the first set are activated may a second set of the resistive devices be programmed in a binary incremental manner. Additional sets of the resistive devices may be likewise programmed only after all of the resistive devices in the previously programmed sets are activated. | ||||||
| 128 | Multiple resonant tunneling circuits for positive digit range-4 base-2 to binary conversion | US065969 | 1993-05-24 | US5469163A | 1995-11-21 | Albert H. Taddiken |
| Multiple resonant tunneling devices offer significant advantages for realizing circuits which efficiently convert values represented by multivalued number systems to conventional binary representation. In one form of the invention, a number represented by a range-4 base-2 word is converted into a conventional binary word (range-2 base-2) having the same value. The conversion is accomplished by a series of decomposition stages 53, each decomposition stage 53 producing an interim range-4 base-2 word and a binary digit, which becomes one of the digits of the binary output word. Preferably, the decomposition at each stage is accomplished by a set of range-4 base-2 to binary converters 50, each of which operates on a single digit of the interim word. Preferably, summation circuits 52 sum outputs of adjoining range-4 base-2 converters 50 to form the new interim word. The least significant digit of the output of the decomposition stage becomes a digit of the output binary word. Preferably, the range-4 base-2 to binary converters 50 are multi-level folding circuits 54 connected by a voltage divider. Preferably, the multi-level folding circuits contain multiple-peak resonant tunneling transistors 56 (e.g. an FET 58 and a multiple-peak resonant tunneling diode 60) which exhibit multiple negative differential transconductance. The novel circuits presented allow the results of multivalued logic operations to be translated to binary representation at very high speed. Additionally, because they make use of resonant tunneling devices, the novel converter circuits described herein may be fabricated with very few components. | ||||||
| 129 | APPARATUS AND METHOD FOR MAPPING BINARY TO TERNARY AND ITS REVERSE | EP15842777 | 2015-08-04 | EP3195131A4 | 2018-05-02 | MOTWANI RAVI H; KALAVADE PRANAV |
| Described is an apparatus for converting binary data to ternary and back such that the apparatus comprises: a first look-up table (LUT) having a mapping of 19 binary bits to 12 ternary trits; and a first logic to receive a binary input and to convert the binary input to a ternary output according to the first LUT. | ||||||
| 130 | APPARATUS AND METHOD FOR MAPPING BINARY TO TERNARY AND ITS REVERSE | EP15842777.3 | 2015-08-04 | EP3195131A1 | 2017-07-26 | MOTWANI, Ravi H.; KALAVADE, Pranav |
| Described is an apparatus for converting binary data to ternary and back such that the apparatus comprises: a first look-up table (LUT) having a mapping of 19 binary bits to 12 ternary trits; and a first logic to receive a binary input and to convert the binary input to a ternary output according to the first LUT. | ||||||
| 131 | FENÊTRES DE PONDÉRATION EN CODAGE/DÉCODAGE PAR TRANSFORMÉE AVEC RECOUVREMENT, OPTIMISÉES EN RETARD | EP12734996.7 | 2012-06-26 | EP2727107A1 | 2014-05-07 | FAURE, Julien; PHILIPPE, Pierrick |
| The invention relates to the coding/decoding of a digital signal, consisting of successive blocks of samples, the coding being of the transform with overlap type and comprising, upon analysis, the application of a weighting window to two blocks of M successive samples. In particular, this weighting window is asymmetric and comprises four distinct portions extending successively over the two aforesaid blocks, with: a first portion (wl), increasing over a first interval of samples, a second portion (w2), constant at a value of 1 over a second interval, a third portion (w3), decreasing over a third interval, and a fourth portion (w4), constant at a value of 0 over a fourth interval. | ||||||
| 132 | Method and apparatus for data encoding | EP05101486.8 | 2005-02-25 | EP1696572A1 | 2006-08-30 | Luo, Zhong Hai (Jack) |
A method and apparatus for data encoding such as 3 to 4 encoding (base64, uuencode etc.) is provided. Bytes of data to be encoded having negative values are made positive while preserving the information to be encoded. The positive values may be manipulated by addition (e.g. to a common store) and bit shifting to efficiently obtain encoded data such as by indexing an encoding alphabet.
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| 133 | METHOD AND APPARATUS FOR ENCODING OF LOW VOLTAGE SWING SIGNALS | EP04744553.1 | 2004-07-12 | EP1649602A1 | 2006-04-26 | KRISHNAN, Rohini; PINEDA DE GYVEZ, Jose, D., J. |
| An encoded-low swing scheme for transmission of a signal across an interconnect bus whereby the current values to be transmitted on the bus are compared with the previous state of the bus. When the number of bits flipping is greater than N , where N is the width of the bus, the decision to transmit the inverted signal values is made. In addition, an 'invert' signal is also sent to the receiver to indicate whether the bus values are inverted or not. These encoded values are then converted into their low swing equivalents and transmitted. In this way, it can be ensured that the energy consumed over the interconnect is minimum. This strategy not only reduces the probability of transitions over the interconnect but also transmits only low swing values to achieve tremendous energy reductions relative to conventional techniques. | ||||||
| 134 | Apparatus for transmitting and reproducing a digital audio signal | EP99308718.8 | 1999-11-03 | EP0999646A2 | 2000-05-10 | Sekii, Yasuaki, Sony Corporation |
A transmitting apparatus and a reproducing apparatus comprising a converter for converting an input one-bit digital signal into a multi-bit signal while effecting down-sampling of a sampling frequency. A one-bit digital signal that could develop an overflow (clip) depending on its modulation degree is attenuated at a stage upstream of the input of the converter, and is amplified at a stage downstream of the converter to avert a clipped state between the stages. |
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| 135 | Procédé de codage binaire à taux de basculement des éléments binaires sensiblement uniforme, et procédés d'incrémentation et de décrémentation correspondants | EP91460045.7 | 1991-10-30 | EP0484259A1 | 1992-05-06 | Burger, Jacques; Girault, Marc |
Le domaine de l'invention est celui du codage binaire. L'invention conceme notamment, mais non exclusivement, le codage de données ayant vocation à être représentées séquentiellement, suivant un ordre préétabli, par exemple dans des compteurs. L'invention a notamment pour objectif de fournir un procédé de codage binaire de données numériques induisant un taux de basculement moyen uniforme, ou sensiblement uniforme, pour chacun des éléments binaires. Cet objectif est atteint à l'aide d'un procédé de codage binaire de données numériques, dans lequel lesdites données sont codées sur deux champs (11,12) distincts d'éléments binaires, un champ de référence (11) et un champ de permutation (12), la séquence d'éléments binaires affectée audit champ de permutation (12) subissant une permutation (13) fonction de la valeur contenue dans ledit champ de référence (11). |
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| 136 | DATA TRANSLATION SYSTEM AND METHOD | PCT/US2007013532 | 2007-06-07 | WO2007149234A3 | 2008-04-03 | CHEUNG FRANK N |
| A data translation system and method. This invention provides a reverse approach to implement a M bit input to N bit output cumulative/monotonic transfer function (where M>N) by a (2**N) x M bit memory instead of the conventional (2**M) x N bit memory. The invention offers substantial circuit size savings without compromising on transfer function resolution and is independent of transfer function mapping algorithms. The M bit memory content of the reverse LUT contains input video group information for each output level and the (2**N) addresses of the reverse LUT represent the corresponding transfer function output levels. This data to address representation of the input to output relationship is exactly opposite to the conventional address to data format. Search and compare methods are employed to locate the input video group that the incoming video belongs to and the associated address of the reverse LUT represents the output. | ||||||
| 137 | SYSTEM AND METHOD FOR ENCODING/DECODING LIVE AUDIO/VIDEO INFORMATION | PCT/AU2005000128 | 2005-02-02 | WO2005074143A8 | 2006-01-05 | CLARK ADAM LESLIE |
| A method and apparatus for encoding/decoding a frame (210n) of audio/video data (106), segment by segment, including a number of pixels (222n) each having a plurality of pixel color components (223n to 227n) by creating a frame group table (220n) in which each pixel (222n) entry includes a dominant pixel color component (323n) of the plurality of pixel color components (223n to 227n), and determining a set of segment reference pixels (361n to 364n) for each encoded segment, wherein each one of the segment reference pixels (361n to 364n) is a pixel within each one of the encoded segments having a most intense dominant pixel color value. | ||||||
| 138 | 정보의 인코딩 및 디코딩 | KR1020127005146 | 2010-07-27 | KR101734596B1 | 2017-05-11 | 마크램,헨리 |
| 정보를인코딩및 디코딩하는방법, 시스템및 장치(컴퓨터저장매체에인코딩된컴퓨터프로그램을포함함). 한측면에서, 인코더에서정보를인코딩하는방법은이산숫자(discrete digit)의집합체를사용하여정보를표현하는신호를수신하는동작, 인코더에의해, 수신된신호를시간-기반코드로변환하는동작, 및시간-기반코드를출력하는동작을포함한다. 시간-기반코드는시간구간으로나누어진다. 시간-기반코드의각각의시간구간은수신된신호에서의숫자에대응한다. 수신된신호의제1 상태의각각의숫자는시간-기반코드의대응하는시간구간내의제1 시간에발생하는이벤트로서표현된다. 수신된신호의제2 상태의각각의숫자는시간-기반코드의대응하는시간구간내의제2 시간에발생하는이벤트로서표현되고, 제1 시간은제2 시간과구별가능하다. 수신된신호에서의숫자의모든상태는시간-기반코드에서의이벤트로표현된다. | ||||||
| 139 | 페이저 디스패리티에 기초하여 데이터를 코딩하기 위한 장치 및 방법 | KR1020147011408 | 2011-10-01 | KR101618478B1 | 2016-05-04 | 케슬링도슨; 팰코너메이너드씨; 슬래터리케빈피; 스키너해리지 |
| 정보를관리하기방법은데이터의비트들을수신하는단계와, 전송스펙트럼의단지하나의주파수에서비트들에대한페이저들을결정하는단계와, 미리결정된범위내에놓이는스펙트럼에너지를갖는페이저를형성하는비트들의페이저들을결합하는단계와, 결합된페이저들의비트들로부터코드워드를형성하는단계를포함한다. | ||||||
| 140 | 여러 가지 수치 포맷의 데이터를 갖는, 데이터 베이스화된 함수 모델의 연산을 위한 모델 연산 유닛 및 제어 장치 | KR1020140079474 | 2014-06-27 | KR1020150004275A | 2015-01-12 | 피셔볼프강; 반노우니코; 군토로안드레 |
| 본 발명은 데이터 베이스화된 함수 모델, 특히 가우스 프로세스 모델을 연산하기 위한, 제어 장치(1) 내 모델 연산 유닛(3)에 관한 것이며, 상기 모델 연산 유닛은
- 데이터 베이스화된 함수 모델을 위한 알고리즘을 순수 하드웨어에 기초하여 연산하기 위해 형성된 연산 코어(31)로서, 이때 데이터 베이스화된 함수 모델은 연산 데이터, 특히 하이퍼 매개변수 및 샘플링 포인트 데이터의 제공하에 연산되는, 연산 코어와, - 연산 코어(31)에 연산 데이터의 일부, 특히 제공된 샘플링 포인트 데이터를 설정된 수치 포맷으로 제공하기 위해 형성된, 순수 하드웨어에 기초한 변환 유닛(35)을 포함한다. |
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