| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 21 | VECTORIZED REBINNING FOR FAST DATA DOWN-SAMPLING | US13600992 | 2012-08-31 | US20140062732A1 | 2014-03-06 | Bruce H. Dean; Jeffrey S. Smith; David L. Aronstein |
| A rebinning device includes a rebinning engine that transforms signal data from a first format to a second format with vectorized binning. Moreover, a data storage operably coupled to the rebinning engine stores the signal data in the second format. The rebinning device may optionally includes a capturing engine that captures the signal data in the first format and a rendering engine that renders the signal data in the second format. | ||||||
| 22 | DECODING APPARATUS, METHOD, AND PROGRAM | US13238397 | 2011-09-21 | US20120110415A1 | 2012-05-03 | Takashi Yokokawa; Osamu Shinya; Yutaka Nakada; Ryoji Ikegaya |
| The present disclosure provides a decoding apparatus including, a storage section configured to store a reception value, a detection section configured to detect an error in the reception value, an error correction section configured to correct an error detected by the detection section with respect to the reception value, and a control section configured to control reading of the reception value from the storage section, wherein the control section controls first reading such that the reception value is read into the detection section and, after detection of an error by the detection section, second reading such that substantially the same reception value as that in the first reading is read into the error correction section. | ||||||
| 23 | Method and apparatus for computing soft decision input metrics to a turbo decoder | US12111513 | 2008-04-29 | US07881394B2 | 2011-02-01 | Nagabhushana Sindhushayana |
| A method and apparatus for computing soft decision input metrics to a turbo decoder includes circuits associated with eight-ary phase shift keyed (8PSK) modulation and sixteen-ary quadrature amplitude modulation (16QAM). In both implementations log-likelihood ratio (LLR) metrics on code symbols are estimated as products of various constant values and various combinations of the in-phase and quadrature components of a demodulated soft decision. In the implementation associated with the 16QAM modulation scheme, an estimate of the carrier-signal-to-interference (C/I) ratio is also used to estimate some of the LLR metrics. Estimates of the LLR metrics may also be obtained in association with generalized square QAM and M-ary PSK modulation schemes including, e.g., 64QAM, 256QAM, and 16PSK. | ||||||
| 24 | METHOD AND APPARATUS FOR COMPUTING SOFT DECISION INPUT METRICS TO A TURBO DECODER | US12111513 | 2008-04-29 | US20090323846A1 | 2009-12-31 | Nagabhushana Sindhushayana |
| A method and apparatus for computing soft decision input metrics to a turbo decoder includes circuits associated with eight-ary phase shift keyed (8PSK) modulation and sixteen-ary quadrature amplitude modulation (16QAM). In both implementations log-likelihood ratio (LLR) metrics on code symbols are estimated as products of various constant values and various combinations of the in-phase and quadrature components of a demodulated soft decision. In the implementation associated with the 16QAM modulation scheme, an estimate of the carrier-signal-to-interference (C/I) ratio is also used to estimate some of the LLR metrics. Estimates of the LLR metrics may also be obtained in association with generalized square QAM and M-ary PSK modulation schemes including, e.g., 64QAM, 256QAM, and 16PSK. | ||||||
| 25 | Method and apparatus for computing soft decision input metrics to a turbo decoder | US11671459 | 2007-02-05 | US07583744B2 | 2009-09-01 | Nagabhushana Sindhushayana |
| A method and apparatus for computing soft decision input metrics to a turbo decoder includes circuits associated with eight-ary phase shift keyed (8PSK) modulation and sixteen-ary quadrature amplitude modulation (16QAM). In both implementations log-likelihood ratio (LLR) metrics on code symbols are estimated as products of various constant values and various combinations of the in-phase and quadrature components of a demodulated soft decision. In the implementation associated with the 16QAM modulation scheme, an estimate of the carrier-signal-to-interference (C/I) ratio is also used to estimate some of the LLR metrics. Estimates of the LLR metrics may also be obtained in association with generalized square QAM and M-ary PSK modulation schemes including, e.g., 64QAM, 256QAM, and 16PSK. | ||||||
| 26 | Method and Apparatus for Soft Decision Input Metrics To A Turbo Decoder | US11671459 | 2007-02-05 | US20070127605A1 | 2007-06-07 | Nagabhushana Sindhushayana |
| A method and apparatus for computing soft decision input metrics to a turbo decoder includes circuits associated with eight-ary phase shift keyed (8PSK) modulation and sixteen-ary quadrature amplitude modulation (16QAM). In both implementations log-likelihood ratio (LLR) metrics on code symbols are estimated as products of various constant values and various combinations of the in-phase and quadrature components of a demodulated soft decision. In the implementation associated with the 16QAM modulation scheme, an estimate of the carrier-signal-to-interference (C/I) ratio is also used to estimate some of the LLR metrics. Estimates of the LLR metrics may also be obtained in association with generalized square QAM and M-ary PSK modulation schemes including, e.g., 64QAM, 256QAM, and 16PSK. | ||||||
| 27 | Method of decoding utilizing a recursive table-lookup decoding method | US10601948 | 2003-06-23 | US20040025106A1 | 2004-02-05 | Peter C. Massey |
| The invention is a recursive table-lookup decoding algorithm (RTLD alg.) and also a method of decoding parallel-concatenated convolutional codes (PCCC's) by utilizing the RLTD algorithm so as to not require a mathematical/computational processor. The invention's recursive table-lookup decoding algorithm approximates a maximum-a-posteriori (MAP or BCJR) decoder for convolutional codes. Parallel-concatenated convolutional codes (PCCC's) are error-correcting binary codes that are comprised of two or more constituent convolutional subcodes (encoders) which share the same block of information bits, but in different interleaved time-index orderings. Prior art of decoding devices for PCCC's require a mathematical/computational processor to perform computations such as multiplications and additions along with possibly other computations. The method of decoding PCCC's in this invention is summarized as taking quantized code symbols and iteratively performing the invention's recursive table-lookup decoding algorithm for each constituent convolutional subcode of the PCCC for a certain number of iterations whereby the decoded estimates for the information bits are obtained from a block of most-significant bits. The recursive table-lookup decoding algorithm recursively reads from a set of pre-stored lookup-tables. The invention includes a technique to create the binary address-words for accessing the lookup-tables. The invention's algorithm can be made to closely approximate the well-known MAP/BCJR decoding algorithm by appropriately pre-storing the set of lookup-tables. Moreover, the algorithm can be made to closely approximate modified versions of the BCJR algorithm that may be better at decoding specific PCCC's. The method of decoding in the invention can be implemented in software or hardware. A hardware implementation of the invention's method of decoding would not require a mathematical/computational processor. The invention can be implemented with reasonably small sized lookup-tables for low-complexity PCCC's such as those with 2-state convolutional encoders. | ||||||
| 28 | Method for Viterbi decoder implementation | EP12195599.1 | 2012-12-05 | EP2621092A1 | 2013-07-31 | Catthoor, Francky; Naessens, Frederik; Raghavan, Praveen |
The present invention relates to a method for Viterbi decoder implementation, said implementation being constrained with respect to energy efficiency and having requirements related to throughput and area budget. The method comprises the steps of |
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| 29 | Decoding apparatus, method, and program | EP11180522.2 | 2011-09-08 | EP2448126A1 | 2012-05-02 | Yokokawa, Takashi; Shinya, Osamu; Nakada, Yutaka; Ikegaya, Ryoji |
A decoding apparatus including, a storage section configured to store a reception value, a detection section configured to detect an error in the reception value, an error correction section configured to correct an error detected by the detection section with respect to the reception value, and a control section configured to control reading of the reception value from the storage section, wherein the control section controls first reading such that the reception value is read into the detection section and, after detection of an error by the detection section, second reading such that substantially the same reception value as that in the first reading is read into the error correction section.
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| 30 | METHOD AND APPARATUS FOR COMPUTING SOFT DECISION INPUT METRICS TO A TURBO DECODER | EP01916461.5 | 2001-03-07 | EP1264408B1 | 2011-04-20 | SINDHUSHAYANA, Nagabhushayana |
| A method and apparatus for computing soft decision input metrics to a turbo decoder includes circuits associated with eight-ary phase shift keyed (8PSK) modulation and sixteen-ary quadrature amplitude modulation (16QAM). In both implementations log-likelihood ratio (LLR) metrics on code symbols are estimated as products of various constant values and various combinations of the in-phase and quadrature components of a demodulated soft decision. In the implementation associated with the 16QAM modulation scheme, an estimate of the carrier-signal-to-interference (C/I) ratio is also used to estimate some of the LLR metrics. Estimates of the LLR metrics may also be obtained in association with generalized square QAM and M-ary PSK modulation schemes including, e.g., 64QAM, 256QAM, and 16PSK. | ||||||
| 31 | 터보 디코더에 대한 소프트 판정 입력 메트릭을 계산하는방법 및 장치 | KR1020027011744 | 2001-03-07 | KR100770189B1 | 2007-10-25 | 신드후샤야나나가브후샤야나 |
| 터보 디코더에 대한 소프트 판정 입력 메트릭을 계산하는 방법 및 장치가 8-진 위상 시프트 키잉(8PSK) 변조 및 16-진 직교 진폭 변조(16QAM)와 관련한 회로를 포함한다. 양 실시형태에서, 코드 심볼에 대한 로그-가능성비(LLR) 메트릭이, 다양한 상수값과 복조된 소프트 판정치의 동상 및 직교 성분의 다양한 결합과의 곱으로 추정된다. 16QAM 변조방식과 관련한 실시형태에서는, 반송신호 대 간섭(C/I) 비의 추정값이 몇몇 LLR 메트릭을 추정하는데 또한 이용된다. 또한, LLR 메트릭의 추정값은, 예를 들어 64QAM, 256QAM, 및 16PSK 를 포함하는 일반화된 구형 QAM 및 M PSK 변조방식과 관련하여 구할 수 있다. | ||||||
| 32 | 터보 디코더에 대한 소프트 판정 입력 메트릭을 계산하는방법 및 장치 | KR1020027011744 | 2001-03-07 | KR1020030005217A | 2003-01-17 | 신드후샤야나나가브후샤야나 |
| 터보 디코더에 대한 소프트 판정 입력 메트릭을 계산하는 방법 및 장치가 8 위상 변조된(8PSK) 변조 및 16 직교 진폭 변조(16QAM)와 관련한 회로를 포함한다. 양 실시형태에서, 코드 심볼에 대한 대수근사비(LLR) 메트릭이, 다양한 상수값과 복조된 소프트 판정의 동상 및 직교 성분의 다양한 결합과의 곱으로 추정된다. 16QAM 변조방식과 관련한 실시형태에서는, 반송신호 대 간섭(C/I) 비의 추정값이 몇몇 LLR 메트릭을 추정하는데 또한 이용된다. 또한, LLR 메트릭의 추정값은, 예를 들어 64QAM, 256QAM, 및 16PSK 를 포함하는 일반화된 구형 QAM 및 M PSK 변조방식과 관련하여 구할 수 있다. | ||||||
| 33 | METHOD AND APPARATUS FOR COMPUTING SOFT DECISION INPUT METRICS TO A TURBO DECODER | PCT/US0107316 | 2001-03-07 | WO0167617A3 | 2001-12-20 | SINDHUSHAYANA NAGABHUSHAYANA |
| A method and apparatus for computing soft decision input metrics to a turbo decoder includes circuits associated with eight-ary phase shift keyed (8PSK) modulation and sixteen-ary quadrature amplitude modulation (16QAM). In both implementations log-likelihood ratio (LLR) metrics on code symbols are estimated as products of various constant values and various combinations of the in-phase and quadrature components of a demodulated soft decision. In the implementation associated with the 16QAM modulation scheme, an estimate of the carrier-signal-to-interference (C/I) ratio is also used to estimate some of the LLR metrics. Estimates of the LLR metrics may also be obtained in association with generalized square QAM and M-ary PSK modulation schemes including, e.g., 64QAM, 256QAM, and 16PSK. | ||||||
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