序号 专利名 申请号 申请日 公开(公告)号 公开(公告)日 发明人
121 MULTI-WIRE SYMBOL TRANSITION CLOCKING SYMBOL ERROR CORRECTION US14949290 2015-11-23 US20160149729A1 2016-05-26 Shoichiro Sengoku
Apparatus, systems and methods for error detection in transmissions on a multi-wire interface are disclosed. A method for correcting transmission errors in multi-wire transition-encoded interface may include determining whether a symbol error is present in the sequence of symbols based on a value of an error detection code (EDC) in the received plurality of bits, generating one or more permutations of the sequence of symbols, where each permutation includes one symbol that is different from corresponding symbols in the sequence of symbols and different from corresponding symbols in other permutations. A permutation in the one or more permutations may be identified as including a corrected sequence of symbols when it produces a decoded EDC value that matches an expected EDC value. The expected EDC value may correspond to a predefined value for EDCs transmitted over the multi-wire interface to enable detection of up to two symbol errors at the receiver.
122 ERROR DETECTION CONSTANTS OF SYMBOL TRANSITION CLOCKING TRANSCODING US14949435 2015-11-23 US20160147596A1 2016-05-26 Shoichiro Sengoku
Apparatus, systems and methods for error detection in transmissions on a multi-wire interface are disclosed. A method for transmitting data on the multi-wire interface includes transmitting data on a multi-wire interface includes obtaining a plurality of bits to be transmitted over a plurality of connectors, converting the plurality of bits into a sequence of symbols, and transmitting the sequence of symbols on the plurality of connectors. A predetermined number of least significant bits in the plurality of bits may be used for error detection. The predetermined number of least significant bits may have a constant value that is different from each of a plurality of error values. A symbol error affecting one or two symbols in the sequence of symbols may cause a decoded version of the predetermined number of least significant bits to have value that is one of a plurality of error values.
123 Distributed Storage of Data US14339757 2014-07-24 US20160026543A1 2016-01-28 Chao Tian
Multi-reliability regenerating (MRR) codes are introduced regenerate stored data. An individual regenerating code is used for each message to satisfy a respective reliability requirement for the data. With repair consideration, mixing may be used to improve upon the performance of a coding solution.
124 TECHNIQUES TO PERFORM FORWARD ERROR CORRECTION FOR AN ELECTRICAL BACKPLANE US14698102 2015-04-28 US20160020870A1 2016-01-21 Ilango S. Ganga; Luke Chang; Andrey Belogolovy; Ovchinnikov Andrei
Techniques to perform forward error correction for an electrical backplane are described.
125 MULTI-RATE TRANSMISSIONS OVER TWINAX CABLES US14466327 2014-08-22 US20150326376A1 2015-11-12 Dariush Dabiri; Tarun Gupta; Venkatesh Nagapudi
Cable systems and assemblies integrate a reduced number of twin axial cables to transmit and received in a full-duplex transmission signals at transmission speeds greater than or equal to one hundred Giga bytes per second. The reduced number of twin axial cables comprise four or less twin axial cables, in which each pair forms a single twin axial full-duplex cable for passive or active communication of the signals at multiple different transmission rates concurrently. A processor can be integrated with the twin axial cables and operate to encode the signals for fast transmission speeds at the different transmission rates.
126 METHODS AND SYSTEMS FOR ENHANCED DETECTION OF ELECTRONIC TRACKING MESSAGES US14802373 2015-07-17 US20150326350A1 2015-11-12 Arunas G. Macikunas; Baljinder S. Randhawa; Margaret J. Browning; Philip M. Miller; Christopher M. Short
Methods and systems for enhancing the detectability of electronic tracking messages are provided. Transmitters apply error protection encoding to the payload portion of messages to be transmitted. Transmitted messages are received by a satellite or other surveillance platform employing a compatible radio frequency receiver to collect message signals over a large area or great distance. Candidate messages are identified and the error protection encoding decoded to recover messages.
127 Device for encoding and decoding using smaller block of symbols US14220241 2014-03-20 US09183080B2 2015-11-10 Aalbert Stek; Cornelis Marinus Schep; Martinus Wilhelmus Blum
A method of encoding user data into codevectors of an error correcting code, includes generating a first block of data symbols including user data symbols and dummy data symbols; encoding the first block using an ECC encoder to obtain a codeword comprising the first block of data symbols and a second block of parity symbols; and generating a codevector by selecting a user data portion of the user data symbols from the first block and a parity portion of the parity symbols from the second block. The sum of a number of the user data portion and a number of the parity portion is smaller than the sum of a number of the user data symbols and a number of the parity symbols of the second block.
128 Method and apparatus for transmission and reception of in-band on-channel radio signals including complementary low density parity check coding US13835011 2013-03-15 US09136874B2 2015-09-15 Brian W. Kroeger; Paul J. Peyla
A method of transmitting digital information includes: receiving a plurality of information bits representing audio information and/or data; encoding the information bits using complementary low density parity check coding to produce a composite codeword and a plurality of independently decodable semi-codewords; modulating at least one carrier signal with the forward error corrected bits; and transmitting the carrier signal(s). Transmitters that implement the method, and receivers that receive signals produced by the method, are also provided.
129 SEMICONDUCTOR DEVICE AND METHOD OF WRITING DATA TO SEMICONDUCTOR DEVICE US14671766 2015-03-27 US20150207629A1 2015-07-23 Daisuke OSHIDA; Shigeru FURUTA; Masayuki HIROKAWA; Akira YAMAZAKI; Takashi FUJIMORI; Shigemasa SHIOTA
A semiconductor device in related art has a problem that security at the time of writing data cannot be sufficiently assured. A semiconductor device of the present invention has: a unique code generating unit generating an initial unique code which is a value unique to a device and includes an error in a random bit; a first error correcting unit correcting an error in the initial unique code to generate an intermediate unique code; a second error correcting unit correcting an error in the intermediate unique code to generate a first determinate unique code; and a decrypting unit decrypting, with the first determinate unique code, transmission data obtained by encrypting confidential information with key information generated on the basis of the intermediate unique code by an external device to generate confidential information.
130 Semiconductor device and method of writing data to semiconductor device US13523969 2012-06-15 US09026882B2 2015-05-05 Daisuke Oshida; Shigeru Furuta; Masayuki Hirokawa; Akira Yamazaki; Takashi Fujimori; Shigemasa Shiota
A semiconductor device has: a unique code generating unit generating an initial unique code which is a value unique to a device and includes an error in a random bit; a first error correcting unit correcting an error in the initial unique code to generate an intermediate unique code; a second error correcting unit correcting an error in the intermediate unique code to generate a first determinate unique code; and a decrypting unit decrypting, with the first determinate unique code, transmission data obtained by encrypting confidential information with key information generated on the basis of the intermediate unique code by an external device to generate confidential information.
131 Method and Apparatus for Bit-Interleaving US14042171 2013-09-30 US20150095594A1 2015-04-02 Dusan Suvakovic; Adrian J. de Lind van Wijngaarden
A manner of processing data for transmission in a data communication network. Node having a main memory and an interleaver is provided. Received data is stored in the main memory and a bandwidth map is prepared. The data is then selectively read out and pre-processing according to the bandwidth map and stored in an interleaver memory. The date is later read out and post-processed before interleaving into a downstream data frame. The pre- and post-processing provide the data in a more efficient form for interleaving.
132 High speed transceiver based on concatenates of a leech lattice with binary and nonbinary codes US14466347 2014-08-22 US08989283B1 2015-03-24 Dariush Dabiri
A transceiver architecture can contain an encoder and a decoder for communicating high speed transmissions. The encoder can modulate signal data for being mapped in a constellation that is generated based on concatenations of a leech lattice having binary and non-binary codes. The data can be transmitted at a high speed according to the constellation with an embedded leech lattice configuration in order to generate a coding gain. A decoder operates to decode the received input signal data with a decreased latency or a minimal latency with a high spectral efficiency.
133 Secure transmission with error correcting code US12086899 2006-12-20 US08935527B2 2015-01-13 Aurelien Francillon; Vincent Roca; Christoph Neumann; Pascal Moniot
The invention concerns a method and a system for encoding digital data (DATA) represented by source symbols, with an error correcting code generating parity symbols from, for each parity symbol, a plurality of source symbols and at least one parity symbol of preceding rank, including at least encrypting once (54) at least one first value (P1) into several encrypted values and integrating at least one combination (P1,j) of said encrypted values to compute (55) at least one part (P2 . . . Pn−k) of said parity symbols.
134 Methods and systems for enhanced detection of e-Navigation messages US13786059 2013-03-05 US08904257B2 2014-12-02 Baljinder S. Randhawa; Arunas G. Macikunas; Margaret J. Browning; Philip L. Miller; Christopher M. Short
Methods and systems for enhancing the detectability of maritime e-Navigation messages are provided. Transmitters apply error protection encoding to the payload portion of messages to be transmitted, which are wrapped in a standard e-Navigation message format such as that used by the Automatic Identification System. Transmitted messages are received by a satellite or other surveillance platform employing a compatible radio frequency receiver to collect message signals over a large area or great distance. Candidate messages are identified and the error protection encoding decoded to recover messages.
135 System on chip and method for cryptography using a physically unclonable function US13427589 2012-03-22 US08750502B2 2014-06-10 Michael S. Kirkpatrick; Samuel Kerr; Elisa Bertino
A system and method for performing cryptographic functions in hardware using read-N keys comprising a cryptographic core, seed register, physically unclonable function (PUF), an error-correction core, a decryption register, and an encryption register. The PUF configured to receive a seed value as an input to generate a key as an output. The error-correction core configured to transmit the key to the cryptographic core. The encryption register and decryption register configured to receive the seed value and the output. The system, a PUF ROK, configured to generate keys that are used N times to perform cryptographic functions.
136 Method and system for providing low density parity check (LDPC) coding for scrambled coded multiple access (SCMA) US13791949 2013-03-09 US08683292B2 2014-03-25 Lin-Nan Lee; Mustafa Eroz
A multiple access scheme is described. One or more encoders are configured to encode a plurality of bit streams using Low Density Parity Check (LDPC) coding. The bit streams correspond to a respective plurality of terminals. The plurality of bit streams are converted to provide a multiple access scheme for the terminals.
137 CHASE CODING FOR ERROR CORRECTION OF ENCRYPTED PACKETS WITH PARITY US13848624 2013-03-21 US20140059407A1 2014-02-27 Robert W. Zopf; Prasanna Desai; Norbert Grunert
A plurality of encrypted packets having common payload data are received, wherein each of the plurality of encrypted packets includes a corresponding parity check field, and wherein a corresponding parity check syndrome for each of the plurality of encrypted packets indicates at least one bit error. A payload portion of each of the plurality of encrypted packets is decrypted to generate a plurality of decrypted payload portions. At least one chase coding technique is used to generate a corrected decrypted payload, based on at least one candidate bit error position and further based on the corresponding parity check syndrome for at least one of the plurality of encrypted packets.
138 TECHNIQUES TO PERFORM FORWARD ERROR CORRECTION FOR AN ELECTRICAL BACKPLANE US13733271 2013-01-03 US20140019827A1 2014-01-16 Ilango S. Ganga; Luke Chang; Andrey Belogolovy; Ovchinnikov Andrei
Techniques to perform forward error correction for an electrical backplane are described.
139 Digital broadcast transmitter and receiver and method for processing stream thereof US12427005 2009-04-21 US08571144B2 2013-10-29 Yong-sik Kwon; June-hee Lee
A digital broadcast receiver is provided. The digital broadcast receiver includes a receiver which receives a transport stream transmitted from a digital broadcast transmitter, an additional data stream detector which determines whether the received transport stream includes an additional data stream or not, and a processor which process the additional data stream if the transport stream include the additional data stream, and the transport stream including the additional data stream is a transport stream into which a training signal is inserted by the digital broadcast transmitter which resets memories used for trellis-encoding at predetermined time. Accordingly, it is easily detected whether the transport stream includes the additional data stream or not.
140 Architecture and control of reed-solomon error identification and evaluation US13572783 2012-08-13 US08527850B1 2013-09-03 Ichiro Kikuchi; Siu-Hung Fred Au; Gregory Burd; Zining Wu; Jun Xu; Tony Yoon
Systems and methods are provided for implementing error identification and evaluation for a Reed-Solomon (RS) error-correction code (ECC) system. The BMA algorithm and/or list decoding may produce one or more error locator polynomials that are related to a decision-codeword. An accelerated Chien search can be used to more quickly evaluate the one or more error locator polynomial. If the accelerated Chien search identifies a valid error locator polynomial, a normal Chien search can be used to identify error locations, and Forney's algorithm or an equivalent technique can be used to evaluate the error values. A RS ECC decoder can include a computation circuit that evaluates an error locator polynomial or an error evaluator polynomial. The computation circuit can include computation components that receive the coefficients of the polynomials.
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