序号 专利名 申请号 申请日 公开(公告)号 公开(公告)日 发明人
61 Efficient method for redundant storage of a set of encoded data slices US15195252 2016-06-28 US10061648B2 2018-08-28 Brian S. Ciborowski; Justin M. Jarczyk
A method includes dispersed storage error encoding, by a device of the dispersed storage network (DSN), a data segment of a data object into a set of encoded data slices. The method further includes sending, by the device, a set of write fan out with redundancy sharing requests to a set of storage units of the DSN. The method further includes, in response to the set of write fan out with redundancy sharing requests, storing, by the set of storage units, a number of copies of a decode threshold number of encoded data slices of the set of encoded data slices. The method further includes storing, by the set of storage units, a single copy of a redundancy number of encoded data slices of the set of encoded data slices.
62 Multi-stage slice recovery in a dispersed storage network US15184614 2016-06-16 US10025665B2 2018-07-17 Jason K. Resch
A method for use by a computing device in a dispersed storage network (DSN) to recover corrupt encoded data slices. In response to a request to storage units of the DSN for encoded data slices corresponding to a data segment, the computing device of a receives less than a decode threshold number of valid encoded data slices and at least one integrity error message that provides an indication of a corrupt encoded data slice. The computing device requests and receives at least one corrupt encoded data slice corresponding to the integrity error message(s). Utilizing at least one correction approach involving stored integrity data, the computing device then corrects the corrupt slice(s) to produce a decode threshold number of encoded data slices in order to decode the corresponding data segment. A variety of correction approaches may be employed, including a multi-stage approach that utilizes data from both valid and invalid slices.
63 Method and device for measuring the current signal-to-noise ratio when decoding LDPC codes US15296650 2016-10-18 US09793928B2 2017-10-17 Nikolay Vazhenin; Andrey Veitsel; Ivan Kirianov
A method for measuring a signal-to-noise ratio when decoding Low Density Parity Check (LDPC) codes is provided. The method includes receiving from an input of a demodulator an input code word with “strong” or “weak” solutions, decoding the input code word in a LDPC decoder using a predetermined dependence of a mean number of iterations on the signal-to-noise ratio, recording a number of iterations performed during the decoding of the input code word, averaging derived values of the number of iterations for a specified time interval, estimating a signal-to-noise ratio based on averaged derived values of the number of iterations and based on the predetermined dependence of the mean number of iterations on the signal-to-noise ratio, and generating an output decoded code word.
64 TECHNIQUES TO PERFORM FORWARD ERROR CORRECTION FOR AN ELECTRICAL BACKPLANE US15360005 2016-11-23 US20170104554A1 2017-04-13 Ilango S. Ganga; Luke Chang; Andrey Belogolovy; Andrei Ovchinnikov
Techniques to perform forward error correction for an electrical backplane are described.
65 Maximum-likelihood decoder in a memory controller for synchronization US13991880 2011-09-28 US09294224B2 2016-03-22 Ravi Motwani
Described herein are apparatus, system, and method for data synchronization via a maximum-likelihood decoder in a memory controller. The method comprises receiving a constrained codeword from a non-volatile memory (NVM) via a channel, the constrained codeword including an appended bit-stream; and decoding the received constrained codeword by reconstructing the appended bit-stream and invoking a synchronization procedure that applies a maximum-likelihood (ML) estimator to estimate locations of any insertion, deletion, or error in the reconstructed appended bit-stream.
66 TECHNIQUES TO PERFORM FORWARD ERROR CORRECTION FOR AN ELECTRICAL BACKPLANE US14698102 2015-04-28 US20160020870A1 2016-01-21 Ilango S. Ganga; Luke Chang; Andrey Belogolovy; Ovchinnikov Andrei
Techniques to perform forward error correction for an electrical backplane are described.
67 FORWARD ERROR CORRECTION CODEWORD SYNCHRONIZATION METHOD, DEVICE, AND SYSTEM US14836597 2015-08-26 US20150365109A1 2015-12-17 Fanglin Sun
Embodiments of the present invention provide a forward error correction codeword synchronization method, device, and system. The method is: sending, by a central office device, synchronization information of an FEC codeword to a terminal device by using a management channel, where the information includes information about an agreed location of an FEC codeword, and the information about the agreed location of the first FEC codeword indicates a location that is of the first FEC codeword and is corresponding to data at an agreed location of an agreed time-frequency resource block; and receiving, by the terminal device, the synchronization information that is of the FEC codeword and is sent by the central office device, and adjusting a status parameter of an encoder or a decoder according to the information, so as to complete codeword synchronization. The embodiments of the present invention are used for FEC codeword synchronization.
68 Incremental redundancy transmission in a MIMO communication system US10801624 2004-03-15 US08908496B2 2014-12-09 Tamer Kadous
For an incremental redundancy (IR) transmission in a MIMO system, a transmitter processes (e.g., encodes, partitions, interleaves, and modulates) a data packet based on a selected rate to obtain multiple data symbol blocks. The transmitter transmits one data symbol block at a time until a receiver correctly recovers the data packet or all blocks are transmitted. Whenever a data symbol block is received from the transmitter, the receiver detects a received symbol block to obtain a detected symbol block, processes (e.g., demodulates, deinterleaves, re-assembles, and decodes) all detected symbol blocks obtained for the data packet, and provides a decoded packet. If the decoded packet is in error, then the receiver repeats the processing when another data symbol block is received for the data packet. The receiver may also perform iterative detection and decoding on the received symbol blocks for the data packet multiple times to obtain the decoded packet.
69 Error concealment guided robustness US13523072 2012-06-14 US08819525B1 2014-08-26 Stefan Holmer
Error concealment guided robustness may include identifying a current portion of a current video stream. Identifying the current portion may include identifying a feature, or a vector of features, for the current portion. An estimated vulnerability metric may be identified based on the feature and an associated learned feature weight. An error correction code for the current portion may be generated based on the estimated vulnerability metric. Error concealment guided robustness may include generating learned feature weights based on one or more training videos by generating vulnerability metrics for the training videos and identifying relationships between features of the training videos and the vulnerability metrics generated for the training videos.
70 Facilitating synchronization between a base station and a user equipment US13863203 2013-04-15 US08718034B2 2014-05-06 Fredrik Berggren
Methods and apparatus are provided for facilitating synchronization between a base station (BS) and a user equipment (UE) in a mobile communication system. The UE receives a synchronization signal originated by the BS. The synchronization signal is encoded with a selected cyclically permutable (CP) codeword, the selected CP codeword being selected from a set of CP codewords. Encoding of the synchronization signal is facilitated by a repetitive cyclically permutable (RCP) codeword derivable from the selected CP codeword. The RCP codeword has a plurality of codeword elements each associated with a value, the value of at least one codeword element in the RCP codeword being repeated in another codeword element position in the RCP codeword. And the synchronization signal is decoded in accordance with repetitive structure of the RCP codeword.
71 Frame boundary detection and synchronization system for data stream received by ethernet forward error correction layer US12894274 2010-09-30 US08667373B2 2014-03-04 Yin He; Yi Fan Lin; Yang Liu; Hao Yang
The present invention discloses a frame boundary detection system and a synchronization system for a data stream received by an Ethernet Forward Error Correction layer. The frame boundary detection system includes a shifter, two descramblers, a syndrome generator and trapper. The error trapper includes a big-little endian mode controller for controlling the big-little endian conversion of the error trapper. If the error trapper operates in the big endian mode, the error trapper implements the function of the syndrome generator, operates at the same time with the syndrome generator, and performs a second FEC check, wherein when the shifter performs the FEC check by intercepting data with a length of one frame plus A bits, two start positions of the frame can be verified, where A is a positive integer less than a length of one frame. The invention can improve the frame boundary detection speed and the frame synchronization speed, and increase only a few hardware overheads.
72 TECHNIQUES TO PERFORM FORWARD ERROR CORRECTION FOR AN ELECTRICAL BACKPLANE US13733271 2013-01-03 US20140019827A1 2014-01-16 Ilango S. Ganga; Luke Chang; Andrey Belogolovy; Ovchinnikov Andrei
Techniques to perform forward error correction for an electrical backplane are described.
73 ENCODING AND DETECTING CELL-SPECIFIC INFORMATION IN A TELECOMMUNICATION SYSTEM US13331504 2011-12-20 US20120087365A1 2012-04-12 Fredrik BERGGREN
Method and apparatus are provided for encoding cell-specific information in a telecommunication system. Cell-specific information is encoded by a synchronization code. A synchronization signal including the synchronization code is sent, wherein the synchronization code includes a first repetitive cyclically permutable codeword generated from a first codeword ( c 1 , c 2 , …   c i   …  , c ⌈ M 2 ⌉ ) , where   ⌈ M 2 ⌉ is the smallest integer not less than M/2, 0≦ci≦N, 1≦i≦M for all i, M, N are positive integers, and the repetitive structure of the first repetitive cyclically permutable codeword is given by repeating the value of at least one codeword element of the first repetitive cyclically permutable codeword in at least one other codeword element position within the first repetitive cyclically permutable codeword.
74 Techniques to perform forward error correction for an electrical backplane US12964271 2010-12-09 US08108756B2 2012-01-31 Ilango S. Ganga; Luke Chang; Andrey Belogolovy; Andrei Ovchinnikov
Techniques to perform forward error correction for an electrical backplane are described. An apparatus comprises a physical layer unit having a forward error correction sublayer to perform forward error correction using a single bit to represent a two bit synchronization header.
75 Techniques to perform forward error correction for an electrical backplane US12639797 2009-12-16 US07873892B2 2011-01-18 Ilango S. Ganga; Luke Chang; Andrey Belogolovy; Andrei Ovchinnikov
Techniques to perform forward error correction for an electrical backplane are described. An apparatus comprises a physical layer unit having a forward error correction sublayer to perform forward error correction using a single bit to represent a two bit synchronization header.
76 Techniques to perform forward error correction for an electrical backplane US11325765 2006-01-04 US07676733B2 2010-03-09 Ilango S. Ganga; Luke Chang; Andrey Belogolovy; Andrei Ovchinnikov
Techniques to perform forward error correction for an electrical backplane are described. An apparatus comprises a physical layer unit having a forward error correction sublayer to perform forward error correction using a single bit to represent a two bit synchronization header.
77 Coding system and decoding system US11584614 2006-10-23 US07472317B2 2008-12-30 Yoshihiro Kikuchi; Toshiaki Watanabe; Kenshi Dachiku; Takeshi Chujoh; Takeshi Nagai
In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.
78 Coding system and decoding system US11584557 2006-10-23 US07454669B2 2008-11-18 Yoshihiro Kikuchi; Toshiaki Watanabe; Kenshi Dachiku; Takeshi Chujoh; Takeshi Nagai
In a coding system wherein an error correction/detection coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detection are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting-/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.
79 Coding apparatus and decoding apparatus for transmission/storage of information using synchronization code US11418106 2006-05-05 US07441162B2 2008-10-21 Yoshihiro Kikuchi; Toshiaki Watanabe; Kenshi Dachiku; Takeshi Chujoh; Takeshi Nagai
An output coding apparatus includes a coder for coding an inputted bitstream to an error correction and/or detection code composed of information bits and check bits; and a bitstream assembling section for assembling an outputted bitstream by inserting a synchronization code at any one of a plurality of synchronization code insertion positions previously determined in the outputted bitstream, arranging the information bits at any desired positions of the bitstream, and by arranging the check bits at positions other than the synchronization code insertion positions in the bitstream. Therefore, when the coding apparatus is combined with a resynchronization method using both an error correction and/or detection code and a synchronization code, it is possible to solve a problem caused by pseudo-synchronization or synchronization-loss pull-out or step-out due to erroneous detection of the synchronization code.
80 Synchronization code methods US10897281 2004-07-21 US07353436B2 2008-04-01 Ali Taha; John Eldon
A system, method and computer software product are provided. One embodiment of the present invention provides a method for generating and employing numerical sequences that may be used for synchronization codes. In one embodiment of the present invention, the derivation of numerical sequences, or codes is based on an encoding algorithm. These codes enable synchronization between communicating devices, and may also be used for channelization. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules that allow a reader to quickly ascertain the subject matter of the disclosure contained herein. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.
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