序号 专利名 申请号 申请日 公开(公告)号 公开(公告)日 发明人
181 Method and system for content-aware mapping/error protection EP07005956.3 2007-03-22 EP1883183A3 2012-08-08 Karaoguz, Jeyhan; Honary, Hooman; Seshadri, Nambirajan; Trachewsky, Jason

Methods and systems for content-aware mapping/error protection are disclosed. Aspects of one method may include controlling a MAC layer and/or a PHY layer (PHY/MAC layer), in a wireless communication device to wirelessly communicate multimedia information based on content of the multimedia information, which may comprise video information, audio information, and/or data. The controlling of the PHY/MAC layer may comprise selecting a forward error correction code and modulation to be applied to portions of the multimedia information, and selecting one or more antenna to transmit the portions of the multimedia information. The selection criteria may be based on priority assigned to the portions of the multimedia information, and on feedback information from the receiving device and/or a receiver co-located with the device transmitting the multimedia information.

182 Variable rate coding for forward link EP10183999.1 2000-11-16 EP2293481A2 2011-03-09 Proctor, James A,. Jr.

A technique for encoding a signal used in a digital communication system in which individual traffic channel data rates may be adapted to specific channel conditions. In particular, a forward error correction coding rate is adapted for individual channels while at the same time maintaining a fixed block size independent of the FEC coding rate. This allows the system data rate to adapt to the channel conditions experienced by a specific user. Thus, users experiencing good communication conditions with low multipath distortion may be allocated higher capacity, whereas users with significant multipath distortion may make use of lower rate (higher levels of coding) error codes to maintain high quality. Messages are sent from a transmitter to a receiver to inform the receiver of the coding rate implemented at any given point in time. These parameters may be adjusted independent of tranmitted power level through the expedient of ensuring that size of a transmitted frame remains constant, while permitting the ability to changeFEC coding rates and FEC block sizes.

183 SCALABLE INFORMATION SIGNAL, APPARATUS AND METHOD FOR ENCODING A SCALABLE INFORMATION CONTENT, AND APPARATUS AND METHOD FOR ERROR CORRECTING A SCALABLE INFORMATION SIGNAL EP08773555.1 2008-06-20 EP2201691A1 2010-06-30 WIEGAND, Thomas; HELLGE, Cornelius; SCHIERL, Thomas
A scalable information signal is protected in a more efficient and/or safe way by adopting the inter-relationship among the plurality of portions of different levels within the information signal in FEC protecting the information signal. In particular, portions of the information signal representing the information content at a higher level should have associated therewith redundancy information which is dependent not only on that part of this portion being disjoint to a respective overlapping lower level portion. Rather, redundancy information should also be dependent on the latter part so as to increase the chances of success of forward error correcting an error within the lower level portion at the reception side.
184 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME EP08791594.8 2008-07-17 EP2186004A1 2010-05-19 KANNO, Shinichi; UCHIKAWA, Hironori
A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a plurality of first data blocks, respectively, each of the first data blocks containing one of the data items and a corresponding detecting code, a second correcting code generators configured to generate a second correcting code to correct errors in a second data block, the second data block containing the first data blocks, and a semiconductor memory configured to nonvolatilely store the second data block, the first correcting codes, and the second correcting code.
185 INTEGRATED CIRCUIT COMPRISING ERROR CORRECTION LOGIC, AND A METHOD OF ERROR CORRECTION EP07789925.0 2007-04-04 EP2145391A1 2010-01-20 VILLION, Mathieu
An integrated circuit comprises forward error correction (FEC) decoder logic being coupled to memory and arranged to receive data, comprising application data, from a host application process. The FEC decoder logic performs error detection upon the received data. Logic is further arranged to transmit error free application data back to the host application process prior to performing error correction; and store in memory only application data in which errors are detected.
186 VARIABLE RATE CODING FOR FORWARD LINK EP00992043.0 2000-11-16 EP1234401B1 2009-12-23 PROCTOR, James, A., Jr.
187 CLASH-FREE IRREGULAR-REPEAT-ACCUMULATE CODE EP06750253.4 2006-04-14 EP1900105A1 2008-03-19 GRAY, Paul, Kingsley; CHUGG, Keith, Michael
Methods, apparatuses, and systems are presented for performing data encoding involving receiving a sequence of data bits, encoding the sequence of data bits in accordance with a parity check matrix (H-matrix) to generate a sequence of encoded bits, wherein the H-matrix is capable of being partitioned into a first matrix and a second matrix, the first matrix being a dual-diagonal matrix, the second matrix comprising one or more vertically stacked sub-matrices, each sub-matrix consisting of a plurality of columns, each column having a column weight of no more than 1, wherein the second matrix is capable of being expressed as a product of a parity check matrix, an interleaver permutation matrix, and a repeat block matrix, and the interleaver permutation matrix satisfies a clash-free interleaver constraint, and outputting the sequence of encoded bits.
188 ERROR DETECTION AND CORRECTION FOR INFRARED PULSE POSITION MODULATION SYSTEM EP05809226.3 2005-11-24 EP1834410A1 2007-09-19 SHAANAN, Tamir; FREILICHER, Lev
A method of encoding, transmitting and decoding data over a wireless medium, including, selecting a number of bits N representing a symbol, creating a set of at least 2 to the power of N equal sized codewords with a larger number of bits than N, representing the 2 to the power of N possible combinations of N bit symbols, receiving a stream of data, replacing every N bit symbol from the stream of data with its representative codeword from the created set, transmitting the codewords using a faster transmission bit rate such that the transmission time allocated for each codeword is substantially the same as the time duration required to transmit the original bits it replaced.
189 DEVICE AND METHOD FOR CONVOLUTIONAL ENCODING IN DIGITAL SYSTEM EP99962544.5 1999-12-30 EP1142132B1 2007-06-13 KIM, Min-Goo; KIM, Beong-Jo; LEE, Young-Hwan; CHOI, Soon-Jae
A convolutional encoding device and method in a digital system. According to an embodiment of the present invention, a convolutional encoding device has a convolutional encoder and a puncturer. The convolutional encoder generates a subgroup of a first, a second and a third encoded symbols for each input bit using generator polynomials including g0(x) = 1 + x<2> + x<3> + x<5> + x<6> + `x<7> + x<8>, g1(x) = 1 + x + x<3> + x<4> + x<7> + x<8>, and g2(x) = 1 + x + x<2> + x<5> + x<8>, for inputting input bits to generate a symbol group of three subgroups for three successive input bits, and for generating a stream of the symbol groups. A symbol puncturer punctures the first symbol of one of three subgroups in each symbol group generated from the convolutional encoder.
190 Information recording method and apparatus EP00300022.1 2000-01-05 EP1018731B1 2006-11-29 Kuroda, Kazuo, Tokorozawa Works of Pioneer Corp.
191 METHOD FOR COMPRESSING A SET OF CORRELATED SIGNALS EP05770595.6 2005-08-08 EP1668780A1 2006-06-14 YEDIDIA, Jonathan, S.; VETRO, Anthony; KHISTI, Ashish; MALIOUTOV, Dmitry
A method compresses a set of correlated signals by first converting each signal to a sequence of integers, which are further organized as a set of bit-planes. This can be done by signal transformation and quantization. An inverse accumulator is applied to each bit-plane to produce a bit-plane of shifted bits, which are permuted according to a predetermined permutation to produce bit-planes of permuted bits. Each bit-plane of permuted bits is partitioned into a set of blocks of bits. Syndrome bits are generated for each block of bits according to a rate-adaptive base code. Subsequently, the syndrome bits can be decompressed in a decoder to reconstructed using the syndrome bits and the bit probability estimate. The sequence of integers corresponding to all of the bit-planes can then be reconstructed from the bit probability estimates, and the original signal can be recovered from the sequences of integers using an inverse quantization and inverse transform.
192 VORRICHTUNG UND VERFAHREN ZUM VERSCHLEIERN EINES FEHLERS EP03747407.9 2003-04-07 EP1495548B1 2006-02-22 HOMM, Daniel; SPERSCHNEIDER, Ralph
A device for masking a fault in a faulty or potentially faulty information unit generates output values of a forward decoder (14) and of a backward decoder (16), which differ from one another thereby indicating (18) a fault masking area. The different values for one and the same information unit are checked with regard to a predetermined criterion in order to select (22) the value that fulfills, i.e. is plausible for, the predetermined criterion. This enables, without impairing a compression rate, an elimination or reduction of the continuation faults introduced during a decoding of blocks comprised of reversible code words of a variable length.
193 OPTICAL TRANSMISSION SYSTEM, FEC MULTIPLEXER, FEC MULTIPLEXER/SEPARATOR, AND ERROR CORRECTION METHOD EP01930183 2001-05-16 EP1195935A4 2005-07-20 KUBO KAZUO; YOSHIDA HIDEO; ICHIBANGASE HIROSHI
An FEC multiplexing circuit (2) is so constituted that a first memory circuit (15) is arranged at the front stage of a first RS coding circuit (16) and a second memory circuit (17) at the front stage of a second RS coding circuit (18) to execute error correction coding by a combination of different pieces of data in two directions, and then to generate an FEC frame by multiplexing the error correction codes. An FEC multiplexing/separating circuit (6) is so constituted that a third memory circuit (42) is arranged at the rear stage of a first RS decoding circuit (41) and a fourth memory circuit (44) at the rear stage of a second RS decoding circuit (43) to execute error correction by a combination of different pieces of data in two directions, and then to regenerate the original information data by multiplexing parallel data read out of the fourth memory circuit (44).
194 VORRICHTUNG UND VERFAHREN ZUM VERSCHLEIERN EINES FEHLERS EP03747407.9 2003-04-07 EP1495548A1 2005-01-12 HOMM, Daniel; SPERSCHNEIDER, Ralph
A device for masking a fault in a faulty or potentially faulty information unit generates output values of a forward decoder (14) and of a backward decoder (16), which differ from one another thereby indicating (18) a fault masking area. The different values for one and the same information unit are checked with regard to a predetermined criterion in order to select (22) the value that fulfills, i.e. is plausible for, the predetermined criterion. This enables, without impairing a compression rate, an elimination or reduction of the continuation faults introduced during a decoding of blocks comprised of reversible code words of a variable length.
195 METHOD AND APPARATUS FOR DETECTION OF ERRORS IN MULTIPLE-WORD COMMUNICATIONS EP97906560.4 1997-02-12 EP0823161B1 2004-11-24 SHIMIZU, Takeshi; WICKI, Thomas Martin; HELLAND, Patrick James
196 METHOD AND APPARATUS FOR A COMPLEMENTARY ENCODER/DECODER EP02733062.0 2002-05-28 EP1400023A1 2004-03-24 HE, Allen
A method and apparatus for encoding and decoding a bit stream by the use of a code word that comprises ones and zeros. The encoder is achieved by altering the bit stream such that the altered bit stream comprises a different combination of ones and zeros. The altered bit stream and the original bit stream are then encoded, transmitted, and decoded. The decoder accounts for the differing bit streams by reversing the effect of the altering.
197 VARIABLE RATE CODING FOR FORWARD LINK EP00992043.0 2000-11-16 EP1234401A2 2002-08-28 PROCTOR, James, A., Jr.
A technique for encoding a signal used in a digital communication system in which individual traffic channel data rates may be adapted to specific channel conditions. In particular, a forward error correction coding rate is adapted for individual channels while at the same time maintaining a fixed block size independent of the FEC coding rate. This allows the system data rate to adapt to the channel conditions experienced by a specific user. Thus, users experiencing good communication conditions with low multipath distortion may be allocated higher capacity, whereas users with significant multipath distortion may make use of lower rate (higher levels of coding) error codes to maintain high quality. Messages are sent from a transmitter to a receiver to inform the receiver of the coding rate implemented at any given point in time. These parameters may be adjusted independent of tranmitted power level through the expedient of ensuring that size of a transmitted frame remains constant, while permitting the ability to change FEC coding rates and FEC block sizes.
198 Information recording method and apparatus EP00300022.1 2000-01-05 EP1018731A3 2002-01-09 Kuroda, Kazuo, Tokorozawa Works of Pioneer Corp.

An information recording method, in which when new digital information is employed to update a part of old digital information that has been divided into ECC blocks and stored on an information recording medium, the latest update position for the old digital information that is to be updated is detected based on the volume of the data of the new digital information. A predetermined volume for the old digital information that has been stored sequentially following the latest update position detected is read, and then, at least a part of the old digital information that has been read is recorded after the new digital information is recorded, so that the destruction of data that should not be rewritten can be prevented at the portion whereat the old digital information is coupled with the new digital information. As a result, the deterioration of the error correction capability for the coupled portion can be reduced.

199 Verfahren zur Übertragung von diskreten Nachrichtensignalen EP96112499.7 1996-08-02 EP0757448A3 2001-05-09 Wörrlein, Hans Hermann, Dr.-Ing.

Es wird ein Verfahren zur Übertragung von diskreten Nachrichtensignalen vorgeschlagen, bei dem die verschiedenen Signale, die senderseitig zur Auswahl bereitgehalten werden, derart strukuriert werden, daß sie sich maximal voneinander unterscheiden, indem die Festlegung des Kodes so getroffen wird, daß die sogenannte Hamming-Distanz beliebiger Kodewörter, d.h. die Anzahl der Bits, in denen sie sich unterscheiden, stets maximal wird, gleichgültig welches Paar von Kodewörtern ausgewählt wird.

Ferner wird eine Anleitung zur Synthese derartig optimaler Kodes gegeben.

200 Method for detecting and correcting transmission errors of a digital signal EP96920011.2 1996-05-30 EP0773629B1 2000-04-12 Imazu, Ryuzo
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