OPTICAL TRANSMISSION SYSTEM, FEC MULTIPLEXER, FEC MULTIPLEXER/SEPARATOR, AND ERROR CORRECTION METHOD |
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| 申请号 | EP01930183 | 申请日 | 2001-05-16 | 公开(公告)号 | EP1195935A4 | 公开(公告)日 | 2005-07-20 |
| 申请人 | MITSUBISHI ELECTRIC CORP; | 发明人 | KUBO KAZUO; YOSHIDA HIDEO; ICHIBANGASE HIROSHI; | ||||
| 摘要 | An FEC multiplexing circuit (2) is so constituted that a first memory circuit (15) is arranged at the front stage of a first RS coding circuit (16) and a second memory circuit (17) at the front stage of a second RS coding circuit (18) to execute error correction coding by a combination of different pieces of data in two directions, and then to generate an FEC frame by multiplexing the error correction codes. An FEC multiplexing/separating circuit (6) is so constituted that a third memory circuit (42) is arranged at the rear stage of a first RS decoding circuit (41) and a fourth memory circuit (44) at the rear stage of a second RS decoding circuit (43) to execute error correction by a combination of different pieces of data in two directions, and then to regenerate the original information data by multiplexing parallel data read out of the fourth memory circuit (44). | ||||||
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