| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 1 | 高效放大器和在其中大幅降低电磁干扰的方法 | CN201110188061.1 | 2011-07-06 | CN102332876A | 2012-01-25 | 陈建龙; 蒋曦晟 |
| 本发明公开了一种用于大幅降低电磁干扰(EMI)的高效放大器。该高效放大器包括将大功率信号提供至负载的输出级。高效放大器还包括在输出级的控制信号中产生定时非重叠的重叠保护电路，以及降低大功率信号的瞬时部分以基本降低EMI的边缘控制电路。可能采用电阻性源极负反馈实现重叠保护电路和边缘控制电路。本发明还公开了相关的方法。在一个实施例中，在蜂窝电话或移动音频设备中采用所述高效放大器和相关的方法。 | ||||||
| 2 | 高效放大器和在其中大幅降低电磁干扰的方法 | CN201110188061.1 | 2011-07-06 | CN102332876B | 2015-08-19 | 陈建龙; 蒋曦晟 |
| 本发明公开了一种用于大幅降低电磁干扰(EMI)的高效放大器。该高效放大器包括将大功率信号提供至负载的输出级。高效放大器还包括在输出级的控制信号中产生定时非重叠的重叠保护电路，以及降低大功率信号的瞬时部分以基本降低EMI的边缘控制电路。可能采用电阻性源极负反馈实现重叠保护电路和边缘控制电路。本发明还公开了相关的方法。在一个实施例中，在蜂窝电话或移动音频设备中采用所述高效放大器和相关的方法。 | ||||||
| 3 | 基线修复电路 | CN200810088129.7 | 2008-01-03 | CN101241106B | 2013-03-06 | T·J·卡斯帕 |
| 用于校正TOFMS的检测器耦合电路的基线偏移的电路，其提供了补偿检测器的交流耦合效应的增益和阻抗特性。在一个电路中，通过注入与由于累积充电而在检测器交流耦合网络中流动的电流相等的电流来完成基线校正。在另一个电路中，电流源驱动与信号路径相耦合的积分器以减小检测器交流耦合效应。在另一个电路中，低噪音放大器使用减小检测器交流耦合效应的反馈网络。在又一个电路中，采用运算放大器来减小检测器交流耦合效应。 | ||||||
| 4 | 基线修复电路 | CN200810088129.7 | 2008-01-03 | CN101241106A | 2008-08-13 | T·J·卡斯帕 |
| 用于校正TOFMS的检测器耦合电路的基线偏移的电路，其提供了补偿检测器的交流耦合效应的增益和阻抗特性。在一个电路中，通过注入与由于累积充电而在检测器交流耦合网络中流动的电流相等的电流来完成基线校正。在另一个电路中，电流源驱动与信号路径相耦合的积分器以减小检测器交流耦合效应。在另一个电路中，低噪音放大器使用减小检测器交流耦合效应的反馈网络。在又一个电路中，采用运算放大器来减小检测器交流耦合效应。 | ||||||
| 5 | 固体摄像装置以及摄像装置 | CN200710091777.3 | 2007-04-11 | CN101102420A | 2008-01-09 | 吉田宏; 松长诚之; 室岛孝广 |
| 本发明提供一种有效地抑制了条纹产生的固体摄像装置以及摄像装置。固体摄像装置，包括：进行光电变换的像素呈矩阵状配置而成的像素阵列、和放大从各像素输出的图像信号的列放大器部(7)。列放大器部(7)，由在每列上设置的放大器(8)构成，且连接在电源电压供给部及接地上。从放大器(8)来看，电源一侧阻抗比接地一侧阻抗大。 | ||||||
| 6 | Solid-state imaging device and imaging apparatus | JP2006185981 | 2006-07-05 | JP2008017155A | 2008-01-24 | YOSHIDA HIROSHI; MATSUNAGA MASAYUKI; MUROSHIMA TAKAHIRO |
| <P>PROBLEM TO BE SOLVED: To provide a solid-state imaging device and an imaging apparatus with the occurrence of streaking being suppressed effectively. <P>SOLUTION: The solid-state imaging device includes a pixel array where the pixels for performing photoelectric conversion are arranged in a matrix form, and a column amplifier 7 for amplifying image signal that has been output from each pixel. The column amplifier 7 consists of amplifiers 8, each being disposed by row and is connected to a power supply voltage supply part and the grounding. Power supply side impedance is larger than the grounding-side impedance, as viewed from the amplifier 8. <P>COPYRIGHT: (C)2008,JPO&INPIT | ||||||
| 7 | Baseline recovery circuit | JP2007338835 | 2007-12-28 | JP5570695B2 | 2014-08-13 | ジェイ．キャスパー テッド |
| 8 | Solid-state imaging device and imaging device | JP2006185981 | 2006-07-05 | JP5190185B2 | 2013-04-24 | 宏 吉田; 誠之 松長; 孝廣 室島 |
| 9 | Baseline restoration circuit | JP2007338835 | 2007-12-28 | JP2008241690A | 2008-10-09 | CASPER TED J |
| <P>PROBLEM TO BE SOLVED: To compensate the instantaneous shift of a baseline. <P>SOLUTION: A circuit for correcting the baseline shift of the detector coupling circuit of a TOFMS provides gain and impedance characteristics that compensate the AC coupling effect of the detector. In one circuit, baseline correction is achieved by injecting a current equal to that which flows due to the stored charge in the detectors AC coupling network. In another circuit, a current source drives an integrator coupled to a signal path to reduce the detector AC coupling effects. In another circuit, a low-noise amplifier utilizes a feedback network that reduces the detector AC coupling effects. In yet another circuit, an operational amplifier is employed to reduce the detector AC coupling effects. <P>COPYRIGHT: (C)2009,JPO&INPIT | ||||||
| 10 | Cascode Amplifier Bias Circuits | US15268229 | 2016-09-16 | US20180083578A1 | 2018-03-22 | Jonathan Klaren; Poojan Wagh; David Kovac; Eric S. Shapiro; Neil Calanca; Dan William Nobbe; Christopher Murphy; Robert Mark Englekirk; Emre Ayranci; Keith Bargroff; Tero Tapio Ranta |
| Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit. | ||||||
| 11 | Noise reduction circuit and associated delta-sigma modulator | US15629731 | 2017-06-21 | US09831892B1 | 2017-11-28 | Hung-Chieh Tsai |
| A circuit includes a transistor, a signal generating circuit and a noise sensing circuit. The signal generating circuit is arranged to provide an input signal. The noise sensing circuit is coupled to the transistor and the signal generating circuit, and the noise sensing circuit is arranged for receiving the input signal provided by the signal generating circuit to generate an output signal to the transistor, wherein a signal component of the output signal generated by the noise sensing circuit cancels out a signal component of the input signal provided by the signal generating circuit, and the output signal and the input signal have opposite polarities. | ||||||
| 12 | Amplification systems | US15221928 | 2016-07-28 | US09793861B1 | 2017-10-17 | Thomas Somerville |
| Certain aspects of the present disclosure provide methods and apparatus for implementing an amplification system. The amplification system includes an amplifier comprising differential inputs and an output. The differential inputs include an inverting input and a non-inverting input. The amplification system further includes a feedback path from the output coupled to the inverting input. The feedback path from the output is coupled to at least one of an inverting amplifier or buffer, and the at least one of the inverting amplifier or buffer is further coupled to the non-inverting input. | ||||||
| 13 | Class AB Common-Source Amplifier With Constant Transconductance | US15461667 | 2017-03-17 | US20170279423A1 | 2017-09-28 | Isaac Ko; Ka Wai Ho; Wan Tim Chan |
| An ultrasound probe buffer is provided. The ultrasound probe buffer may include a high impedance amplifier having a common-source core stage with series-series local feedback. The high impedance amplifier may include a first MOSFET and a second MOSFET, wherein a source terminal of the first MOSFET is coupled to a source terminal of the second MOSFET. | ||||||
| 14 | AMPLIFIER SYSTEM, CONTROLLER OF MAIN AMPLIFIER AND ASSOCIATED CONTROL METHOD | US15241035 | 2016-08-18 | US20170141748A1 | 2017-05-18 | Lai-Ching Lin; Ming-Da Tsai |
| The present invention provides a control circuit to stabilize an output power of a power amplifier. The control circuit comprises a voltage clamping loop, a current clamping loop and a loop for reducing power variation under VSWR, where the voltage clamping loop is used to clamp an output voltage of the power amplifier within a defined voltage range, the current clamping loop is used to clamp a current of the power amplifier within a defined current range, and the loop for reducing power variation under VSWR is implemented by an impedance detector to compensate the output power under VSWR variation. | ||||||
| 15 | Gain Invariant Impedance Feedback Amplifier | US14049588 | 2013-10-09 | US20150084690A1 | 2015-03-26 | Giuseppe Cusmai; Vijayaramalingam Periasamy; Xi Chen; Ramon Alejandro Gomez |
| A system includes a weighting element, a transconductance circuit, a feedback loop, and an auxiliary loop. In some implementations, the transconductance circuit may accept an input and provide a first portion of an output for amplification at a variable amplification level to generate an amplifier output. The feedback loop may provide a portion of the amplifier output as a first feedback to the input. The first feedback may be associated with an impedance that may vary with the amplification level. The auxiliary loop may provide a second feedback to the input to reduce the dependence of the impedance on the amplification level. | ||||||
| 16 | High performance transmitter preamplification chain with calibration feedback | US12806799 | 2010-08-19 | US08620242B2 | 2013-12-31 | Ahmad Mirzaei; Hooman Darabi; Amir Hadji-Abdolhamid |
| According to one embodiment, an improved preamplification chain for implementation in a transmitter comprises a frequency conversion stage for up-converting a baseband signal to a transmit signal, a variable gain control power amplifier driver for preamplifying the transmit signal, and a differential feedback calibration stage receiving first and second differential outputs of a current steering unit of the power amplifier driver and providing calibration feedback to a baseband signal generator of the transmitter. In one embodiment, the frequency conversion stage includes an adjustable low-pass filter for filtering the baseband signal, a passive mixer for up-converting the baseband signal to the transmit signal, and a clock conversion unit configured to convert a fifty percent (50%) duty cycle clock input to a twenty-five percent (25%) duty cycle clock output for driving the passive mixer. | ||||||
| 17 | High efficiency amplifier with reduced electromagnetic interference | US12803869 | 2010-07-07 | US08237495B2 | 2012-08-07 | Xicheng Jiang; Jianlong Chen |
| Disclosed is a high efficiency amplifier operable to substantially reduce electromagnetic interference (EMI). The high efficiency amplifier comprises an output stage to provide a high powered signal to a load. The high efficiency amplifier further comprises an overlap protection circuit to produce a timing non-overlap in a control signal for the output stage, and an edge control circuit to reduce a transient portion of the high powered signal to substantially reduce the EMI. The overlap protection circuit and the edge control circuit may be implemented with resistive source degeneration. Also disclosed is a related method. In one embodiment, the high efficiency amplifier and the related method may be incorporated into a cellular telephone or a mobile audio device. | ||||||
| 18 | ANTENNA DEVICE, DEMODULATING DEVICE AND RECEIVING DEVICE | US12409189 | 2009-03-23 | US20090245425A1 | 2009-10-01 | Kohichi TSUTSUI; Susumu HASEGAWA; Kazuo TAKAYAMA; Kenji KAWAI; Mansaku NAKANO; Eri MIYOSHI |
| An antenna device that is placed adjacent to an antenna 5 for receiving a high frequency signal and includes an impedance matching circuit 6 and an amplifying circuit 21 to which a DC control voltage is supplied from a demodulating device 3 through a feeder cable 4 for transmitting the high frequency signal to the demodulating device 3, wherein the DC control voltage is set to a value for adjusting a frequency characteristic of the impedance matching circuit 6 within an allowable range corresponding to a received frequency. A small and inexpensive antenna device having a simple circuit configuration and good reception sensitivity is implemented. | ||||||
| 19 | Solid-state image sensing device and image sensing device | US11797128 | 2007-05-01 | US20070247535A1 | 2007-10-25 | Hiroshi Yoshida; Yoshiyuki Matsunaga; Takahiro Muroshima |
| A solid-state image sensing device includes: a pixel array in which pixels performing photoelectric conversion are arranged in rows and columns; and a column amplification section in which an image signal output from each pixel is amplified. The column amplification section includes amplifiers each of which is provided for each column, and the column amplification section is connected to a power supply voltage feed section and the ground. An impedance on the power supply side of the amplifier is greater than an impedance on the ground side. | ||||||
| 20 | AMPLIFIER SYSTEM, CONTROLLER OF MAIN AMPLIFIER AND ASSOCIATED CONTROL METHOD | EP16185674.5 | 2016-08-25 | EP3168986A1 | 2017-05-17 | LIN, Lai-Ching; TSAI, Ming-Da |
The present invention provides a control circuit (1 20) to stabilize an output power of a power amplifier (110). The control circuit (120) comprises a voltage clamping loop (1 30), a current clamping loop (140) and a loop (1 50) for reducing power variation under VSWR, where the voltage clamping loop (1 30) is used to clamp an output voltage of the power amplifier (110) within a defined voltage range, the current clamping loop (140) is used to clamp a current of the power amplifier (110) within a defined current range, and the loop (1 50) for reducing power variation under VSWR is implemented by an impedance detector (1 50) to compensate the output power under VSWR variation.
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