| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 121 | Apparatus and method for correcting baseline wander and offset insertion in AC coupling circuits | US15193716 | 2016-06-27 | US09800218B1 | 2017-10-24 | Todd Morgan Rasmus |
| The disclosure relates to an alternating current (AC) coupling circuit including first and second capacitors having first and second input terminals configured to receive an input differential signal and generate an output differential signal at first and second output terminals of the first and second capacitors. The AC coupling circuit further includes a baseline wander correction circuit configured to make the output differential signal resistant to baseline wander due to the input differential signal including one or more time intervals of unbalanced data. The baseline wander correction circuit includes a differential difference amplifier (DDA) having a first differential input configured to receive the input differential signal, a differential output configured to generate a compensation differential signal, and a second differential input configured to receive the compensation differential signal. The compensation differential signal is applied to the output terminals of the first and second capacitors via a pair of resistors, respectively. | ||||||
| 122 | POWER AMPLIFIER CIRCUIT | US15409506 | 2017-01-18 | US20170257067A1 | 2017-09-07 | TAKAYUKI ABE; JUNJI SATO |
| A power amplifier circuit includes an input that receives a first input signal having a first phase and a second input signal having a second phase, a first transistor that includes a source that is supplied with a first voltage, and a gate that receives the first input signal, a second transistor that includes a source that is supplied with the first voltage, and a gate that receives the second input signal, a first neutralizing circuit that neutralizes a parasitic element, a second neutralizing circuit that neutralizes a parasitic element, N third transistors, N being an integer equal to or higher that 1, N fourth transistors, and an output that is connected between a drain of the N-th third transistor and a drain of the N-th fourth transistor and outputs a first output signal having a third phase and a second output signal having a fourth phase. | ||||||
| 123 | POWER AMPLIFICATION MODULE | US15482055 | 2017-04-07 | US20170214375A1 | 2017-07-27 | Satoshi Arayashiki; Satoshi Goto |
| Provided is a power amplification module that includes: a first transistor, a first signal being inputted to a base thereof; a second transistor, the first signal being inputted to a base thereof and a collector thereof being connected to a collector of the first transistor; a first resistor, a first bias current being supplied to one end thereof and another end thereof being connected to the base of the first transistor; a second resistor, one end thereof being connected to the one end of the first resistor and another end thereof being connected to the base of the second transistor; and a third resistor, a second bias current being supplied to one end thereof and another end thereof being connected to the base of the second transistor. | ||||||
| 124 | LINEAR LOW NOISE AMPLIFIER | US15174856 | 2016-06-06 | US20170179896A1 | 2017-06-22 | Amir Hossein Masnadi Shirazi Nejad; Mazhareddin Taghivand; Seyed Hossein Miri Lavasani; Mohammad Emadi |
| A linear low noise amplifier is disclosed. In at least one exemplary embodiment, the linear low noise amplifier may include a first metal oxide semiconductor field effect transistor (MOSFET) configured to operate in a triode mode coupled to a second MOSFET configured to operate in a saturation mode. Linearity of the low noise amplifier may be determined, at least in part, by a transconductance associated with the second MOSFET and a channel resistance associated the first MOSFET. | ||||||
| 125 | ANALOG AMPLIFIER FOR RECOVERING ABNORMAL OPERATION OF COMMON MODE FEEDBACK | US14016704 | 2013-09-03 | US20170163227A9 | 2017-06-08 | Jong-Woo LEE; Thomas Byung-Hak CHO; Jae-Hyun LIM |
| An analog amplifier for recovering an abnormal operation of a common-mode feedback is provided. An analog variable amplifier includes a first input transistor and a second input transistor, a first output transistor and a second output transistor, a third transistor and a fourth transistor, a first current source, a fifth transistor and a sixth transistor, and a second current source. The first input transistor and the second input transistor amplify a bias current depending on a magnitude of a first input voltage and a second input voltage. The first output transistor and the second output transistor output the amplified bias current. The third transistor and the fourth transistor receive an output voltage of the first output transistor as an input and amplifying the received output voltage. The first current source provides a predetermined current between the first output transistor and the third transistor. | ||||||
| 126 | POWER AMPLIFICATION MODULE | US15274313 | 2016-09-23 | US20170155367A1 | 2017-06-01 | Kazuo WATANABE; Satoshi TANAKA; Kazuhito NAKAI; Takayuki TSUTSUI |
| A power amplification module includes: a first transistor that amplifies a first radio frequency signal and outputs a second radio frequency signal; a second transistor that amplifies the second radio frequency signal and outputs a third radio frequency signal; and first and second bias circuits that supply first and second bias currents to bases of the first and second transistors. The first bias circuit includes a third transistor that outputs the first bias current from its emitter or source, a capacitor that is input with the first radio frequency signal and connected to the base of the first transistor, a first resistor connected between the emitter or source of the third transistor and the base of the first transistor, a second resistor connected between the capacitor and the emitter or source of the third transistor, and a third resistor connected between the capacitor and the base of the first transistor. | ||||||
| 127 | Voltage-to-current converter | US14639553 | 2015-03-05 | US09608586B2 | 2017-03-28 | Li Du; Sang Min Lee; Dongwon Seo |
| A converter including: an amplifier having first and second input terminals and an output terminal, the first input terminal configured to receive a reference voltage; an array of resistors configured to generate a tuning voltage; and a first plurality of switches coupled to the second input terminal of the amplifier and the array of resistors, the first plurality of switches configured to adjust a gain of the amplifier by selecting at least one resistor in the array of resistors to connect to the second input terminal of the amplifier. | ||||||
| 128 | MODIFIED CURRENT MIRROR CIRCUIT FOR REDUCTION OF SWITCHING TIME | US15272173 | 2016-09-21 | US20170085223A1 | 2017-03-23 | Lothar Musiol; Yang Liu; Parham Hesamaddin; Lisette L. Zhang; Oleksandr Gorbachov |
| A current mirror circuit connectible to an amplifier circuit to set a bias point thereof includes a current mirror circuit, and a bias resistor connected thereto. The bias resistor is connectible to the amplifier circuit. A first helper circuit is connected in parallel with the bias resistor, and is selectively activated for a first predetermined duration by a first control signal. The activated first helper circuit defines a lower resistance path relative to the bias resistor to shorten a rising transient response of the amplifier circuit as the current mirror circuit is activated. | ||||||
| 129 | High-frequency power amplifier | US14451506 | 2014-08-05 | US09344044B2 | 2016-05-17 | Yasunobu Yoshizaki |
| The present invention provides a power amplifier that can reduce irregularities in characteristics such as gains. A high-frequency power amplifier that is used for a mobile communication terminal includes: an amplifier element that includes a composite semiconductor bipolar transistor and that amplifies high-frequency power of a predetermined frequency band with a bias voltage and a bias current supplied thereto; a bias circuit that supplies the bias voltage and the bias current to the amplifier element on the basis of a bias reference voltage; a bias reference voltage supply circuit that generates and supplies the bias reference voltage to the bias circuit; and a bias reference voltage control unit that controls the bias reference voltage supply circuit so as to generate the bias reference voltage of a voltage corresponding to a given signal. | ||||||
| 130 | BIAS CIRCUIT AND POWER AMPLIFIER HAVING THE SAME | US14886804 | 2015-10-19 | US20160134245A1 | 2016-05-12 | Jun Goo WON; Youn Suk KIM; Yoshiyuki TONAMI; Ki Joong KIM |
| A bias circuit providing different bias voltages depending on a power mode through a simple circuit, and a power amplifier having the same are provided. The bias circuit and the power amplifier include a bias setting unit configured to vary a voltage level of a control signal controlling a bias voltage according to an operation of a first transistor being switched-off in a high power mode and switched-on in a low power mode. A bias supplying unit includes a bias supplying transistor switched based on the control signal, to supply the bias voltage having a voltage level according to a switching operation of the bias supplying transistor. | ||||||
| 131 | VOLTAGE-TO-CURRENT CONVERTER | US14639553 | 2015-03-05 | US20160094195A1 | 2016-03-31 | Li Du; Sang Min Lee; Dongwon Seo |
| A converter including: an amplifier having first and second input terminals and an output terminal, the first input terminal configured to receive a reference voltage; an array of resistors configured to generate a tuning voltage; and a first plurality of switches coupled to the second input terminal of the amplifier and the array of resistors, the first plurality of switches configured to adjust a gain of the amplifier by selecting at least one resistor in the array of resistors to connect to the second input terminal of the amplifier. | ||||||
| 132 | WIDEBAND BIAS CIRCUITS AND METHODS | US14931562 | 2015-11-03 | US20160056779A1 | 2016-02-25 | Jose Cabanillas; Calogero Davide Presti |
| The present disclosure includes circuits and methods for wideband biasing. In one embodiment, an amplifier includes a cascode transistor between an input and an output of the amplifier. The cascode transistor receives a bias from a bias circuit comprising a resistor between the power supply and a first node, a resistor between the first node and a reference voltage, and a capacitor between the power supply and the first node. The power supply may be a modulated power supply, which is coupled through the bias circuit to a capacitance at the control terminal of the cascode transistor. An inductor is configured between a terminal of the cascode transistor and the power supply. The inductor may isolate the output from the modulated supply signal. | ||||||
| 133 | Wideband bias circuits and methods | US14172150 | 2014-02-04 | US09219447B2 | 2015-12-22 | Jose Cabanillas; Calogero Davide Presti |
| The present disclosure includes circuits and methods for wideband biasing. In one embodiment, an amplifiers includes a cascode transistor between an input and an output of the amplifier. The cascode transistor receives a bias from a bias circuit comprising a resistor between the power supply and a first node, a resistor between the first node and a reference voltage, and a capacitor between the power supply and the first node. The power supply may be a modulated power supply, which is coupled through the bias circuit to a capacitance at the control terminal of the cascode transistor. An inductor is configured between a terminal of the cascode transistor and the power supply. The inductor may isolate the output from the modulated supply signal. | ||||||
| 134 | CASCODE POWER AMPLIFIER | US14803693 | 2015-07-20 | US20150326188A1 | 2015-11-12 | James J. Komiak |
| An amplifier for amplifying signals is presented. A cascode power amplifies includes two or more adjacent cascode amplifiers and at least one remote cascode amplifier. The adjacent cascode amplifiers are lined up adjacent each other with inputs of the adjacent cascode amplifiers connected to a common input line and outputs of the of adjacent cascode amplifiers connected to a common output line. The adjacent cascode amplifiers generally operate in parallel. The remote cascode amplifier is spaced apart from the adjacent cascade amplifiers. An input transmission line connects an input of the remote cascode amplifier to the common input line. An output transmission line connects an output of the remote cascode amplifier to the common output line. Amplified outputs of the adjacent cascode amplifiers and amplified outputs of the remote cascode amplifier are power combined and summed into a coherent amplified output signal that is output on the output transmission line. | ||||||
| 135 | ANALOG AMPLIFIER FOR RECOVERING ABNORMAL OPERATION OF COMMON MODE FEEDBACK | US14712267 | 2015-05-14 | US20150249435A1 | 2015-09-03 | Jong-Woo LEE; Byung-Hak CHO; Jae-Hyun LIM |
| An analog amplifier is provided. The analog variable amplifier includes a first amplifier stage configured to amplify a bias current to output a first output voltage and a second output voltage that respectively depend on a magnitude of a first input voltage and a second input voltage, a second amplifier stage configured to receive the first output voltage and the second output voltage of the first amplifier stage as inputs and to amplify the received first output voltage and the second output voltage, and at least one auxiliary bias current source coupled to an electrical connection between the first amplifier stage and the second amplifier stage through which the second amplifier stage receives the first output voltage, and coupled to an electrical connection between the first amplifier stage and the second amplifier stage through which the second amplifier stage receives the second output voltage. | ||||||
| 136 | ANALOG AMPLIFIER FOR RECOVERING ABNORMAL OPERATION OF COMMON MODE FEEDBACK | US14016704 | 2013-09-03 | US20150061764A1 | 2015-03-05 | Jong-Woo LEE; Thomas Byung-Hak CHO; Jae-Hyun LIM |
| An analog amplifier for recovering an abnormal operation of a common-mode feedback is provided. An analog variable amplifier includes a first input transistor and a second input transistor, a first output transistor and a second output transistor, a third transistor and a fourth transistor, a first current source, a fifth transistor and a sixth transistor, and a second current source. The first input transistor and the second input transistor amplify a bias current depending on a magnitude of a first input voltage and a second input voltage. The first output transistor and the second output transistor output the amplified bias current. The third transistor and the fourth transistor receive an output voltage of the first output transistor as an input and amplifying the received output voltage. The first current source provides a predetermined current between the first output transistor and the third transistor. | ||||||
| 137 | HIGH-FREQUENCY POWER AMPLIFIER | US14451506 | 2014-08-05 | US20150054587A1 | 2015-02-26 | Yasunobu Yoshizaki |
| The present invention provides a power amplifier that can reduce irregularities in characteristics such as gains. A high-frequency power amplifier that is used for a mobile communication terminal includes: an amplifier element that includes a composite semiconductor bipolar transistor and that amplifies high-frequency power of a predetermined frequency band with a bias voltage and a bias current supplied thereto; a bias circuit that supplies the bias voltage and the bias current to the amplifier element on the basis of a bias reference voltage; a bias reference voltage supply circuit that generates and supplies the bias reference voltage to the bias circuit; and a bias reference voltage control unit that controls the bias reference voltage supply circuit so as to generate the bias reference voltage of a voltage corresponding to a given signal. | ||||||
| 138 | Low noise amplifier | US11968103 | 2007-12-31 | US07795981B2 | 2010-09-14 | Ricardo dos Santos Reis |
| The invention teaches an amplifier (100) with an input signal (IN) coupled to the gate of a second transistor (Q2) and an output signal (OUT) coupled to an output node between a third resistor (R3) and the drain of the second transistor (Q2). A third transistor (Q3) is coupled in parallel between the output node and the gate of a second transistor (Q2). A first bias signal (Vbias) is coupled to the output node and the gate of the third transistor (Q3). The amplifier preferably also includes a plurality of switchable resistors coupled to the output node to adjust the output for process variations.The invention also describes a method of compensating for process variations in an output of an amplifier which comprises producing a reference signal dependent on the difference between a reference value and an actual value and switching one or more resistors into the output of the amplifier to adjust the output of the amplifier to reflect the process variations. The reference signal is produced by comparing the differential inputs of a reference input produced from a reference potential across a first resistor 302 having a reference value in series with a constant current source 304 and an actual input produced from an actual potential across a second resistor 303 having substantially the same reference value. The second resistor 303 is in series with the channel of a transistor 301. | ||||||
| 139 | Low Noise Amplifier | US11968103 | 2007-12-31 | US20090167440A1 | 2009-07-02 | Ricardo dos Santos REIS |
| The invention teaches an amplifier (100) with an input signal (IN) coupled to the gate of a second transistor (Q2) and an output signal (OUT) coupled to an output node between a third resistor (R3) and the drain of the second transistor (Q2). A third transistor (Q3) is coupled in parallel between the output node and the gate of a second transistor (Q2). A first bias signal (Vbias) is coupled to the output node and the gate of the third transistor (Q3). The amplifier preferably also includes a plurality of switchable resistors coupled to the output node to adjust the output for process variations.The invention also describes a method of compensating for process variations in an output of an amplifier which comprises producing a reference signal dependent on the difference between a reference value and an actual value and switching one or more resistors into the output of the amplifier to adjust the output of the amplifier to reflect the process variations. The reference signal is produced by comparing the differential inputs of a reference input produced from a reference potential across a first resistor 302 having a reference value in series with a constant current source 304 and an actual input produced from an actual potential across a second resistor 303 having substantially the same reference value. The second resistor 303 is in series with the channel of a transistor 301. | ||||||
| 140 | Amplifier feedback and bias configuration | US11518109 | 2006-09-08 | US07446612B2 | 2008-11-04 | Robert Michael Fisher; Michael L. Hageman |
| A wireless communication device output amplifier configured to reduce or eliminate out of band oscillations from voltage standing waves generated by antenna impedance mismatch reflection. The amplifier is configured with an input, output, and biasing node. The biasing node is configured to receive a biasing signal from a biasing amplifier. The biasing amplifier draws current from the biasing node while providing the biasing voltage to the output amplifier. To reduce or eliminate out of band voltage standing waves from antenna reflections, a frequency dependant network is provided as a feedback loop to selectively provide feedback to the output amplifier to reduce or eliminate unwanted out of band oscillations, such as voltage standing waves. The frequency dependant network may comprise one or more resistors, inductors, and capacitors which are of small size and may be integrated. | ||||||
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