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序号 专利名 申请号 申请日 公开(公告)号 公开(公告)日 发明人
121 Semiconductor device JP2009051203 2009-03-04 JP5163544B2 2013-03-13 寛司 隼田; 哲 栗山; 昌俊 長谷; 秀俊 松本
122 Multi-port amplifier in a communication satellite JP2010504856 2008-05-02 JP5138767B2 2013-02-06 アラン・デーヴィッド・クーシュマン; ダリル・リチャード・ジョーンズ
123 Predistorter JP2009549970 2008-12-17 JP5137973B2 2013-02-06 健一 堀口; 直子 松永; 亮司 林
124 Distortion compensation amplifier JP2010543781 2009-11-20 JP5124655B2 2013-01-23 敬 岡崎; 喜明 土居
125 Variable frequency amplifier JP2010536686 2009-11-04 JP5111614B2 2013-01-09 和久 山内; 秀憲 湯川; 晃 井上; 敦士 山本; 孝一 藤崎; 博民 上田
126 Compound semiconductor device and manufacturing method therefor JP2011134542 2011-06-16 JP2013004750A 2013-01-07 IMANISHI KENJI
PROBLEM TO BE SOLVED: To materialize a highly reliable compound semiconductor device in which the leak current is extremely small even in the pinch-off state, by providing a compound semiconductor laminate structure having excellent breakdown resistance thereby suppressing breakdown of a substrate sufficiently.SOLUTION: A semiconductor laminate structure 2 formed on an Si substrate 1 has a thickness of 10 μm or less, and includes a thick first buffer layer consisting of AlN. The ratio of Al atoms to the total number of atoms of group III elements (Ga,Al) is set 50% or higher. In other words, the number of chemical bond Al-N is set to 50% or more of the total number of chemical bonds (Ga-N, Al-N) to a group V element of N.
127 How to strengthen the sector separation in the Fourier transform matrix systems and equipment JP2009528364 2007-07-24 JP5040023B2 2012-10-03 ホルン、マーク アイ. ヴァン; ティ. パターソン、チャールズ; エル. パルコ、ロナルド
128 Transmission device JP2011033844 2011-02-18 JP2012175286A 2012-09-10 SUGANO HIROTOSHI; MAEDA MITSUNORI; OIDE TAKAYOSHI
PROBLEM TO BE SOLVED: To provide a transmission device that optimizes a supply voltage to an amplifier in response to a change in the frequency of a modulated signal.SOLUTION: A transmission device includes: a first envelope extraction section for extracting a first envelope signal according to a first modulated signal that is a modulation of transmission data; a second envelope extraction section for extracting a second envelope signal according to a second modulated signal that is a higher frequency modulation of the transmission data than the first modulated signal; an amplification section for amplifying the first or second modulated signal; a power generation section for outputting a supply voltage supplied to the amplification section in accordance with the first or second envelope signal; and a control section for instructing the amplification section to amplify either the first or second modulated signal and instructing the power generation section to output the supply voltage in accordance with either the corresponding first or second envelope signal.
129 Method of manufacturing semiconductor device and semiconductor device JP2011038922 2011-02-24 JP2012175088A 2012-09-10 KAMATA YOICHI
PROBLEM TO BE SOLVED: To provide a normally-off HEMT with reduced variation of threshold voltage in low cost.SOLUTION: A method of manufacturing a semiconductor device comprises the steps of: forming semiconductor layers 21 to 24 above a substrate 10; forming an opening to be a recess 51 in the semiconductor layers 23 and 24 by dry etching using a gas containing a fluorine component; diffusing fluorine attached to the side surfaces and the bottom surface of the recess 51 to the semiconductor layers 22 to 24 by heating the semiconductor layers to form a region containing fluorine; forming an insulating film 30 inside the recess 51 and on the semiconductor layers 22 to 24; and forming an electrode 41 in the region in which the recess 51 is formed via the insulating film 30.
130 歪補償増幅器 JP2010543781 2009-11-20 JPWO2010073483A1 2012-06-07 敬 岡崎; 喜明 土居
プリディストーション方式により歪補償を行う歪補償増幅器で、歪補償の収束の高速化と歪補償量を向上させる。レベル検出手段1、歪補償態様記憶手段3、歪付与手段4により歪補償を行い、増幅手段8により信号を増幅する。フィードバック信号取得手段9、11〜16がフィードバック信号を取得し、歪レベル検出手段9、11、12、17、18がフィードバック信号に含まれる歪のレベルを検出する。制御手段19が、歪補償処理の開始時には、増幅対象となる信号とフィードバック信号との誤差成分が小さくなるように歪補償態様記憶手段の記憶内容を更新し、誤差成分が小さくなったときには、検出される歪のレベルが小さくなるように歪補償態様記憶手段の記憶内容を更新する。
131 Distortion compensation device, radio communication equipment and distortion compensation method JP2010100174 2010-04-23 JP2011233978A 2011-11-17 ISHIKAWA HIROYOSHI; HAMADA HAJIME; SATSUBA NOBUKAZU; UTSUNOMIYA YUICHI; HASE KAZUO; OISHI YASUYUKI
PROBLEM TO BE SOLVED: To suppress increase in power consumption while maintaining precision in distortion compensation.SOLUTION: A distortion compensation part compensates distortion occurring at a power amplifier by using polynomial expression with which the signal inputted into the power amplifier is exponentiated with a maximum order number N (N is integer of 0 or larger), and the exponentiated signal is delayed with a maximum delay number K (K is integer of 0 or larger). Then, a polynomial expression adjusting part adjusts the maximum order number N or maximum delay number K of the polynomial expression based on the comparison between a threshold value and a predetermined value representing a degree of fluctuation which a distortion generated at the power amplifier represents.
132 Wireless transmission device and wireless transmission method JP2009029630 2009-02-12 JP2010187178A 2010-08-26 ISHIHARA HIROAKI; HOSOYA MASAHIRO; ONIZUKA KOHEI; OTAKA SHOJI; WATANABE OSAMU
PROBLEM TO BE SOLVED: To provide a wireless communication device and a wireless communication method which can secure a stability of a transmission operation. SOLUTION: The wireless communication device includes: an adding/subtracting unit configured to subtract a second signal and a third signal from a first signal to generate the second signal; a modulating unit configured to modulate the second signal to generate a fourth signal; a demodulating unit configured to demodulate the fourth signal to generate the third signal; and a transmitting unit configured to transmit the fourth signal. COPYRIGHT: (C)2010,JPO&INPIT
133 Progressive power generating amplifiers JP2009114907 2009-05-11 JP2009273134A 2009-11-19 PENGELLY RAYMOND SYDNEY
<P>PROBLEM TO BE SOLVED: To provide a power amplifier circuit including an unequal power splitter that splits an input signal using an unequal power split and provides a first power level signal and a second power level signal. <P>SOLUTION: A first amplifier path includes a first transistor amplifier that amplifies a first power level signal, and a second amplifier path includes a second transistor amplifier that amplifies a second power level signal. The second transistor amplifier is configured to turn ON at a different power level of an input signal from the first transistor amplifier. An unequal combiner synthesizes the amplified first power level signal and the amplified second power level signal. <P>COPYRIGHT: (C)2010,JPO&INPIT
134 Adaptation of the load mismatch in the coupler-based amplifier JP2007548737 2005-12-23 JP2008526147A 2008-07-17 ラーシュ サンドストレム,; ペル−オロフ ブラント,
カップラベース増幅器は、増幅器の2つの出信号振幅間の差分に基づく負荷不整合の測定方法を提供する。 この測定方法を使用し、可変整合ネットワーク(VMNs)または増幅器供給電圧を制御して、一定の歪みレベルおよび高い電力伝達/効率を維持し、出力電力をも制御することができる。 負荷不整合を、増幅器デバイスの出力振幅を比較することにより測定し、この比較に基づき歪みレベルの増加などの望ましくない動作に対処するように回路を調整する。
135 High efficiency variable voltage source JP2007528978 2005-08-25 JP2008511065A 2008-04-10 シェーン、フリント; マーティン、ポール、ウィルソン
基準信号に応じて高効率可変電圧源(204)から電源電圧を生成する生成手段と、生成された電源電圧(220)を受け取り、それに応じて基準信号(216)を追跡する調整された選択電源電圧を供給するように適応された調整手段とを含む電源段(202)が開示される。
136 Transformer-based voltage power supply JP2006543609 2004-12-07 JP2007514311A 2007-05-31 マーティン、ポール、ウィルソン
1次側及び2次側を有する変圧器を含み、加算されるべき第1の電圧が1次側に接続され、加算されるべき第2の電圧が2次側に接続される、電圧加算器が開示される。 1次巻線及び2次巻線を備え、1次巻線対2次巻線のx:yの巻数比を有し、1次巻線内に直列のx回の巻を設け、2次巻線内に直列のy回の巻を設け、1次巻線と2次巻線に等しい回数の巻を設け、1次巻線の各巻を2次巻線の巻と密接に結合する、変圧器がさらに開示される。
137 Distortion generating circuit JP2003093071 2003-03-31 JP2004304385A 2004-10-28 HINOHARA SEIKI
PROBLEM TO BE SOLVED: To provide a distortion generating circuit capable of extracting a pure distortion component generated by a distortion generator, and also capable of setting an arbitrary distortion wave by synthesizing a basic wave with a distortion wave which is the output signal of the distortion generator in an arbitrary phase. SOLUTION: The distortion generating circuit comprises a circulator 3 composed of three ports of input port 31, an output port 33, and a third port 32; a 90° hybrid circuit 4 connected to the third port 32 of the circulator 3; and a distortion amplifier 5 which is connected to each of a -90° output port 44 and a 0° output port 43 of a hybrid circuit 4. The circuit divides the input signal into a reflection wave and a travelling wave which is then outputted as the distortion signal of a nonlinear component composed of a basic wave signal and a high-order distortion signal. In the hybrid circuit 4, the reflection wave and the output signal of the distortion amplifier 5 are reverse-phase synthesized. A phase adjusting circuit 6 and an amplitude adjusting circuit 7 are preferred to be connected to the distortion amplifier 5 and the 0° output port 43 of the hybrid circuit 4, respectively. COPYRIGHT: (C)2005,JPO&NCIPI
138 High efficiency uhf linear power amplifier circuit JP4429490 1990-02-26 JPH07101821B2 1995-11-01 ジョセフ コッホ マイケル; エドワード フィッシャー リード
139 JPH06510655A - JP50331194 1993-06-14 JPH06510655A 1994-11-24
140 ジョセフソン接合ベースのサーキュレータならびに関連する系および方法 JP2017545319 2016-02-26 JP2018514104A 2018-05-31 スリワ,カトリーナ; ハットリッジ,マイケル; ナーラ,アニルド; シャンカー,シャム; フルンジオ,ルイージ; シェールコプフ,ロバート,ジェイ.,ザ サード; デボレット,マイケル
いくつかの局面によると、ループ中に直列に配列される複数のジョセフソン接合、ループを通して磁束を生じる少なくとも1つの磁性素子、複数の超伝導共振器、ここでそれぞれの共振器は、複数のジョセフソン接合の異なった隣り合うジョセフソン接合の対の間でループに連結される、複数のポート、ここでそれぞれのポートは、共振器がループに連結される末端とは反対にある共振器の末端で、複数の共振器の少なくとも1つに連結される、および複数のポートのそれぞれに入エネルギーを提供するように構成される少なくとも1つの制御器、ここで該制御器は、複数のポートの間で回路をサーキュレータとして機能させる、を含む回路が提供される。
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