| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 1 | 宽共模电流传感放大器的装置和方法 | CN201310445532.1 | 2013-09-25 | CN103684295A | 2014-03-26 | 万全 |
| 装置和方法减小或增大差分放大器的共模范围。一种电路使用耦接到放大器的输入级的一个或多个浮动电源和一个或多个浮动接地来增大差分放大器的共模范围。所述浮动电源可配置以选择差分信号中的一个的电压电平和系统电源高源中较大者。所述浮动接地可配置以选择所述差分信号中的一个的电压电平和系统电源低源中较小者。 | ||||||
| 2 | 具有自偏置及单插脚射频信号输入的集成电路装置 | CN00131372.X | 2000-09-24 | CN1291004A | 2001-04-11 | 威廉·马尼韦克; 彼得·希克; 威廉·史密特 |
| 一种集成电路组件里的射频转发器装置,它仅需要一个专用插脚,用来连接一个接收远距离的信号的并联谐振调谐电路。这根专用插脚具有一个电容器,它阻塞直流(DC)通过,射频放大器的独立直流偏置供提高其信号放大系数。另一个用于公用电源或接地的组件插脚,用来与谐振调谐电路进行第二连接。在单个集成电路组件中,多个转发器输入可以仅利用一个专用插脚加一个公用插脚来实现,公用插脚可被用于另一种用途,例如接电源或接地。 | ||||||
| 3 | 宽共模电流传感放大器的装置和方法 | CN201310445532.1 | 2013-09-25 | CN103684295B | 2017-01-04 | 万全 |
| 装置和方法减小或增大差分放大器的共模范围。一种电路使用耦接到放大器的输入级的一个或多个浮动电源和一个或多个浮动接地来增大差分放大器的共模范围。所述浮动电源可配置以选择差分信号中的一个的电压电平和系统电源高源中较大者。所述浮动接地可配置以选择所述差分信号中的一个的电压电平和系统电源低源中较小者。 | ||||||
| 4 | Memory effect reduction using low impedance cascode biasing | US14730142 | 2015-06-03 | US09768743B1 | 2017-09-19 | Sai-Wang Tam; Philip Godoy; Ming He; Renaldi Winoto |
| A circuit includes a reference voltage circuit, a filter circuit configured to receive an output of the reference voltage circuit, and a voltage follower configured to receive an output of the filter circuit and generate a bias voltage. The filter circuit is configured to combine signals on a reference ground with the output of the reference voltage circuit. A method of providing a bias voltage includes generating a reference voltage using a reference voltage circuit, filtering the reference voltage to generate a second voltage using a filter circuit, and generating the bias voltage according to the second voltage using a voltage follower circuit. Filtering the reference voltage includes combining a fluctuation of the reference ground with the reference voltage. | ||||||
| 5 | APPARATUS AND METHOD FOR WIDE COMMON MODE DIFFERENCE | US13626512 | 2012-09-25 | US20140084999A1 | 2014-03-27 | Quan Wan |
| Apparatus and methods reduce increase the common mode range of a difference amplifier. A circuit uses one or more floating powers and one or more floating grounds coupled to an input stage of an amplifier to increase the common mode range of a difference amplifier. The floating power can be configured to select from the greater of the voltage level of one of the differential signals and the system power high source. The floating ground can be configured to select from the lesser of the voltage level of one of the differential signals and the system power low source. | ||||||
| 6 | INPUT RECEIVER WITH NEGATIVE VOLTAGE GENERATOR AND RELATED METHOD | US11759223 | 2007-06-06 | US20080111587A1 | 2008-05-15 | Wei-Li Liu |
| An input receiver includes a negative voltage generator and an amplifier for amplifying an input signal. The negative voltage generator generates a negative voltage. The amplifier is coupled to the input signal, a supply voltage, and the negative voltage, and amplifies the input signal to generate an amplified signal accordingly. | ||||||
| 7 | Differential audio line receiver | JP52001896 | 1995-12-22 | JPH10511517A | 1998-11-04 | イー． ホイトロック，ウィリアム |
| (57)【要約】 差動モードの入力信号を第１および第２差動線から受信して単端信号を出力線に出力する、ブートストラップされたオーディオ線受信器。 この線受信器は、差動増幅器と、差動出力端子と差動入力端子を持つ入力増幅器を備える。 入力増幅器は差動線と差動増幅器の間に接続する。 入力増幅器は接地端子への電流路を形成し、オーディオ周波数のＡＣ信号に対して高い入力インピーダンスを保持する。 また入力増幅器はｒｆフィルタを備え、オーディオ周波数で線受信器のコモンモード雑音除去に悪影響を与えることなく、ｒｆ雑音を除去する。 一実施態様では、入力増幅器は、単位ゲインの２個の演算増幅器を備え、また入力増幅器の各入力端子と接地端子の間に２個のバイアス抵抗器を直列に接続する。 直列に接続するバイアス抵抗器の各組の間のノードと各演算増幅器の出力との間にコンデンサを接続することにより、バイアス抵抗器が低インピーダンスになって線受信器のコモンモード除去比を大きく低下させることがないようにする。 このようにして、この線受信器は広範囲の均衡および不均衡のソースインピーダンスに耐えて、線受信器のコモンモード除去比の低下を最小限にする。 | ||||||
| 8 | POWER AMPLIFIER SYSTEMS WITH DIFFERENTIAL GROUND | US15698488 | 2017-09-07 | US20180076770A1 | 2018-03-15 | Foad Arfaei Malekzadeh; Stephen Joseph Kovacic |
| Apparatus and methods for power amplifier systems with differential ground are provided. In certain implementations, a semiconductor die for a radio frequency communication system includes a differential ground network configured to distribute a ground voltage. The differential ground network is substantially symmetric with respect to a line of symmetry. The semiconductor die further includes a first differential power amplifier including a first half circuit and a second half circuit that operate differentially to provide amplification. The first half circuit and the second half circuit are symmetrically connected to the differential ground network. The semiconductor die can further include a second differential power amplifier, and the differential ground network serves to provide isolation between the first differential power amplifier and the second differential power amplifier. | ||||||
| 9 | Ground partitioned power amplifier for stable operation | US13310611 | 2011-12-02 | US08604873B2 | 2013-12-10 | Baker Scott; George Maxim; Stephen Franck; Chu Hsiung Ho |
| Achievement of robust stability of a power amplifier (PA) that allows the sharing of the ground between the driver stages and the output stage is shown. A controlled amount of negative feedback is used to neutralize the local positive feedback that results from the driver-to-output stage ground sharing in the signal path, for example, a radio frequency (RF) signal path. The solution keeps a strong drive and a good performance of the PA. Exemplary embodiments are shown for the PA positive feedback neutralization. A first embodiment uses a ground signal divider while another embodiment uses a ground signal divider weighting technique. | ||||||
| 10 | Ground Partitioned Power Amplifier for Stable Operation | US13310611 | 2011-12-02 | US20120139639A1 | 2012-06-07 | Baker Scott; George Maxim; Stephen Franck; Chu Hsiung Ho |
| Achievement of robust stability of a power amplifier (PA) that allows the sharing of the ground between the driver stages and the output stage is shown. A controlled amount of negative feedback is used to neutralize the local positive feedback that results from the driver-to-output stage ground sharing in the signal path, for example, a radio frequency (RF) signal path. The solution keeps a strong drive and a good performance of the PA. Exemplary embodiments are shown for the PA positive feedback neutralization. A first embodiment uses a ground signal divider while another embodiment uses a ground signal divider weighting technique. | ||||||
| 11 | Differential line receiver with common-mode AC bootstrapping | US363243 | 1994-12-22 | US5568561A | 1996-10-22 | William E. Whitlock |
| A bootstrapped audio line receiver that receives a differential-mode input signal from first and second differential lines and outputs a single-ended signal on an output line. The line receiver includes a differential amplifier and an input amplifier having differential output terminals and differential input terminals. The input amplifier is connected between the differential lines and the differential amplifier. The input amplifier provides a dc current path to a ground terminal while maintaining a high input impedance to ac signals at audio frequencies. The input amplifier also includes an rf filter that removes rf noise without adversely affecting the line receiver's common-mode noise rejection at audio frequencies. In one embodiment, the input amplifier includes two operational amplifiers connected for unity gain and having two bias resistors connected in series between each input terminals of the input amplifier and a ground terminal. A capacitor is connected from the output of each operational amplifier to a node between each set of series connected bias resistors and prevents the low impedance of the bias resistors from significantly degrading the line receiver's common-mode rejection ratio. Thus, the line receiver tolerates a wide range of balanced and unbalanced source impedances with a minimal deterioration of the line receiver's common-mode rejection ratio. | ||||||
| 12 | Integrated circuit having self-bias and signal pin wireless frequency signal input | JP2000291328 | 2000-09-25 | JP2001136099A | 2001-05-18 | MARNEWECK WILLEM; SCHIEKE PETER; SMIT WILLEM |
| PROBLEM TO BE SOLVED: To provide a wireless frequency transponder that effectively and skillfully utilizes an input output pin to connect a parallel resonance circuit on an integrated circuit package to a transponder circuit of the integrated circuit. SOLUTION: The wireless frequency transponder includes a wireless frequency tuning circuit having 1st and 2nd terminals and the integrated circuit having a 1st capacitor, a wireless frequency amplifier, 1st and 2nd current sources, and a bias control circuit. The 1st and 2nd current sources are connected to the wireless Frequency amplifier and generate the bias level of the amplifier and control The gain of the amplifier. The bias control circuit generate a bias level and is connected to the 1st and 2nd current sources, the integrated circuit has signal connection and common connection terminals and the input of the wireless frequency amplifier is connected to the signal connection terminal. The 1st capacitor is connected between the 1st terminal of the wireless frequency tuning circuit and the signal connection terminal and the 2nd terminal of the wireless frequency tuning circuit is connected to the common connection terminal. | ||||||
| 13 | Circuit device provided with multiplexer | JP19805796 | 1996-07-26 | JPH0951234A | 1997-02-18 | ERUBUIN BEEHIYAA |
| PROBLEM TO BE SOLVED: To ensure zero point offset by providing 1st, 2nd, 3rd switching period sets and connecting the 2nd and 3rd switching period sets to an auxiliary amplifier to relate even the auxiliary amplifier to a zero point of an amplifier. SOLUTION: First switching period sets S11 , S12 S1 N connect N-sets of signal channels L1 , L2 , LN to one input of an amplifier 1 so as to relate the amplifier 1 to a circuit zero point SN. Second switching period sets S21 , S22 , S2 N are used to connect further N-sets of channel zero point lines N1 , N2 , Nn . Thus, inputs of third switching period sets S31 , S32 , S3n connected to inputs of the sets S21 , S22 , S2n and outputs are connected in common to an auxiliary amplifier 3. The amplifier 3 is related to the circuit zero point SN similarly to the amplifier. The potential at the zero point SN of a 1-out-of-N multiplexer 2 is applied to each multiplexer of the lines N1 , N2 , Nn . | ||||||
| 14 | SEGMENTED THERMAL AND RF GROUND | US15636626 | 2017-06-28 | US20190006999A1 | 2019-01-03 | Daeik Daniel KIM; Manuel ALDRETE; Bonhoon KOO |
| An exemplary improved ground for a power amplifier circuit may include structural separation of the drive amplifier and the power amplifier grounds and cut-off of the power amplifier induced feedback current to ensure stability under a wide-range of operating conditions. The exemplary power amplifier may include a first ground coupled to a first amplifier circuit, a second ground coupled to a second amplifier circuit separate from the first ground, and the first amplifier circuit generates a drive current for the second amplifier circuit. | ||||||
| 15 | Grounding structure and grounding method of vacuum tube audio amplifier | US15692209 | 2017-08-31 | US10135402B1 | 2018-11-20 | Hsi-Hsien Chen |
| The invention provides a grounding structure and a grounding method for a vacuum tube audio amplifier, the grounding structure and the grounding method including: with respect to a power source, utilizing a power circuit without a choke, an anti-coupling circuit, and a filament voltage regulator circuit; and with respect to the grounding method, utilizing an negative output terminal of an audio output transforming circuit or a negative terminal of a filter capacitor in the power circuit as a single ground terminal of the vacuum tube audio amplifier, and not arranging a grounding metal bottom plate therein, in order to achieve a compact, lightweight desktop model of a vacuum tube audio amplifier. | ||||||
| 16 | Apparatus and method for wide common mode difference | US13626512 | 2012-09-25 | US08902005B2 | 2014-12-02 | Quan Wan |
| Apparatus and methods reduce increase the common mode range of a difference amplifier. A circuit uses one or more floating powers and one or more floating grounds coupled to an input stage of an amplifier to increase the common mode range of a difference amplifier. The floating power can be configured to select from the greater of the voltage level of one of the differential signals and the system power high source. The floating ground can be configured to select from the lesser of the voltage level of one of the differential signals and the system power low source. | ||||||
| 17 | Audio amplification device with antipop circuitry | US11505626 | 2006-08-17 | US07227413B1 | 2007-06-05 | Nicolas Marty |
| An audio amplification device includes an input for receiving an input audio signal and an output for delivering an output audio signal and an amplifier (OA1) comprising a differential pair of MOS transistors. The gate of the first transistor is coupled to the input of the device. The gate of the second MOS transistor receives a reference voltage which takes the form of a rising ramp when the power is turned on. The drain of one of the transistors is coupled to the output. The amplifier also includes a biasing circuitry for biasing the bulk of the transistors to a first voltage level approximately equal to a supply voltage at the beginning of the reference voltage ramp, and to a second voltage level (VBB) approximately equal to the voltage of their source at the end of the ramp. The generation of a pop is thus avoided when the power is turned on, while still benefiting from an optimum PSRR in the normal operation phase. | ||||||
| 18 | Integrated circuit device having a self-biased, single pin radio frequency signal input | US09405451 | 1999-09-24 | US06509825B1 | 2003-01-21 | Willem Smit; Pieter Schieke; Willem J. Marneweck |
| A radio frequency transponder device in an integrated circuit package requires only one dedicated pin for connection to a parallel resonant tuned circuit for receiving a remote signal. The one dedicated pin has a capacitor which blocks direct current (DC) flow and allows independent DC biasing of a radio frequency amplifier for increased signal amplification gain. Another package pin used for common power or ground connections supplies the second connection to the resonant tuned circuit. Multiple transponder inputs may be implemented in a single integrated circuit package using only one dedicated pin per input plus one common pin which may be used for another purpose, such as a power or a ground connection. | ||||||
| 19 | Low noise arrangement or an amplifier | US944454 | 1997-10-06 | US5982234A | 1999-11-09 | Eric Compagne |
| The invention relates to an arrangement comprising a main amplifier (1, 10) and means (5) for creating, at least during predetermined periods, a floating references voltage (V.sub.G) for applying at least one input signal (V') on at least one first input terminal (E-, E) of the main amplifier, said reference voltage (V.sub.G) being servo-controlled to the equivalent input noise (Vn) of the main amplifier. | ||||||
| 20 | Circuit arrangement with a multiplexer | US686196 | 1996-07-24 | US5864561A | 1999-01-26 | Erwin Becher |
| To connect one out of N signal channels (K.sub.1, K.sub.2, K.sub.N) each having a signal line (L.sub.1, L.sub.2, L.sub.N) and a channel zero line (N.sub.1, N.sub.2, N.sub.N), where N is greater than one, to one input of a (differential) amplifier (1) whose circuit is referenced to an associated ground (SN), a one-out-of-N multiplexer (2) is provided having 3N switching paths (S.sub.11, S.sub.21, S.sub.31, S.sub.12, S.sub.22, S.sub.32, S.sub.1N, S.sub.2N, S.sub.3N), a first (S.sub.11, S.sub.12, S.sub.1N) of which serves to connect the N signal lines (L.sub.1, L.sub.2, L.sub.N) to said input, and a second (S.sub.21, S.sub.22, S.sub.2N) of which serves to advance the N channel zero lines (N.sub.1, N.sub.2, N.sub.N). The respective inputs of the switching paths of a third switching-path set (S.sub.31, S.sub.32, S.sub.N) are connected to the respective inputs of the switching paths of the second switching-path set (S.sub.21, S.sub.22, S.sub.2N), and the outputs of the latter are commoned to one input of an auxiliary (differential) amplifier (3). The outputs of the third switching-path set (S.sub.31, S.sub.23, S.sub.2N) are commoned to the output of the auxiliary (differential) amplifier, whose circuit is referenced to the ground (SN) of the (differential) amplifier (1). | ||||||
QQ群二维码
意见反馈
意见反馈