| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 161 | Low-noise amplifier | EP12153472.1 | 2012-02-01 | EP2624448B1 | 2015-08-19 | Mattisson, Sven; Andersson, Stefan |
| 162 | Closed loop control system, and an amplifier in combination with such a closed loop control system | EP14182044.9 | 2014-08-22 | EP2852053A3 | 2015-06-24 | Bodnar, Rares Andrei; Pratt, Patrick; Bourke, Donal; Tonge, Peter James |
A control apparatus is provided that can provide high dynamic resolution and is suitable for inclusion within an integrated circuit. The control apparatus receives a demand signal representing a desired value of a measurand, and a feedback signal representing a present value or a recently acquired value of the measurand. The processing circuit forms a further signal a further signal which is a function of the demand and feedback signals. The further signal is then subjected to at least an integrating function. The demand signal, feedback signal or the further signal is processed or acquired in a sampled manner. The use of such sampled, i.e. discontinuous, processing allows integration time constants to be synthesised which would otherwise require the use of unfeasibly large components within an integrated circuit, or the use of off-chop components. Both of these other options are expensive.
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| 163 | Closed loop control system, and an amplifier in combination with such a closed loop control system | EP14182044.9 | 2014-08-22 | EP2852053A2 | 2015-03-25 | Bodnar, Rares Andrei; Pratt, Patrick; Bourke, Donal; Tonge, Peter James |
A control apparatus is provided that can provide high dynamic resolution and is suitable for inclusion within an integrated circuit. The control apparatus receives a demand signal representing a desired value of a measurand, and a feedback signal representing a present value or a recently acquired value of the measurand. The processing circuit forms a further signal a further signal which is a function of the demand and feedback signals. The further signal is then subjected to at least an integrating function. The demand signal, feedback signal or the further signal is processed or acquired in a sampled manner. The use of such sampled, i.e. discontinuous, processing allows integration time constants to be synthesised which would otherwise require the use of unfeasibly large components within an integrated circuit, or the use of off-chop components. Both of these other options are expensive.
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| 164 | LOW NOISE AMPLIFIER FOR MULTIPLE CHANNELS | EP12809960.3 | 2012-12-17 | EP2792069A1 | 2014-10-22 | SAMUELS, Howard, R. |
| An amplifier system has an amplifier for amplifying a plurality of input signals from a plurality of different channels, and a plurality of demodulators each operatively coupled with the amplifier for receiving amplified input signals from the amplifier. Each demodulator is configured to demodulate a single amplified input channel signal from a single channel of the plurality of different channels. The system thus also has a plurality of filters, coupled with each of the demodulators, for mitigating the noise. | ||||||
| 165 | LOW DISSIPATION AMPLIFIER | EP10746855 | 2010-02-25 | EP2401811A4 | 2014-07-30 | FINCHAM LAWRENCE R; JONES OWEN |
| A low dissipation, low distortion amplifier includes a driver amplifier stage and a main output stage, with a plurality of impedance networks providing, among other things, feedback paths from outputs of the driver and main output stages to the input of the driver stage. The impedance networks also provide coupling paths from the outputs of the driver and main output stages to the load. The impedance networks can all be formed of resistors, capacitors, or network combinations thereof. An additional feedback path can be added from the load to the driver stage to flatten out the frequency response at low frequencies. The driver and main output stages may be operated in Class AB and B modes respectively, and/or in Class G or H modes. An intermediate amplifier driver stage may be added between the driver and main output stages. | ||||||
| 166 | Sensor amplifier arrangement and method for amplifying a sensor signal | EP13161671.6 | 2013-03-28 | EP2648333A3 | 2014-04-02 | Fröhlich, Thomas; Steiner, Matthias |
A sensor amplifier arrangement (10) includes an amplifier (11) having a signal input (12) to receive a sensor signal and a signal output (13) to provide an amplified sensor signal, and a feedback path (30) that couples the signal output (13) to the signal input (12) and provides a feedback current that is an attenuated signal of the amplified sensor signal and is inverted with respect to the sensor signal.
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| 167 | Sensor amplifier arrangement and method for amplifying a sensor signal | EP13161671.6 | 2013-03-28 | EP2648333A2 | 2013-10-09 | Fröhlich, Thomas; Steiner, Matthias |
A sensor amplifier arrangement (10) includes an amplifier (11) having a signal input (12) to receive a sensor signal and a signal output (13) to provide an amplified sensor signal, and a feedback path (30) that couples the signal output (13) to the signal input (12) and provides a feedback current that is an attenuated signal of the amplified sensor signal and is inverted with respect to the sensor signal.
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| 168 | Low-noise amplifier | EP12153472.1 | 2012-02-01 | EP2624448A1 | 2013-08-07 | Mattisson, Sven; Andersson, Stefan |
A common source or common emitter LNA circuit (30) for amplifying signals at an operating frequency f in a receiver circuit (10) is disclosed. The LNA circuit (30) comprises an input transistor (50) arranged to, in operation, be biased to have a transconductance gm at the operating frequency f, and having a first terminal (52), which is a gate or base terminal, operatively connected to an input terminal (32) of the LNA circuit (30). The LNA circuit (30) further comprises a shunt-feedback capacitor (60) operatively connected between the first terminal (52) of the input transistor (50) and a second terminal (54), which is a drain or collector terminal, of the input transistor (50). Furthermore, the LNA circuit (30) comprises an output capacitor (65) operatively connected between the second terminal (54) of the input transistor (50) and an output terminal (34) of the LNA circuit. The output capacitor (65) has a capacitance value CL < gm/f.
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| 169 | LOW-NOISE AMPLIFIER | PCT/EP2013051492 | 2013-01-25 | WO2013113636A3 | 2013-12-19 | MATTISSON SVEN; ANDERSSON STEFAN |
| A common source or common emitter LNA circuit (30) for amplifying signals at an operating frequency f in a receiver circuit (10) is disclosed. The LNA circuit (30) comprises an input transistor (50) arranged to, in operation, be biased to have a transconductance g m at the operating frequency f, and having a first terminal (52), which is a gate or base terminal, operatively connected to an input terminal (32) of the LNA circuit (30). The LNA circuit (30) further comprises a shunt-feedback capacitor (60) operatively connected between the first terminal (52) of the input transistor (50) and a second terminal (54), which is a drain or collector terminal, of the input transistor (50). Furthermore, the LNA circuit (30) comprises an output capacitor (65) operatively connected between the second terminal (54) of the input transistor (50) and an output terminal (34) of the LNA circuit. The output capacitor (65) has a capacitance value C L < g m /f . | ||||||
| 170 | LOW POWER HIGH-SPEED DIGITAL RECEIVER | PCT/US2011066483 | 2011-12-21 | WO2013109237A3 | 2013-10-10 | SONG HONGJIANG |
| Described herein is a low power high-speed digital receiver. The apparatus of the receiver comprises: a sampling unit operable to sample a differential input signal and to boost input signal gain, the sampling unit to generate a sampled differential signal with boosted input signal gain; and a differential amplifier to amplify the sampled differential signal with boosted input signal gain, the differential amplifier to generate a differential amplified signal. | ||||||
| 171 | APPARATUS AND METHODS FOR BIASING POWER AMPLIFIERS | PCT/US2012037065 | 2012-05-09 | WO2012158423A3 | 2013-03-21 | LI PING; DICARLO PAUL T |
| Apparatus and methods for biasing a power amplifier are disclosed. In one embodiment, a method of biasing a power amplifier includes shaping an enable signal using a time-dependent signal generator to generate a control current, amplifying the control current using a current amplifier to generate a correction current, and generating a bias current for a power amplifier using a primary biasing circuit. The primary biasing circuit is configured to use the correction current to correct for a variation in gain of the power amplifier when the power amplifier is enabled. | ||||||
| 172 | AN EFFICIENT PEAK CANCELLATION METHOD FOR REDUCING THE PEAK-TO-AVERAGE POWER RATIO IN WIDEBAND COMMUNICATION SYSTEMS | PCT/IB2009005600 | 2009-03-31 | WO2009122298A3 | 2009-12-17 | KIM WAN JONG; CHO KYOUNG JOON; KIM JONG HEON; STAPLETON SHAWN PATRICK |
| An efficient peak cancellation method for reducing the peak-to-average power ratio in wideband communication systems uses repeated clipping and frequency domain filtering to achieve a desired peak-to-average power ratio for wideband code division multiple access and orthogonal frequency division multiplexing signals. The maximum magnitude of the filtered pulse is determined by a scaling factor which permits eliminating several iterations while still achieving convergence to the targeted peak-to- average power ratio, thereby reducing computational load and saving hardware resources. This results in improved performance in terms of error vector magnitude, adjacent channel leakage ratio and peak-to-average power ratio. | ||||||
| 173 | 주파수 변환 없이 고감도 선택적 수신기로서 사용되기 위한 대수 검출 증폭기 시스템 | KR1020187021599 | 2014-03-14 | KR1020180088921A | 2018-08-07 | |
| 고감도수신부스터및 통신장치의수신체인내 저잡음증폭기에대한대체품으로서사용되기위한대수검출기증폭(LDA) 시스템이제공된다. 상기 LDA 시스템은제1 주파수를갖는입력신호를수신하고입력신호를기초로발진을생성하도록구성된증폭회로, 상기증폭회로에연결되고지정임계치를기초로상기발진을종료하여상기발진을주기적으로고정및 재시작하여발진및 입력신호에의해변조되는일련의펄스를생성하도록구성된샘플링회로, 및증폭회로와연결되며동작의주파수를확립하며, 제2 주파수를갖는출력신호를생성하도록구성된하나이상의공진회로를포함하며, 상기제2 주파수는제1 주파수와실질적으로동일하다. | ||||||
| 174 | 부스팅된 피킹을 갖는 증폭기 | KR20187010369 | 2016-09-06 | KR20180042447A | 2018-04-25 | YUAN XIAOBIN; PRASAD MANGAL; NATONIO JOSEPH |
| 일구현에서, 증폭기(305)는복수의인덕터셀들을포함하는로드회로(310), 및입력신호를수신하고, 증폭된신호를생성하기위해입력신호에기반하여로드회로(310)를구동시키도록구성된구동회로(314)를포함한다. 증폭기(305)는또한인에이블되는인덕터셀들의수를조정함으로써증폭기(305)의피킹게인을튜닝하도록구성된제어기(350)를포함한다. | ||||||
| 175 | 고효율 고집적 수신기 | KR1020160010004 | 2016-01-27 | KR101768358B1 | 2017-08-17 | 김기진; 안광호 |
| 고효율고집적수신기가제공된다. 본발명의실시예에따른레이더수신기는, 레이더신호를수신하는수신부, 수신부의수신신호의저주파대역의크기를감쇄시키는처리부, 처리부의출력신호를저주파필터링하는필터부및 필터부의출력신호를 A/D 변환하는 ADC를포함한다. 이에의해, 저해상도의 ADC를사용하면서도다양한거리의목표물에서반사되는신호들을모두복조할수 있게되어, 제조단가와전력소모를낮출수 있게된다. | ||||||
| 176 | 파워 증폭기들을 바이어스하기 위한 장치 및 방법들 | KR1020137031862 | 2012-05-09 | KR101767298B1 | 2017-08-10 | 리,핑; 디카를로,폴,티. |
| 파워증폭기를바이어스하기위한장치및 방법들이공개된다. 일실시예에서, 파워증폭기를바이어스하기위한방법은시간종속신호생성기를사용하여인에이블신호를정형하여제어전류를생성하는단계, 전류증폭기를사용하여제어전류를증폭하여정정전류를생성하는단계, 및일차바이어스회로를사용하여파워증폭기에대한바이어스전류를생성하는단계를포함한다. 일차바이어스회로는파워증폭기가인에이블될때 파워증폭기의게인변화를정정하기위한정정전류를사용하도록구성된다. | ||||||
| 177 | 선택적으로 결합되는 게이트 단자들을 갖는 차동 캐스코드 증폭기 | KR1020167028864 | 2015-04-14 | KR1020160145592A | 2016-12-20 | 찬,알렌엔가룽; 예오,가레스성타이 |
| 장치는제 1 트랜지스터및 제 2 트랜지스터를포함하는차동캐스코드증폭기를포함한다. 장치는차동캐스코드증폭기의제 1 트랜지스터의게이트단자에결합되는소스단자를포함하는트랜지스터를더 포함한다. 트랜지스터는또한차동캐스코드증폭기의제 2 트랜지스터의게이트단자에결합되는드레인단자를포함한다. | ||||||
| 178 | 용량성 프로그래머블 이득 증폭기 | KR1020167026512 | 2015-03-19 | KR1020160136322A | 2016-11-29 | 후앙,웬창; 샤,피터지반; 아진,메이삼; 메라비,아라쉬 |
| 장치는, 연산증폭기, 및연산증폭기의입력단자에커플링되고, 연산증폭기의입력전압신호와출력전압신호중 하나를수신하기위해선택적으로커플링되도록구성된복수의커패시터들을포함한다. | ||||||
| 179 | 용량성 신호 소스 증폭기용 시스템 및 방법 | KR1020130130188 | 2013-10-30 | KR101564145B1 | 2015-10-28 | 세발로스호세루이스; 크롭피츄마이클 |
| 일실시예에따르면, 용량성신호소스에의해제공되는신호를증폭하기위한시스템은제1 전압폴로워장치, 제2 전압폴로워장치, 및제1 커패시터를포함한다. 제1 전압폴로워장치는용량성신호소스의제1 단자에연결되도록구성된입력단자를포함하고, 제2 전압폴로워장치는제1 전압폴로워장치의제1 출력단자에연결된입력단자및 제1 전압의제2 출력단자에연결된출력단자를포함한다. 또한, 제1 커패시터는제1 전압폴로워장치의제1 출력단자에연결된제1 단부, 및용량성신호소스의제2 단자에연결되도록구성된제2 단부를가진다. | ||||||
| 180 | 스위치 전류의 조절을 이용한 고효율 포락선 증폭기를 위한 장치 및 방법. | KR1020130063842 | 2013-06-04 | KR1020140142466A | 2014-12-12 | 김범만; 김동수; 김주승 |
| 포락선 증폭기의 효율을 포락선 출력 전력의 전 구간에서 극대화하기 위하여 스위치 전류의 조절을 이용한 포락선 증폭기 및 방법을 제공하여 스마트폰이나 이동 전화와 같은 휴대용 무선 장치들 또는 노트북 컴퓨터와 같이 배터리를 전력으로 사용하는 응용장치의 배터리 수명을 연장할 수 있는 장점을 가진다.
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