| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 121 | SPUR CANCELLATION IN GSM-GPRS-EDGE POWER AMPLIFIERS WITH DC-DC CONVERTERS | PCT/US2013067590 | 2013-10-30 | WO2014070938A2 | 2014-05-08 | GORBACHOV OLEKSANDR |
| A radio frequency (RF) power amplifier circuit with spur cancellation for GSM/GPRS/EDGE transceivers is disclosed. There is a power amplifier with an RF input, an RF output, and a voltage supply input. Additionally, there is an adjustable DC-DC converter with an input connected to a battery, an output connected to the voltage supply input of the power amplifier with a DC supply voltage signal generated thereby. A spur compensator generates an error control signal responsive to spurs in the DC supply voltage signal. The error control signal is applied to the RF input of the power amplifier. | ||||||
| 122 | SWITCHED CAPACITOR CIRCUITS HAVING LEVEL-SHIFTING BUFFER AMPLIFIERS, AND ASSOCIATED METHODS | PCT/US2013064999 | 2013-10-15 | WO2014059437A2 | 2014-04-17 | LEE HAE |
| Switched capacitor circuits and charge transfer methods comprising a sampling phase and a transfer phase. Circuits and methods are implemented via a plurality of switches, a set of at least two capacitors, at least one buffer amplifier, and an operational amplifier. In one example, during the sampling phase at least one input voltage is sampled, and during the transfer phase at least a first reference voltage provided by the at least one buffer amplifier is subtracted from the at least one input voltage using the operational amplifier. The same set of at least two capacitors may be used in both the sampling phase and the transfer phase. | ||||||
| 123 | LOW DISSIPATION AMPLIFIER | PCT/US2010025455 | 2010-02-25 | WO2010099349A8 | 2011-05-26 | JONES OWEN; FINCHAM LAWRENCE R |
| A low dissipation, low distortion amplifier includes a driver amplifier stage and a main output stage, with a plurality of impedance networks providing, among other things, feedback paths from outputs of the driver and main output stages to the input of the driver stage. The impedance networks also provide coupling paths from the outputs of the driver and main output stages to the load. The impedance networks can all be formed of resistors, capacitors, or network combinations thereof. An additional feedback path can be added from the load to the driver stage to flatten out the frequency response at low frequencies. The driver and main output stages may be operated in Class AB and B modes respectively, and/or in Class G or H modes. An intermediate amplifier driver stage may be added between the driver and main output stages. | ||||||
| 124 | DIFFERENTIAL CASCODE AMPLIFIER WITH SELECTIVELY COUPLED GATE TERMINALS | EP15718119.9 | 2015-04-14 | EP3134966B1 | 2018-08-29 | CHAN, Alan Ngar Loong; YEO, Gareth Seng Thai |
| An apparatus includes a differential cascode amplifier including a first transistor and a second transistor. The apparatus further includes a transistor including a source terminal coupled to a gate terminal of the first transistor of the differential cascode amplifier. The transistor also includes a drain terminal coupled to a gate terminal of the second transistor of the differential amplifier. | ||||||
| 125 | LOW DISSIPATION AMPLIFIER | EP10746855.5 | 2010-02-25 | EP2401811B1 | 2018-01-03 | FINCHAM, Lawrence, R.; JONES, Owen |
| A low dissipation, low distortion amplifier includes a driver amplifier stage and a main output stage, with a plurality of impedance networks providing, among other things, feedback paths from outputs of the driver and main output stages to the input of the driver stage. The impedance networks also provide coupling paths from the outputs of the driver and main output stages to the load. The impedance networks can all be formed of resistors, capacitors, or network combinations thereof. An additional feedback path can be added from the load to the driver stage to flatten out the frequency response at low frequencies. The driver and main output stages may be operated in Class AB and B modes respectively, and/or in Class G or H modes. An intermediate amplifier driver stage may be added between the driver and main output stages. | ||||||
| 126 | LOGARITHMIC DETECTOR AMPLIFIER SYSTEM FOR USE AS HIGH SENSITIVITY SELECTIVE RECEIVER WITHOUT FREQUENCY CONVERSION | EP14844032 | 2014-03-14 | EP3044723A4 | 2017-05-03 | RADA PATRICK ANTOINE; BROWN FORREST JAMES; DUPUY ALEXANDRE |
| A logarithmic detector amplifying (LDA) system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The LDA system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more resonant circuits coupled with the amplifying circuit and configured to establish a frequency of operation and to generate an output signal having a second frequency, the second frequency being substantially the same as the first frequency. | ||||||
| 127 | DIFFERENTIAL CASCODE AMPLIFIER WITH SELECTIVELY COUPLED GATE TERMINALS | EP15718119.9 | 2015-04-14 | EP3134966A1 | 2017-03-01 | CHAN, Alan Ngar Loong; YEO, Gareth Seng Thai |
| An apparatus includes a differential cascode amplifier including a first transistor and a second transistor. The apparatus further includes a transistor including a source terminal coupled to a gate terminal of the first transistor of the differential cascode amplifier. The transistor also includes a drain terminal coupled to a gate terminal of the second transistor of the differential amplifier. | ||||||
| 128 | A MULTIPHASE PULSE WIDTH MODULATOR FOR CLASS D AUDIO AMPLIFIERS | EP14757947.8 | 2014-09-01 | EP3044873A1 | 2016-07-20 | NIELSEN, Allan, Nogueras; HØYERBY, Mikkel |
| A multiphase pulse width modulator (PWM) producing N mutually phase shifted PWM signals, which is well-suited for class D audio amplifier applications. The multiphase PWM includes (a) N+1 (N ≧2) analog triangular waveform generators producing N+1 mutually phase shifted triangular waveforms, and (b) N+1 comparators each having a first input coupled to each of the N+1 triangular waveforms and a second input coupled to an audio signal to generate N+1 mutually phase shifted PWM phase signals. A crosspoint switch includes N+1 inputs coupled to the N+1 PWM phase signals, and N outputs to supply the N PWM signals. A crosspoint switch controller selectively connects each of the N+1 inputs to each of the N outputs for a duration of a cycle time in a time sequence to simultaneously generate the N PWM signals such that each signal has interleaved time segments of the N+1 PWM phase signals. | ||||||
| 129 | AMPLIFIER AND RELATED METHOD | EP15192244.0 | 2015-10-30 | EP3021483A1 | 2016-05-18 | Yu, Chi-Yao; Chou, Chung-Yun |
An amplifier (400, 700) applicable to an intra-band non-contiguous carrier aggregation (NCCA) band includes a first amplifier circuit (401, 701) and a second amplifier circuit (402, 702). The NCCA band includes at least a primary component carrier (PCC) channel and a secondary component carrier (SCC) channel not adjacent to each other. The first amplifier circuit (401, 701) receives a first input signal (S1), and generates a first output signal (OUT1) for undergoing down-conversion of one of the PCC channel and the SCC channel. The second amplifier circuit (402, 702) receives at least one second input signal (S2), and generates a second output signal (OUT2) for undergoing down-conversion of another of the PCC channel and the SCC channel. The at least one second input signal (S2) received by the second amplifier circuit (402, 702) is provided by the first amplifier circuit (401, 701) according to the first input signal (Sl).
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| 130 | OPERATIONAL AMPLIFIER BASED CIRCUIT WITH COMPENSATION CIRCUIT BLOCK USED FOR STABILITY COMPENSATION | EP15191878.6 | 2015-10-28 | EP3021482A1 | 2016-05-18 | Yu, Chi-Yao |
An operational amplifier based circuit (100) has an operational amplifier (102), a feedback circuit (104), and a compensation circuit block (106). The feedback circuit (104) is coupled between an output port and an input port of the operational amplifier (102). The compensation circuit block (106) has circuits involved in stability compensation of the operational amplifier (102), wherein there is no stability compensation circuit driven at the output port of the operational amplifier (102).
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| 131 | A sample-and-hold amplifier | EP10250528.6 | 2010-03-19 | EP2367285B1 | 2016-05-11 | van de Vel, Hans; Buter, Berry Anthony Johannus |
| 132 | AMPLIFICATION OF A RADIO FREQUENCY SIGNAL | EP13886093.7 | 2013-05-29 | EP3005542A1 | 2016-04-13 | WANG, Zhancang |
| Apparatus (1) comprises envelope signal amplification circuitry (11) configured to receive an input envelope signal (ENV_in) indicative of an envelope of an input radio frequency signal (RF_in) and to output an amplified envelope signal (ENV_amp); and a radio frequency power amplifier (12) configured to receive a radio frequency control signal which is dependent on the input radio frequency signal(RF_in) and the input envelope signal (ENV_in), using the amplified envelope signal (ENV_amp) as its supply voltage, to output an amplified radio frequency signal (RF_amp). A method for amplification the radio frequency signal is also provided. | ||||||
| 133 | CLASS D SWITCHING AMPLIFIER AND METHOD OF CONTROLLING A LOUDSPEAKER | EP15177977.4 | 2015-07-23 | EP2983292A1 | 2016-02-10 | RAIMONDI, Marco; BOTTI, Edoardo |
A switching amplifier includes: a first half-bridge PWM modulator (11a); a second half-bridge PWM modulator (11b); at least one amplifier stage (8), configured to receive input signals (IIN+, IIN-); and a PWM control stage (10), configured to control switching of the first PWM modulator (11a) and of the second PWM modulator (11b) as a function of the input signals (IIN+, IIN-), by respective first PWM control signals (SPWM+) and second PWM control signals (SPWM-). The amplifier stage (8) and the PWM control stage (10) have a fully differential structure.
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| 134 | Robust sink/source output stage and control circuit | EP14174395.5 | 2014-06-26 | EP2961064A1 | 2015-12-30 | Kronmueller, Frank; Bhattad, Ambreesh |
The present document relates to multi-stage amplifiers, such as linear regulators or linear voltage regulators (e.g. low-dropout regulators), configured to provide a constant output voltage subject to load transients. A multi-stage amplifier (200) is described. The multi-stage amplifier (200) comprises a first amplification stage (260, 261) configured to activate or to deactivate a first output stage (270, 271, 201) in response to an input voltage at an input node (255). The first output stage (270, 271, 201) is configured to source a current at an output node (301) of the multi-stage amplifier (200) from a high potential (302), when activated. Furthermore, the multi-stage amplifier (200) comprises a second amplification stage (400, 401) configured to activate or to deactivate a second output stage (410, 411, 412) in response to the input voltage at the input node (255). The second output stage (410, 411, 412) is configured to sink a current at the output node (301) of the multi-stage amplifier (200) to a low potential (303), when activated. The first amplification stage (260, 261) and the second amplification stage (400, 401) are configured to activate the first output stage (270, 271, 201) and the second output stage (410, 411, 412) in a mutually exclusive manner.
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| 135 | Amplifier stage | EP15161796.6 | 2015-03-30 | EP2924878A1 | 2015-09-30 | Conte, Antonino; Giaquinta, Maria |
A solution for amplifying an input signal (Vin) into an output signal (Vo) to be applied to an electric load comprising at least one capacitive component (Cl) is proposed. A corresponding amplifier stage comprises a pre-amplifier module (305) adapted to receive a first supply voltage and an output module (310) adapted to receive a second supply voltage. The pre-amplifier module comprises: a first gain block (315) adapted to pre-amplify the input signal into a first pre-amplified signal, a second gain block (320) adapted to pre-amplify the input signal into a second preamplified signal, a feedback block (325) adapted to feed-back the output signal into a feedback signal, and a combination element (330) adapted to combine the first pre-amplified signal and the feedback signal into a combined signal, and wherein the output module is adapted to combine the combined signal and the second pre-amplified signal into the output signal.
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| 136 | Self oscillating class D amplification device | EP10075060.3 | 2010-02-12 | EP2221964B1 | 2015-06-24 | Putzeys, Bruno Johan Georges |
| 137 | DRIVE DEVICE, DRIVE METHOD, AND INFORMATION DEVICE | EP07743375.3 | 2007-05-15 | EP2020750B1 | 2014-12-17 | KAIHO, Toshio; MACHIDA, Junichi |
| 138 | SYSTEMS AND METHODS FOR IMPROVED POWER YIELD AND LINEARIZATION IN RADIO FREQUENCY TRANSMITTERS | EP11835165.9 | 2011-10-20 | EP2630693A1 | 2013-08-28 | MATSUMOTO, Frank; QIN, Youming; PHAM, David, C.M.; NATH, Jayesh; SHEN, Ying |
| An exemplary system comprises a linearizer module, a first upconverter module, a power amplifier module, a signal sampler module, and a downconverter module. The linearizer module may be configured to receive a first intermediate frequency signal and to adjust the first intermediate frequency signal based on a reference signal and a signal based on a second intermediate frequency signal. The first upconverter module may be configured to receive and up-convert a signal based on the adjusted first intermediate frequency signal to a radio frequency signal. The power amplifier module may be configured to receive and amplify a power of a signal based on the radio frequency signal. The signal sampler module may be configured to sample a signal based on the amplified radio frequency signal. The downconverter module may be configured to receive and down-convert a signal based on the sampled radio frequency signal to the second intermediate frequency signal. | ||||||
| 139 | DRIVE DEVICE, DRIVE METHOD, AND INFORMATION DEVICE | EP07743375 | 2007-05-15 | EP2020750A4 | 2013-02-27 | KAIHO TOSHIO; MACHIDA JUNICHI |
| 140 | LOW DISSIPATION AMPLIFIER | EP10746855.5 | 2010-02-25 | EP2401811A1 | 2012-01-04 | FINCHAM, Lawrence, R.; JONES, Owen |
| A low dissipation, low distortion amplifier includes a driver amplifier stage and a main output stage, with a plurality of impedance networks providing, among other things, feedback paths from outputs of the driver and main output stages to the input of the driver stage. The impedance networks also provide coupling paths from the outputs of the driver and main output stages to the load. The impedance networks can all be formed of resistors, capacitors, or network combinations thereof. An additional feedback path can be added from the load to the driver stage to flatten out the frequency response at low frequencies. The driver and main output stages may be operated in Class AB and B modes respectively, and/or in Class G or H modes. An intermediate amplifier driver stage may be added between the driver and main output stages. | ||||||
