Manufacture of semiconductor device
专利汇可以提供Manufacture of semiconductor device专利检索，专利查询，专利分析的服务。并且PURPOSE: To simultaneously reduce both gate length and gate resistance, by a method wherein the boundary between a semiconductor active layer and an insulating layer is positioned in an aperture of photo resist subjected to gate-patterning.
CONSTITUTION: On a semiconductor active layer 2, an insulating layer 8 whose etching rate is different from that of the layer 2 is formed. A photo resist 9 is patterned, which is used as a mask, and the layer 8 is etched. Source.drain electrode metal 3
0 is stuck on the whole surface by a vacuum evaporation method or the like, and the insulating layer 8 is left between a source and a drain by a lift-off method. After photo resist 10 is patterned, the insulating film 8 is etched by using the photo resist 10 as a mask, and the photo resist 10 is eliminated. Thereby a part where the semiconductor active layer 2 is exposed and a part where the insulating layer 8 exists are formed between the source and the drain. Gate-patterning is performed by a photolithography technique. In this process, an aperture part of photo resist 5 is made to overlap with the end portion of the insulating layer 8, and the boundary between the semiconductor active layer 2 and the insulating layer 8 is positioned in the aperture.
COPYRIGHT: (C)1992,JPO&Japio，下面是Manufacture of semiconductor device专利的具体信息内容。
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