Semiconductor integrated circuit
专利汇可以提供Semiconductor integrated circuit专利检索，专利查询，专利分析的服务。并且PURPOSE: To obtain a low-power, high-speed and highly-integrated IC by constituting a logic circuit by providing P-channel and N-channel bipolar J-FETs onto the same semiconductor substrate.
CONSTITUTION: It is ruled that low impurity density is between 10
15 to 10
16 /cm
3 and high impurity density is more than it. On N
- -type or P
- -type semiconductor substrate 1, P
- -type layer 2 and N
- -type layer 3 are made in contact and formed and in layer 2, P
+ -type source region 5 and drain region 8 besides N
+ -type gate region 6 are formed respectively by diffusion. In the same way, N
+ -type source region 14 and drain region 11, and P
+ -type gate region 10 are provided into layer 3, and the layer-2 side and layer-3 side are made into P-channel and N-channel transistors. In this way, bipolar transistors are formed on the same substrate to reduce the power consumption as a complementary transistor and also to increase the operation speed.
COPYRIGHT: (C)1979,JPO&Japio，下面是Semiconductor integrated circuit专利的具体信息内容。
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