Process for the production of a semiconductor component
阅读：58发布：2022-09-12
专利汇可以提供Process for the production of a semiconductor component专利检索，专利查询，专利分析的服务。并且Process for fabricating a semiconductor component such as a transit time avalanche diode or a Gunn diode where extremely small thicknesses of the semiconductor layers are involved and in which heat must be rapidly dissipated when in use. The component in a preferred process includes forming a plurality of recesses in a grid-like pattern in one surface of a semiconductor substrate, forming an epitaxial layer on one surface of the substrate opposite the surface in which the recesses are formed, forming a first electrode on the exposed surface of the epitaxial layer, forming a second electrode at the base of each recess in a centrally located area, placing the substrate with its epitaxial layer and second electrode on a metal base plate causing a ram to bear against the upstanding walls of the recesses to unite the second electrode by thermal compression to the base plate to provide good heat transfer relationship therewith, removing the material of the substrate forming the upstanding walls and enough of the remaining material of the substrate and the epitaxial layer to form a frustum-shaped semiconductor component.，下面是Process for the production of a semiconductor component专利的具体信息内容。
1. Process for the production of a semiconductor component in which a disc-shaped semiconductor crystal is covered on one side with a uniform epitaxial semiconductor layer, and then material is removed from the semiconductor surface in such a manner that a recess is formed, and in which both the epitaxial layer and the material of the original semiconductor crystal is provided with at least one electrode, characterized in that following the production of the epitaxial semiconductor layer, the side of the epitaxial layer facing away from the original semiconductor crystal is first covered with a first metal electrode in the form of a layer, then the original semiconductor crystal is, on the side facing away from the epitaxial layer, provided with at least one recess and inside the recess is provided with an etching mask which preferably forms the second electrode, and with the aid of this etching mask, semiconductor material is etched away from all around this etching mask, in such a manner that the semiconductor surface which has been newly formed as a result of the etching process intersects the junction between the epitaxial layer and the material of the original semiconductor crystal at least once along a closed curve, and that the second metal electrode is applied at the location of the etching mask.
2. Process according to claim 1, in which the recess which is produced on the side of the original semiconductor crystal which faces away from the epitaxial layer has the form of a pit which is bounded all around by parts of the semiconductor surface which are at a higher level, and which in particular has a uniform base depth.
3. Process according to claim 1, in which the recess which is produced on the side of the original semiconductor crystal facing away from the epitaxial layer obtains the form of a trench which traverses the whole of the side and has a uniform base depth.
4. Process according to claim 1, in which the second removal process which takes place on the side of the original crystal facing away from the epitaxial layer and which is carried out with the aid of the etching mask arranged on the base of the recess on this side, is continued until around the frustum-shaped semiconductor material which remains beneath the etching mask, there is exposed at least one strip, surrounding said frustum in ring shape, of the surface of the first metal electrode.
5. Process according to claim 1, in which the epitaxial layer and the basic semiconductor material together form a pn-junction.
6. Process according to claim 1, in which the epitaxial layer and the original crystal together form a junction between zones of the same conductivity type but of different doping strength.
7. Process according to claim 1, in which a disc-shaped semiconductor cRystal consisting of N+ conducting GaAs is used as original crystal and on the one side of the latter there is epitaxially deposited an n-conducting GaAs layer, that said epitaxial GaAs layer is covered with a first metal electrode which produces a rectifying contact, in particular a Schottky contact, and that the thickness of this metal electrode is set to be such that it is suitable as a carrier, capable of bearing mechanical stresses, of the system.
8. Process according to claim 1, in which the material of the first metal electrode and of the second electrode is produced by means of vapor deposition, sputtering, galvanic deposition and/or pyrolytic deposition from a suitable reaction gas using a vaporization mask.
9. Process according to claim 1, in which at least on the side which is adjacent to the semiconductor, the first metal electrode is produced from a group of metals including Cr, Ni, Pt, Mo, Ti, and on the side facing away from the epitaxial layer is produced from a silver and/or gold alloy, possibly with the metal of the first layer.
10. Process according to claim 1, in which on the installation of the element, the latter is, by its first metal electrode, permanently connected to a metallic plate in particular a housing plate.
11. Process according to claim 10, in which the first metal electrode is permanently connected to a metallic carrier, in particular, the metal base of a housing by means of thermo-compression.
12. Process according to claim 10, in which the second removal process which takes place on the side facing away from the epitaxial layer and is carried out with the aid of the etching mask arranged on the base of the recess, occurs inside an etch-resistant housing.
13. The process of fabricating a thin layered semiconductor component and securing it to a heat sink which includes taking a semiconductor slab, forming an epitaxial layer on one main surface thereof, forming a plurality of recesses arranged in grid-like fashion in the other main surface of the slab which are of such depth as to not reach the epitaxial layer, forming an electrode on the exposed surface of the epitaxial layer, forming a second electrode at the bottom of each recess, separating the thus formed assembly into a plurality of individual units each having one recess with a surrounding upstanding wall, placing the thus formed unit on a metal base plate, applying a compressive load under heat to said wall in the direction of said base plate, thereby uniting the base plate to the said unit by thermo-compression, and etching away said upstanding wall and portions of said substrate and said epitaxial layer to leave a frustum-shaped semiconductor component.
14. A process according to claim 13, in which the thickness of the base of each recess is 5 to 30 Mu m.
15. A process according to claim 13, in which the crosswise dimension of each recess is 300 to 800 Mu m.
16. A process according to claim 13, in which the thickness of the epitaxial layer is approximately 2 Mu m.
17. A process according to claim 13, in which the thickness of the semiconductor slab before the epitaxial layer is applied is 100 to 400 Mu m.
18. A process according to claim 13, in which the thickness of the first electrode is 2 to 20 Mu m.
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