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Digital phase-locked loop

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专利汇可以提供Digital phase-locked loop专利检索,专利查询,专利分析的服务。并且An all digital phase-locked loop derives a loop output signal from an accumulator output terminal. A phase detecting exclusive OR gate is fed by the loop digital input and output signals. The output of the phase detector is a bi-level digital signal having a duty cycle indicative of the relative phase of the input and output signals. The accumulator is incremented at a first rate in response to a first output level of the phase detector and at a second rate in response to a second output level of the phase detector.,下面是Digital phase-locked loop专利的具体信息内容。

1. A phase-locking apparatus for producing a system output signal having a phase which is responsive to the phase of an input signal comprising: phase detector means responsive to the input and system output signals for deriving a two state output signal from the phase detector means having a variable duty cycle indicative of the relative phase of the input and system output signals; an accumulator having an output terminal on which is derived said system output signal; and incrementing means including means for adding a signal reprEsenting a first constant to the accumulator at a fixed rate in response to the first output state of the phase detector and means for adding to the accumulator a signal representing a second constant at the fixed rate in response to the second output state of the phase detector.
2. The apparatus of claim 1 in combination with means for adding a signal representing a variable number to the accumulator at the fixed rate, where said variable number is dependent upon the integral of the output of the phase detector.
3. The apparatus of claim 2 wherein said varying number adding means includes an up/down counter having a counting direction controlled by the phase detector output state.
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