Frequency control circuit
专利汇可以提供Frequency control circuit专利检索，专利查询，专利分析的服务。并且PURPOSE: To prevent a counter output signal from applying to a VCO at head changeover and to avoid abnormal control by providing an edge detection circuit and resetting an oscillated output signal counter in response to an edge pulse.
CONSTITUTION: When a horizontal synchronizing signal is fed from a terminal 8 to a control circuit 7, a switch is closed by a signal S
1 and a counter 2 counts a VCO signal for 4H period and pauses for 1H period. A window comparator 4 takes a pause of 1H period, the counter 2 is reset for 1H period and restores to the initial state, and this processing is repeated. When an RF switch pulse is fed from a terminal 10 via an edge detection circuit 9 to the control circuit 7, the control circuit 7 is reset and a signal S
3 is generated for an edge detection output period only to control the counter 2. The pulse is counted for H after the reset. Even when the horizontal synchronizing signal is fluctuated by 1H based on the change in the RF switch pulse, since the pulse is not counted for the fluctuation period, the pulse is counted based on the succeeding correct horizontal synchronizing signal to prevent the error control of the VCO.
COPYRIGHT: (C)1990,JPO&Japio，下面是Frequency control circuit专利的具体信息内容。
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