| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 81 | 저미어진 삽입선이 첨가되어 있는 액자 용 그림 | KR1020070127441 | 2007-12-10 | KR1020090060570A | 2009-06-15 | 심상근 |
| A drawing for the picture frame is provided, which makes the display of man become a part of the picture frame drawing. A drawing for the picture frame comprises: a drawing(2) which can be inserted into one picture frame; and a slit insert-line(7) which is inserted into the drawing. The upper part of the picture is placed on the top of frame photograph. The desired photograph can be seen as a part of the picture frame drawing. The durability of the adhesive part is improved by attaching the tape with durability to the lower part of the slit insert-line in the back of the drawing. | ||||||
| 82 | 선단부 양생후 케이싱 인발식 현장타설 말뚝공법 | KR1020040053097 | 2004-07-08 | KR1020040073415A | 2004-08-19 | 한동덕 |
| PURPOSE: A casing drawing-type cast-in place pile method after concrete curing of a front end is provided to secure safety of the pile foundation and the whole structure by precisely constructing a cast-in place pile regardless of conditions of the ground. CONSTITUTION: A casing drawing-type cast-in place pile method after concrete curing of a front end comprises steps for forming an excavating hole in a sediment layer(11) by intruding a casing(30) and excavating the sediment contained in the casing with a sediment excavator(S10); pulling out the sediment excavator with leaving the casing to keep a borehole after completing the excavation to a planned penetration(S20); forming the front end of the pile by pouring concrete(33) into the casing and drawing the casing at the predetermined distance to closely contact the lower end of the casing and the surface of the concrete(S41); preventing the settlement of the casing by mounting a casing support(50) on the casing exposed to the ground, putting a stiffener(31) in the casing after mounting a stiffener support(40) to the upper end of the casing, and fixing the upper end of the stiffener to the upper end of the casing through the stiffener support(S42); curing the front end of the pile with fixing the casing and the stiffener by the casing and stiffener supports(S43); and dismantling the stiffener and casing supports after completing the curing of the front end and forming a pile body by pulling out the casing, injecting a filler(34) in the casing, and filling the excavating hole(S51). | ||||||
| 83 | Method for a Block diagram simulator | EP88305664.0 | 1988-06-20 | EP0296812B1 | 1997-12-03 | Newman, William Curtis; Titchener, Paul Frederick; Powell, Douglas Baldwin |
| 84 | 임의 작성된 기능 블록도의 실행 순서 결정방법 | KR1019970061538 | 1997-11-20 | KR1019990041013A | 1999-06-15 | 유호선 |
| 본 발명은 제어 로직의 작성을 위한 국제 표준 언어인 기능 블록도 기법으로 만들어진 각 기능 블록들의 실행 순서를 그들의 그래픽 화면 상에서의 위치 및 크기와 관계 없이 정확하게 결정할 수 있도록 함으로써 작성자의 편의를 증진시킬 수 있도록 한 임의 작성된 기능 블록도의 실행 순서 결정 방법에 관한 것이다. 본 발명의 일 특징에 따른 임의 작성된 기능 블록도의 실행 순서 결정 방법은 (a) 임의의 기능 블록도가 작성된 그래픽 화면을 파싱하여 각 기능 블록의 입출력 연결 관계를 확인하는 단계; (b) 상기 단계 (a)에서 확인된 연결 관계에 의거하여 전체 기능 블록을 즉시 실행이 가능한 무제약 기능 블록군과 다른 기능 블록을 우선적으로 실행해야 비로소 실행이 가능한 제약 기능 블록군으로 구분하는 단계; (c) 상기 무제약 기능 블록군에 속하는 기능 블록의 실행 순서를 미리 주어진 규정에 따라 결정하여 저장하는 단계; (d) 모든 기능 블록의 실행 순서가 결정될 때까지 상기 무제약 기능 블록의 실행을 전제로 하여 상기 제약 기능 블록군에 속하는 기능 블록을 대상으로 상기 단계 (b) 이하를 반복하는 단계를 포함하여 이루어진다. | ||||||
| 85 | 기능 블럭도를 이용한 연속 공정 제어 알고리즘 생성 방법 및 장치 | KR1019940020650 | 1994-08-22 | KR100127211B1 | 1997-10-20 | 김광배; 오상록; 조영조; 박정민 |
| 86 | 圖框圖素資料產生 | TW084106157 | 1995-06-16 | TW311317B | 1997-07-21 | 賈羅伯 |
| 本創作係關於一種手工具之卡吊結構，其主要係於設有一可供吊掛之掛板，讓掛板之底緣係設有一定位部，定位部相對於掛板板面之一側，係形成一可供棘輪扳手定位嵌卡之嵌槽，而該嵌槽之底部則延伸出一可嵌卡套筒之嵌端，另外該掛板之底緣則延伸出可自由鬆、緊套筒之束緊結構，以此來輔助使手工具之定位更為牢固者，使本創作在取下棘輪扳手或套筒後，亦可重覆再將棘輪扳手及套筒定位於本創作上。 | ||||||
| 87 | ブロックダイヤグラム管理装置、ブロックダイヤグラム管理方法及びプログラム | JP2015058614 | 2015-03-20 | JP2016177668A | 2016-10-06 | 渡辺 政彦; 上原 健一; 柳澤 伸紘; 佐藤 美裕; 大野 徹; 藤井 博基; 渡辺 哲也 |
| 【課題】変更前ブロックダイヤグラムとその変更後ブロックダイヤグラムとの差分を容易に確認することのできるブロックダイヤグラム管理装置を提供することである。 【解決手段】取得された記第1モデル情報と第2モデル情報との差分を表す差分情報を取得する差分情報取得手段(S11〜S15)と、前記差分情報取得手段により得られた前記差分情報と、前記第1モデル情報及び前記第2モデル情報のいずれか一方とに基づいて、前記第1ブロックダイヤグラムと前記第2ブロックダイヤグラムとの双方に共通的に含まれる共通ブロック及びまたは共通線と、前記差分情報にて表される差分ブロック及びまたは差分線とを含む合成ブロックダイヤグラムを、前記共通ブロック及びまたは前記共通線と、前記差分ブロック及びまたは差分線との表示態様を異ならせて表示部に表示させる合成表示制御手段(S16)とを有する構成となる。 【選択図】図4 |
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| 88 | Block diagram display device, block diagram display method, and program | JP2012059050 | 2012-03-15 | JP2013196016A | 2013-09-30 | ITO SHINGO |
| PROBLEM TO BE SOLVED: To enable visual recognition of a transmission path of a signal on a block diagram.SOLUTION: A display unit 34 displays a block diagram. A determination unit 35 determines whether or not a transmission element of the block diagram that the display unit 34 displays indicates a switching circuit. When the determination unit 35 determines that the transmission element indicates the switching circuit, an arithmetic logical unit 36 instructs the display unit 34 to emphatically display an element connected to an input end selected by the transmission element among input ends of the transmission element. | ||||||
| 89 | Block diagram preparing device | JP5695294 | 1994-03-28 | JPH07271840A | 1995-10-20 | MIYOKAWA TADAHIRO |
| PURPOSE: To automatically write connection information at the time of switching the hierarchy of a block diagram. CONSTITUTION: An I/O control part 240 sends an instruction in accordance with an input signal from a mouse 233 e.g. and a command processing part 260 prepares a block diagram from an upper hierarchy up to a lower hierarchy and switches an editing drawing frame. At the time, the connection information of a block symbol in the upper hierarchy is stored in an inter-hierarchy connection information storing means 252. In the case of preparing the lower hierarchy on a new drawing, I/O pins are automatically laid out based upon the stored block symbol connecting information and the line names of respective pins are written. In the case of editing the already prepared block diagram for the lower hierarchy, a difference between the connection information of the lower hierarchy block diagram which is stored in an one-hierarchy block data storing part 251b and the block symbol connecting information stored in the means 252 is detected and the detected result is displayed as a message. COPYRIGHT: (C)1995,JPO | ||||||
| 90 | Block diagram editing system | JP19071690 | 1990-07-20 | JPH0477969A | 1992-03-12 | NAKAMURA TAKEO |
| PURPOSE: To efficiently execute top/down editing even if an undefined hierarchy symbol exists by providing a hierarchy symbol shape generation part generating the shape of the hierarchy symbol, a pin definition part defining the pin of the hierarchy symbol and a shape alteration part connecting a line following a pin definition. CONSTITUTION: The hierarhcy symbol shape generation part 1, the pin definition part 2 and the shape alteration part 3 are provided. When there is no hierarchy symbol registered in an editing process, the hierarchy symbol shape generation part 1 generated the desired hierarchy symbol, displays it in a display device 4 and stores it in a library 6. Consequently, an editing processing can be executed without interrupting the thinking process of editing. The shape alteration part 3 can arbitrarily alter the shape of the hierarchy symbol and the previously generated pin and the line automatically be reproduced after the shape is altered. Thus, the hierarchy symbol of the desired shape can be easily obtained. COPYRIGHT: (C)1992,JPO&Japio | ||||||
| 91 | Block diagram generating method | JP13898990 | 1990-05-28 | JPH0431969A | 1992-02-04 | OKAZAKI HARUMI |
| PURPOSE: To easily generated and change a block diagram by generating the block diagram by moving and copying a block from the master of a program instruction block already registered on a screen. CONSTITUTION: A diagram frame (1-20) for block diagram generation and the summary list (master) of the program instruction block are displayed on a work station screen in multiwindow. For example, when the plotting of a program instruction (1-1) in the diagram frame (1-20) for block diagram generation is performed, the analog input block (2-11) of the master is selected with a mouse, etc., and it is copied on a desired part in the diagram frame (1-20) for block diagram generation. A program instruction (1-6) is also copied on the desired part in the diagram frame (1-20) for block diagram generation from another program instruction (1-2) via a similar operation. COPYRIGHT: (C)1992,JPO&Japio | ||||||
| 92 | Frame picture generating device | JP5671890 | 1990-03-09 | JPH03259686A | 1991-11-19 | EBINE YOSHIAKI |
| PURPOSE: To prevent unnatural picture even when the picture is printed out by a video printer by correcting a waveform of a 1st field video signal with a filter and using the resulting signal as a 2nd field video signal. CONSTITUTION: A video signal of a 1st field, that is, an analog video signal of scanning lines A1, A2, A3... or the like shown in figure A is inputted to an A/D converter section 1, in which the signal is converted into a digital data and the data is stored in a memory section 2. Then a picture data stored in the memory section 2 is read one by one scanning line via a control section 7, inputted to a D/A converter section 3, where the signal is converted into an analog video signal. Moreover, a required high frequency component is eliminated from the analog video signal by an LPF of a filter section 4, a required low frequency component is eliminated by an HPF to apply waveform correction of the picture on scanning lines B1', B2', B3'... or the like shown in figure B, for example, and the result is fed to a delay section 5. The delay section 5 sets a delay time including a delayed time or the like by the signal processing or the like in the filter section 4 to delay the video signal. COPYRIGHT: (C)1991,JPO&Japio | ||||||
| 93 | HIERARCHICAL BLOCK DIAGRAM EDITOR METHOD | PCT/FR2000/000564 | 2000-03-07 | WO00054189A1 | 2000-09-14 | |
| The invention concerns a signal processing application graphical entry in hierarchic form. Said method called Hierarchical ARRAY-OL consists in inputting the description of the execution of an application on a machine in hierarchical form enabling, on the basis of conventions for the compiler producing the execution code, to simply give instructions for placement, that is how to clip the application. Thus, the arrays actually processed during execution are compatible in size with the central data-storage capacity (or even of the cache memory) of the machine used; moreover in the case of a parallel machine, all the processors are occupied. | ||||||
| 94 | Management of functions for block diagrams | US10418002 | 2003-04-16 | US07178112B1 | 2007-02-13 | John Edward Ciolfi; Michael David Tocci; Mojdeh Shakeri; Murali Yeddanapudi; Kai Tuschner; Ramamurthy Mani |
| A method is provided that includes pattern-matching portions of a block diagram model as being equivalent, and creation of a common set of instructions in place of the occurrences of the pattern-matched portions to enhance the efficiency of simulation or generated code for the block diagram model, such as by a reduced image size. Diagnostics are also available to provide information on the execution structure of the block diagram and guidance on how to modify block of the block diagram to obtain reduced image size by increasing the amount of matching patterns. Also, automatically generated hierarchical structures, a tool to control the function signature and the ability for a user to control file packaging which all provide flexible control over the generated code for block diagrams, are provided. | ||||||
| 95 | Block diagram processor and method for processing block diagram | JP2011229113 | 2011-10-18 | JP2013089044A | 2013-05-13 | YAMAGUCHI AKIRA |
| PROBLEM TO BE SOLVED: To solve the problem that an editing function of a conventional block diagram is not sufficient.SOLUTION: A block diagram processor 10 includes: a diagram data holding part 30 which holds a block diagram to be used for design of a control system; a designation acceptance part 40 which accepts designation to blocks of the block diagram to be held by the diagram data holding part 30; and a processing part 50 which changes conversion processing between a source code for a block whose designation is accepted by the designation acceptance part 40 and a block whose designation is not accepted by the designation acceptance part 40 when the block diagram is converted into the source code. | ||||||
| 96 | SWITCHING SCHEME FOR A STEREO ROTATING ANODE TUBE | EP07826844.8 | 2007-10-24 | EP2092804A2 | 2009-08-26 | PIETIG, Rainer; DAVID, Bernd; LEWALTER, Astrid |
| For x-ray tubes the focal spot temperature is a critical factor. According to an exemplary embodiment of the present invention, an examination apparatus is provided which has a synchronisation unit providing an operation mode for a stereo tube leaving two anodes in which the anode rotation frequency is synchronised with the switching frequency between the anodes such that the switching frequency is a half integer multiple of the anode rotation frequency. This may lead to a significant reduction of the focal spot temperature. | ||||||
| 97 | ブロックダイヤグラム管理装置、ブロックダイヤグラム管理方法及びプログラム | JP2015058613 | 2015-03-20 | JP2016177667A | 2016-10-06 | 渡辺 政彦; 上原 健一; 柳澤 伸紘; 佐藤 美裕; 大野 徹; 藤井 博基; 渡辺 哲也 |
| 【課題】信号処理システムのモデルを表すブロックダイヤグラムの変更箇所を確実に確認することのできるブロックダイヤグラム管理装置を提供することである。 【解決手段】変更前のモデルを表した第1ブロックダイヤグラムを表す第1モデル情報と、変更後の前記モデルを表した第2ブロックダイヤグラムを表す第2モデル情報とを取得するモデル情報取得手段(S11)と、前記第1モデル情報と前記第2モデル情報との差分を表す差分情報を取得する差分情報取得手段(S13)と、前記差分情報に基づいて、前記第2ブロックダイヤグラムにおいて前記第1ブロックダイヤグラムから変更されたブロック及びまたは線のリストを表す変更リスト情報を生成する変更リスト情報生成手段(S16)と、前記変更リスト情報に基づいて変更リストを表示部に表示させる変更リスト表示制御手段(S17)とを有する構成となる。 【選択図】図4 |
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| 98 | MESSGERÄT MIT ÜBER EIN BLOCKDIAGRAMM ANSTEUERBAREN FUNKTIONSEINHEITEN | EP02738015.3 | 2002-04-30 | EP1390768B1 | 2010-02-24 | PAULY, Andreas; BRAUNSTORFINGER, Thomas; KERNCHEN, Wolfgang; DESQUIOTZ, René |
| 99 | MESSGERÄT MIT ÜBER EIN BLOCKDIAGRAMM ANSTEUERBAREN FUNKTIONSEINHEITEN | EP02738015.3 | 2002-04-30 | EP1390768A1 | 2004-02-25 | PAULY, Andreas; BRAUNSTORFINGER, Thomas; KERNCHEN, Wolfgang; DESQUIOTZ, René |
| A measuring device, in particular a signal generator (1), comprises several functional units (2a, 2b, 13a, 13b...), which may be connected to each other in various combinations, a control device (28), which determines the connection and functions of the functional units (2a, 2b, 13a, 13b...) and an optical display device (29). The functional units (2a, 2b, 13a, 13b...) are symbolised by function blocks (102, 102b, 113a, 113b,...), which may be represented on the display device (29) and which may be graphically connected by means of connection elements (140-147). The control device (28) controls the display device (29), such that the functional blocks (102, 102b, 113a, 113b,...)are graphically connected to each other in a manner corresponding to the actual connection of the functional units (2a, 2b, 13a, 13b...), by means of the connection elements (140-147). | ||||||
| 100 | Block diagram editor system and method | EP88300636.3 | 1988-01-26 | EP0295760A3 | 1990-12-19 | Jordan, Dale A.; Fitzsimmons, Lynne A.; Greenseth, William A.; Hoffman, Gregory L.; Stubbs, David D. |
A block diagram editor system and method is implemented in a computer workstation that includes a CRT and a mouse, graphics and windowing software, and an external communications interface for test instruments. The computer is programmed for constructing, interconnecting and displaying block diagrams of functional elements on the CRT. From prestored routines for each functional element, the softwave assembles and executes a program that emulates the functional operations of each element and transfers data from output from each element in turn to an input of a succeeding block, as determined by the block diagram configuration. The block functions include signal generating and analysis functions, and functions for control of various types of test instruments, which can be interactively controlled through the CRT and mouse. The computer converts desired outputs of the instruments into control settings and receives, analyzes and displays data from the instruments. Blocks can also be grouped into macroblocks. |
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