Method of manufacturing circuit board |
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| 申请号 | JP1643681 | 申请日 | 1981-02-06 | 公开(公告)号 | JPS57132909A | 公开(公告)日 | 1982-08-17 |
| 申请人 | Seiko Keiyo Kogyo Kk; | 发明人 | MIURA MAMORU; | ||||
| 摘要 | PURPOSE:To shorten the time of working cycle and lengthen the lifetime of a cutting tool in the manufacturing of a flatly-finished circuit board, by effecting the flat finishing by two stages. CONSTITUTION:When a circuit board is to be flatly finished, the central part of the board is first flatly finished by a cutting tool whose diameter is smaller than the width of the flat finishing. After that, the flat finishing is resumed in accordance with the shape of an integrated circuit base. The flat finishing of the circuit board is thus completed. Since the flatly finished area is divided for the flat finishing, the movement distance of the cutting tool and the time of the working cycle are shortened and the lifetime of the tool is lengthened. | ||||||
| 权利要求 | |||||||
| 说明书全文 | |||||||
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