子分类：
- H03M7/001： .{以所用的元件为特征的}
- H03M7/02： .转换到加权代码或相反转换,即对一数字的加权与该数字在信息组或代码字中的位置有关{(布斯编码器入G06F7/52C2D1,G06F7/52C2D2A)}
- H03M7/14： .转换到非加权代码或相反转换
- H03M7/26： .转换到随机码或相反转换
- H03M7/28： .可编程序结构,即代码转换器所包括的设备其算符是可变的,以调整转换程序
- H03M7/30： .压缩(用于减少冗余的语言分析-合成入G10L19/00;用于图像通信的入H04N);扩展;消除不需要的数据,例如减少冗余{(用于数据获得的入G06F17/40;用于图像数据处理的入 G06T9/00;在数据记录中减少冗余的入G11B20/14;用于传输的入H04B1/66)}
| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 241 | SYSTEM AND METHOD FOR SAMPLING BASED ELIMINATION OF DUPLICATE DATA | US13443650 | 2012-04-10 | US20120197853A1 | 2012-08-02 | Ling Zheng; Roger Stager; Craig Johnston; Don Trimmer; Yuval Frandzel |
| A technique for eliminating duplicate data is provided. Upon receipt of a new data set, one or more anchor points are identified within the data set. A bit-by-bit data comparison is then performed of the region surrounding the anchor point in the received data set with the region surrounding an anchor point stored within a pattern database to identify forward/backward delta values. The duplicate data identified by the anchor point, forward and backward delta values is then replaced in the received data set with a storage indicator. | ||||||
| 242 | System and method for sampling based elimination of duplicate data | US11414600 | 2006-04-28 | US08165221B2 | 2012-04-24 | Ling Zheng; Roger Stager; Craig Johnston; Don Trimmer; Yuval Frandzel |
| A technique for eliminating duplicate data is provided. Upon receipt of a new data set, one or more anchor points are identified within the data set. A bit-by-bit data comparison is then performed of the region surrounding the anchor point in the received data set with the region surrounding an anchor point stored within a pattern database to identify forward/backward delta values. The duplicate data identified by the anchor point, forward and backward delta values is then replaced in the received data set with a storage indicator. | ||||||
| 243 | Encoding/decoding of digital signals, especially in vector quantization with permutation codes | US12366098 | 2009-02-05 | US07973679B2 | 2011-07-05 | Stéphane Ragot; Claude Lamblin |
| The invention relates to the encoding/decoding of digital signals, especially using permutation codes involving a calculation of combinatorial expressions. According to the invention, the combinatorial expressions are represented by prime factor power decompositions, and determined by a preliminary reading of pre-recorded representations of decompositions of selected integers. | ||||||
| 244 | Encoding/Decoding of Digital Signals, Especially in Vector Quantization with Permutation Codes | US12224038 | 2007-02-13 | US20100228551A1 | 2010-09-09 | Stephane Ragot; Claude Lamblin |
| The invention relates to the encoding/decoding of digital signals, especially using transposition codes involving a calculation of combinatorial expressions. According to the invention, the combinatorial expressions are represented by prime factor power decompositions, and determined by a preliminary reading of pre-recorded representations of decompositions of selected whole numbers. | ||||||
| 245 | Semiconductor device with circuitry for efficient information exchange | US10006238 | 2001-12-10 | US07782682B2 | 2010-08-24 | Yasurou Matsuzaki; Masao Taguchi |
| A semiconductor device having a register and an information generation circuit can reduce data to be transferred, and consequently save electric power. The register stores first information. The information generation circuit generates, in response to a signal acquired from the an exterior of the device, second information indicating which bits of the first information is to be inverted. | ||||||
| 246 | Encoding/Decoding of Digital Signals, Especially in Vector Quantization With Permutation Codes | US12366098 | 2009-02-05 | US20090207934A1 | 2009-08-20 | Stephane Ragot; Claude Lamblin |
| The invention relates to the encoding/decoding of digital signals, especially using permutation codes involving a calculation of combinatorial expressions. According to the invention, the combinatorial expressions are represented by prime factor power decompositions, and determined by a preliminary reading of pre-recorded representations of decompositions of selected integers. | ||||||
| 247 | IMPOSING AND RECOVERING CORRELITHM OBJECTS IN CONJUNCTION WITH TABLE LOOKUP | US10803573 | 2004-03-17 | US20060017590A1 | 2006-01-26 | P. Lawrence; Douglas Matzke; Irvin Jackson |
| Encoding bits includes receiving a bit set to encode. An encoding lookup table associates correlithm objects of a space with bit sets. The space refers to an N-dimensional space, a correlithm object refers to a point of the space. The correlithm object corresponding to the received bit set is identified. The received bit set is encoded as the identified correlithm object. The identified correlithm object is imposed to encode the received bit set and subsequently decoded with table lookup using the reverse process. | ||||||
| 248 | Code processing circuit | US10743497 | 2003-12-23 | US20050134487A1 | 2005-06-23 | Shinji Ono |
| A code processing circuit includes a plurality of coders which encode different kinds of data, respectively, a first buffer which stores the codes outputted from the coders provided corresponding to the plurality of coders, a second buffer which stores the lengths of the codes outputted from the coders provided corresponding to the plurality of coders, a first adder which adds the code lengths stored in the second buffer provided corresponding to the plurality of coders, a second adder which adds all the code lengths added in the first adder, and an adjustment unit which adjusts an output code by the unit of 1 bit based on the codes stored in the first buffer, the code lengths stored in the second buffer and the code lengths added in the second adder. | ||||||
| 249 | Unary coding scheme for digital audio signals | US09616691 | 2000-07-14 | US06711546B1 | 2004-03-23 | David R. Thomas |
| A coding scheme for digital audio signals. A method of coding a unary digital audio signal is provided for compressing a set of unary digital audio signal data comprising a succession of absolute amplitude values associated with respective sample periods of the digital audio signal, the absolute amplitude values being integers of positive or zero value, representing the number of speaker elements of a unary digital loudspeaker that are to be active in a sample period. The data is compressed by calculating the numerical difference between adjacent ones of the absolute amplitude values, thereby to convert the succession of absolute amplitude values into a corresponding succession of difference amplitude values. Each difference amplitude values is expressed as a sign bit and a plurality of data bits, representing the change in the number of speaker elements of a unary digital loudspeaker that are to be active in a given sample period relative to the immediately preceding sample period. A corresponding method of decoding the compressed signal is also provided, together with associated encoding and decoding apparatuses. | ||||||
| 250 | Efficient coding of side information in a lossless encoder | US10651859 | 2003-08-29 | US20040039571A1 | 2004-02-26 | Alphons A.M.L. Bruekers; Adriaan J. Rijnberg |
| For nullSuper Audio CDnull (SACD) the DSD signals are losslessly coded, using framing, prediction and entropy coding. Besides the efficiently encoded signals, a large number of parameters, i.e. the side-information, has to be stored on the SACD too. The smaller the storage capacity that is required for the side-information, the better the overall coding gain is. Therefore coding techniques are applied to the side-information too so as to compress the amount of data of the side information. | ||||||
| 251 | Method and device for pulse density modulation | US09961884 | 2001-09-24 | US06563393B2 | 2003-05-13 | Tao Zhang; Hiroshi Katsuragawa; Noriyoshi Ito |
| A pulse density modulator unit transforms an N-bit input signal representing an input value, into an output digital signal having a digital pulse density which is a linear function of the input value. The pulse density modulator unit includes a first pulse density modulator which produces a binary signal representing a multiplication factor as a pulse density. It further includes a combination module which receives the input signal, the binary signal from the first pulse density modulator and an offset control signal. The combination module produces a combined signal which, on average, represents the product of the input signal and the amplification control signal, offset by an amount dependent upon the offset control signal. A second pulse generator uses the combined signal to generate the output digital signal. The combination module may be a selector. | ||||||
| 252 | Method and apparatus for modulating a signal | US09619003 | 2000-07-19 | US06462679B1 | 2002-10-08 | Cap Van Nguyen |
| A modulated signal (10) is sinusoidal wave signal wherein each half wave cycle carries a digital data value associated with an amount of its amplitude. A positive half wave cycle with an amplitude of M encodes a binary level zero digital data value while a positive half wave cycle with an amplitude of M+x encodes a binary level one digital data value. Similarly, a negative half wave cycle with an amplitude of −M encodes a binary level zero digital data value while a negative half wave cycle with an amplitude of −M−x encodes a binary level one digital data value. The positive and negative half wave cycles may transport dual portions of a channel at the same frequency as a modulated signal (20) for either a dual transmission capability or as a full duplex bidirectional transmit/receive channel. Each half wave cycle may also be modulated to carry a plurality of digital data values beyond binary level zero and one through selection of four or more amplitude levels to generate a modulated signal (30). A modulated signal (40) may also provide digital data value representations in each quarter wave of the sinusoidal wave signal to further increase bandwidth capability. | ||||||
| 253 | Generating high weight encoding symbols using a basis | US09691735 | 2000-10-18 | US06411223B1 | 2002-06-25 | Armin Haken; Michael G. Luby; Gavin Horn; Diane Hernek; John Byers; Michael Mitzenmacher |
| Output symbols are generated using input symbols and basis elements. A plurality of basis elements are generated. Each basis element is generated from a predetermined function of associated input symbols associated with the basis element. For each output symbol, a set of associated basis elements associated with the output symbol is determined, and a set of direct associated input symbols directly associated with the output symbol is determined. For each output symbol, the output symbol is generated from a predetermined function of the associated basis elements and the associated input symbols. | ||||||
| 254 | Method and device for pulse density modulation | US09961884 | 2001-09-24 | US20020048318A1 | 2002-04-25 | Tao Zhang; Hiroshi Katsuragawa; Noriyoshi Ito |
| A pulse density modulator unit transforms an N-bit input signal representing an input value, into an output digital signal having a digital pulse density which is a linear function of the input value. The pulse density modulator unit includes a first pulse density modulator which produces a binary signal representing a multiplication factor as a pulse density. It further includes a combination module which receives the input signal, the binary signal from the first pulse density modulator and an offset control signal. The combination module produces a combined signal which, on average, represents the product of the input signal and the amplification control signal, offset by an amount dependent upon the offset control signal. A second pulse generator uses the combined signal to generate the output digital signal. The combination module may be a selector. | ||||||
| 255 | Packet-frame generator for creating an encoded packet frame and method thereof | US09667260 | 2000-09-22 | US06344807B1 | 2002-02-05 | Martin Hassner; Nyles Heise; Walter Hirt |
| A packet-frame generator for creating an encoded packet frame comprising encoded control data and encoded utilizable data. A non-encoded packet frame comprising non-encoded control data and non-encoded utilizable data is providable by an assembling means. The packet-frame generator comprises a modulation encoder for encoding the non-encoded control data by a first modulation code and the non-encoded utilizable data by a second modulation code thereby providing the encoded packet frame. | ||||||
| 256 | Demodulating device, demodulating method and supply medium | US09207827 | 1998-12-09 | US06172622B2 | 2001-01-09 | Toshiyuki Nakagawa; Yoshihide Shimpuku |
| A demodulator refers to an internal conversion table and demodulates data that was input. Said conversion table has elements to restrict the continuation of the minimum run and a non-determined code and also has a conversion rule to take the surplus of the number of “1”s inside the elements of the data string and the number of “1”s inside the elements of the converted code word string when divided by two and then match the surplus with either a “0” or a “1”. The demodulated data is input to the DSV eliminator and output by way of the buffer after removal of the DSV bit and thus a codedword string on which DVS control was performed can be efficiently and reliably decoded. | ||||||
| 257 | Variable-length encoding using code swapping | US608432 | 1996-02-28 | US5991451A | 1999-11-23 | Michael Keith; Joseph N. Romriell; Rohit Agarwal; Stuart Golin |
| The efficiency of variable-length (VL) encoding data using a defined VL encoding table is characterized and one or more changes to one or more entries of the defined VL encoding table are determined that increase the efficiency of encoding the data. An updated VL encoding table is generated from the defined VL encoding table based on the changes. VL codes for the data are generated using the updated VL encoding table, and an encoded bitstream is generated from VL codes, wherein the encoded bitstream explicitly identifies the changes. For decoding, the changes are extracted from the encoded bitstream and an updated VL decoding table is generated from a defined VL decoding table corresponding to the defined VL encoding table, based on the changes. The VL codes in the encoded bitstream are decoded using the updated VL decoding table to generate a set of decoded data. | ||||||
| 258 | Method and apparatus for interpolation and noise shaping in a signal converter | US512251 | 1995-08-07 | US5606319A | 1997-02-25 | David Yatim; James W. Girardeau, Jr. |
| A D/A converter (10) converts a digitized analog signal (32) to an analog signal (50). The D/A converter (10) includes first filtering stage (12), second filtering stage (14), and reduced-bit D/A converter (16). The first filtering stage (12) operates at a first sampling rate (25), interpolates the digitized analog signal (32) from an initial sampling rate to a first sampling rate (25), performs an anti-alias filter, and performs a first comb filtering function. The second filtering stage (14) operates at a second sampling rate (46), interpolates the digitized analog signal (32) to the second sampling rate (46), performs a second comb filtering function, and performs a noise shaper filter to produce a reduced-bit second sampling rate signal (48). The reduced-bit D/A converter (16) converts the second sampling rate signal (48) to an analog signal (50). | ||||||
| 259 | Character code conversion unit | US298292 | 1994-08-31 | US5479167A | 1995-12-26 | Takashi Murakami |
| A character code conversion unit inputs data to a common file that both uses the second code and also is utilized by a plurality of systems, the character code conversion unit being equipped with a code converter and a unit for determining the conversion into another code system. The code converter converts the character data expressed by a first code system into character data expressed by a second code system, and holds the converted results when they are properly converted. The unit for determining the conversion into another code system inputs the data of the first code system and determines whether the data can be converted into data of a third code system, different from both the first code system and the second code system. When the data are properly converted, the converted results held in the code converter are output. | ||||||
| 260 | Multiple character code set input/output conversion system | US14152 | 1993-02-08 | US5389924A | 1995-02-14 | Yuji Ogawa |
| In a computer system provided with a plurality of computers handling different types of character code sets, a multiple character code set input/output conversion system according to the present invention converts character code strings based on a character code set used in a text file into internal character code strings based on the internal character code set commonly used by the plurality of computers and in turn converts the internal character code strings into character code strings based on a specific character code set. The code conversion means to convert input character code strings to internal character code strings based on the internal character code string and internal character code strings to other character code strings comprises a plurality of code conversion programs which convert character code strings into internal character code strings and internal character code strings to character code strings, a plurality of conversion tables with arrays of addresses for invoking code conversion programs and table registers where pointers to applicable conversion tables are set. | ||||||
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