| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 101 | ADAPATIVE POWER AMPLIFIER | US13828646 | 2013-03-14 | US20140266448A1 | 2014-09-18 | Jeongwon Cha; Chang-Ho Lee; Woonyun Kim; Aristotele Hadjichristos; Yu Zhao |
| Exemplary embodiments are related to an envelope-tracking power amplifier. A device may include a first transistor of a plurality of transistors in a stacked configuration configured to receive a supply voltage varying with an envelope of a radio-frequency (RF) input signal. The device may further include a second transistor of the plurality in the stacked configuration coupled to a reference voltage and configured to receive a dynamic bias voltage varying inversely proportional to the supply voltage. | ||||||
| 102 | Circuit and power amplifier | US13628904 | 2012-09-27 | US08823458B2 | 2014-09-02 | Stephan Leuschner; Jan-Erik Mueller |
| A cascode circuit includes a first transistor and a second transistor. The first transistor and the second transistor are connected to make a cascode. In addition, the circuit has a block capacitance which is connected between a control terminal of the second transistor and a source terminal of the first transistor. In addition, the circuit has a feedback element which is connected between a drain terminal of the second transistor and a control terminal of the first transistor. | ||||||
| 103 | Distributed amplifier with improved stabilization | US13385772 | 2012-03-06 | US08786368B2 | 2014-07-22 | Keith Benson |
| A distributed amplifier with improved stabilization includes an input transmission circuit, an output transmission circuit, at least one cascode amplifier coupled between said input and output transmission circuits. Each cascode amplifier includes a common-gate configured transistor coupled to the output transmission circuit, and a common-source configured transistor coupled between the input transmission circuit and the common-gate configured transistor. The distributed amplifier also includes a non-parasitic resistance and capacitance coupled in series between a drain and a gate of at least one of the common-gate configured transistors for increasing the amplifier stability. | ||||||
| 104 | Power amplifier including variable capacitor circuit | US13433957 | 2012-03-29 | US08680928B2 | 2014-03-25 | Moon Suk Jeon; Jung-Rin Woo; Sang Hwa Jung; Young Kwon |
| A power amplifier includes first and second amplification stages. The first amplification stage is configured to amplify a radio frequency (RF) input signal. The second amplification stage includes at least one transistor configured to amplify an output of the first amplification stage, the second amplification stage being configured to have a capacitance between a gate of the at least one transistor and a first power supply voltage. The capacitance automatically varies with amplitude of the output of the first amplification stage. | ||||||
| 105 | LOW VOLTAGE MULTI-STAGE AMPLIFIER | US13793933 | 2013-03-11 | US20140028397A1 | 2014-01-30 | Vijayakumar Dhanasekaran |
| A low voltage multi-stage amplifier is described. The low voltage multi-stage amplifier includes one or more prior stages. The low voltage multi-stage amplifier also includes a supply stage. The low voltage multi-stage amplifier further includes an output stage that operates with a supply voltage as low as a sum of a threshold voltage of a first transistor in the output stage and a saturation voltage of a second transistor of the supply stage. The supply stage supplies the output stage. | ||||||
| 106 | Cascode CMOS RF power amplifier with programmable feedback cascode bias under multiple supply voltages | US12860905 | 2010-08-22 | US08063706B2 | 2011-11-22 | Mingyuan Li; Ali Afsahi; Arya Reza Behzad |
| A Radio Frequency (RF) cascode power amplifier operates with differing battery supply voltages. A transconductance stage has a transistor with an RF signal input at its gate. A cascode stage has at least one cascode transistor, the cascode stage coupled in series with the transconductance stage between a battery voltage node and ground, the cascode stage having an RF signal output at the battery voltage node and at least one bias input to the at least one cascode transistor. Cascode bias feedback circuitry applies fixed bias voltage(s) to the at least one two bias inputs for a low battery voltage and applies feedback bias voltage(s) to the at least two bias inputs for a high battery voltage, the feedback bias voltage(s) based upon a voltage of the battery voltage node. More than two differing battery supply voltages are supported. | ||||||
| 107 | Origami cascaded topology for analog and mixed-signal applications | US11997354 | 2006-08-02 | US08022776B2 | 2011-09-20 | Mau-Chung Frank Chang; Daquan Huang; Tim Richard LaRocca |
| The present disclosure relates to coupled circuits and methods of coupling circuits having a power supply wherein a plurality of transistors are inductively coupled directly to the power supply for providing a single DC supply voltage directly to each of the plurality of transistors, and wherein a plurality of transformers have primary and secondary windings, the primary and secondary windings providing, at least in part, inductive loads for inductively coupling the plurality of transistors to the power supply, the plurality of transformers also providing an AC signal path for coupling neighboring ones of the plurality of transistors together. | ||||||
| 108 | Field-plated transistor including feedback resistor | US12423772 | 2009-04-14 | US08008977B2 | 2011-08-30 | Hua-Quen Tserng; David Michael Fanning |
| Embodiments include but are not limited to apparatuses and systems including a unit cell having a source electrode, a gate electrode to receive an input radio frequency (RF) signal, and a drain electrode to output an amplified RF signal. A field plate may be coupled with the source electrode, and a feedback resistor may be coupled between the field plate and the source electrode. | ||||||
| 109 | ELECTRONIC CIRCUIT AND ELECTRONIC CIRCUIT ARRANGEMENT | US12690009 | 2010-01-19 | US20110018625A1 | 2011-01-27 | Uwe HODEL; Stephan Leuschner; Jan-Erik Mueller |
| In accordance with one exemplary embodiment, an electronic circuit is provided, wherein the electronic circuit comprises a first transistor and also a second transistor coupled in series with the first transistor. Furthermore, the electronic circuit comprises a capacitor, wherein a first terminal of the capacitor is coupled to a control terminal of the second transistor, and wherein a second terminal of the capacitor is coupled to an electrical potential which is dependent on a radio-frequency input signal of the electronic circuit. | ||||||
| 110 | FIELD-PLATED TRANSISTOR INCLUDING FEEDBACK RESISTOR | US12423772 | 2009-04-14 | US20100259329A1 | 2010-10-14 | Hua-Quen Tserng; David Michael Fanning |
| Embodiments include but are not limited to apparatuses and systems including a unit cell having a source electrode, a gate electrode to receive an input radio frequency (RF) signal, and a drain electrode to output an amplified RF signal. A field plate may be coupled with the source electrode, and a feedback resistor may be coupled between the field plate and the source electrode. | ||||||
| 111 | Origami Cascaded Topology For Analog and Mixed-Signal Applications | US11997354 | 2006-08-02 | US20080231383A1 | 2008-09-25 | Mau-Chung Frank Chang; Daquan Huang; Tim Richard LaRocca |
| The present disclosure relates to coupled circuits and methods of coupling circuits having a power supply wherein a plurality of transistors are inductively coupled directly to the power supply for providing a single DC supply voltage directly to each of the plurality of transistors, and wherein a plurality of transformers have primary and secondary windings, the primary and secondary windings providing, at least in part, inductive loads for inductively coupling the plurality of transistors to the power supply, the plurality of transformers also providing an AC signal path for coupling neighboring ones of the plurality of transistors together. | ||||||
| 112 | Accurate cascode bias networks | US11098904 | 2005-04-04 | US07253678B2 | 2007-08-07 | Arthur Joseph Kalb |
| Bias networks are provided for accurate generation of biases of cascode transistor arrangements. Network embodiments generate a voltage that accurately biases the transistor of a cascode arrangement at a selected point in its saturation region and this voltage is accurately transferred to the drain of a transistor via the gate-to-source voltage drops of a pair of gate-coupled transistors. | ||||||
| 113 | 멀티-스택형 증폭기들을 위한 조정가능한 이득 | KR1020157015616 | 2013-11-15 | KR101586226B1 | 2016-01-19 | 차,정원; 이,창호; 하드지크리스토스,아리스토텔레 |
| 증폭기에서조정가능한이득을제공하기위한기술들이기재된다. 일양상에서, 조정가능한이득을갖는복합증폭기는병렬로커플링되는복수의증폭기들을포함하며, 여기서, 증폭기들각각이턴 온또는턴 오프되어복합증폭기의전체이득을조정할수도있다. 각각의증폭기는입력트랜지스터및 적어도 2개의캐스코드트랜지스터들을포함할수도있다. 각각의증폭기를턴 오프시키기위해, 입력트랜지스터에커플링되는제 2 또는최하부캐스코드트랜지스터의게이트전압은접지될수도있고, 출력전압에커플링되는제 1 캐스코드트랜지스터의게이트전압은, 제 1 턴-오프전압에커플링되어제 1 캐스코드트랜지스터에걸치드레인-투-게이트전압강하를감소시킬수도있다. 추가적인양상들은, 증폭기가턴 오프되는경우, 캐스코드트랜지스터들의게이트들에커플링된커패시터를 AC 접지로부터디커플링시키는것을제공한다. | ||||||
| 114 | 멀티-스택형 증폭기들을 위한 조정가능한 이득 | KR1020157015616 | 2013-11-15 | KR1020150079987A | 2015-07-08 | 차,정원; 이,창호; 하드지크리스토스,아리스토텔레 |
| 증폭기에서조정가능한이득을제공하기위한기술들이기재된다. 일양상에서, 조정가능한이득을갖는복합증폭기는병렬로커플링되는복수의증폭기들을포함하며, 여기서, 증폭기들각각이턴 온또는턴 오프되어복합증폭기의전체이득을조정할수도있다. 각각의증폭기는입력트랜지스터및 적어도 2개의캐스코드트랜지스터들을포함할수도있다. 각각의증폭기를턴 오프시키기위해, 입력트랜지스터에커플링되는제 2 또는최하부캐스코드트랜지스터의게이트전압은접지될수도있고, 출력전압에커플링되는제 1 캐스코드트랜지스터의게이트전압은, 제 1 턴-오프전압에커플링되어제 1 캐스코드트랜지스터에걸치드레인-투-게이트전압강하를감소시킬수도있다. 추가적인양상들은, 증폭기가턴 오프되는경우, 캐스코드트랜지스터들의게이트들에커플링된커패시터를 AC 접지로부터디커플링시키는것을제공한다. | ||||||
| 115 | 가변적인 커패시터 회로를 포함하는 전력 증폭기 | KR1020130032464 | 2013-03-27 | KR1020130111368A | 2013-10-10 | 전문석; 우중린; 정상화 |
| PURPOSE: A power amplifier including a variable capacitor circuit is provided to effectively solve amplitude modulation (AM)-power modulation (PM) distortion and AM-AM distortion. CONSTITUTION: A power amplifier (10) comprises a first amplification stage (100) and a second amplification stage (400) connected to a cascode. The first amplification stage amplifies a radio frequency (RF) input signal. A transistor amplifies the output of the first amplification stage. The second amplification stage includes capacitance which is automatically changed based on the size of the first amplification stage output between the gate of one or more transistors and first power voltage. The second amplification stage includes one or more variable capacitor circuits between the first power voltage and the gate of the transistors. One or more variable capacitor circuits includes the capacitance which is changed based on the voltage swing of the gate corresponding to the one or more transistors. [Reference numerals] (200) Variable capacitor circuit (VCC) | ||||||
| 116 | 가변 이득 증폭기 | KR1020057004346 | 2003-09-10 | KR1020050057321A | 2005-06-16 | 오오야코이치; 사쿠마츠요시 |
| A variable gain amplifier can improve distortion characteristic (IIP3) in the gain attenuation without deteriorating the characteristic concerning the gain PG and the noise factor NF at the maximum gain. In the variable gain amplifier, a plurality of dual gate type FET are connected in parallel. Each of the dual gate type FET consists of first FET (6, 8) having a gate to which an input signal is applied and second FET (7, 9) cascade-connected to the first FET (6, 8). The amplifier is configured in such a manner that gate control voltage (Vcon1, Vcon2) can be applied from voltage control means to the second FET (7, 9) of each of the dual gate type FET. | ||||||
| 117 | ADJUSTABLE GAIN FOR MULTI-STACKED AMPLIFIERS | PCT/US2013070434 | 2013-11-15 | WO2014078742A3 | 2014-07-03 | CHA JEONGWON; LEE CHANG-HO; HADJICHRISTOS ARISTOTELE |
| Techniques for providing adjustable gain in an amplifier. In an aspect, a composite amplifier having adjustable gain includes a plurality of amplifiers coupled in parallel, wherein each of the amplifiers may be turned on or off to adjust the overall gain of the composite amplifier. Each amplifier may include an input transistor and at least two cascode transistors. To turn each amplifier off, the gate voltage of a second or lowermost cascode transistor coupled to the input transistor may be grounded, and the gate voltage of a first cascode transistor coupled to the output voltage may be coupled to a first turn-off voltage to reduce the drain-to-gate voltage drop across the first cascode transistor. Further aspects provide for decoupling a capacitor coupled to the gates of the cascode transistors from AC ground when the amplifier is turned off. | ||||||
| 118 | ORIGAMI CASCADED TOPOLOGY FOR ANALOG AND MIXED-SIGNAL APPLICATIONS | PCT/US2006030383 | 2006-08-02 | WO2007019281A9 | 2008-05-22 | CHANG MAU-CHUNG FRANK; HUANG DAQUAN; LAROCCA TIM RICHARD |
| The present disclosure relates to coupled circuits and methods of coupling circuits having a power supply wherein a plurality of transistors are inductively coupled directly to the power supply for providing a single DC supply voltage directly to each of the plurality of transistors, and wherein a plurality of transformers have primary and secondary windings, the primary and secondary windings providing, at least in part, inductive loads for inductively coupling the plurality of transistors to the power supply, the plurality of transformers also providing an AC signal path for coupling neighboring ones of the plurality of transistors together. | ||||||
| 119 | FIELD-PLATED TRANSISTOR INCLUDING FEEDBACK RESISTOR | PCT/US2010030946 | 2010-04-13 | WO2010120825A3 | 2011-01-20 | TSERNG HUA-QUEN; FANNING DAVID MICHAEL |
| Embodiments include but are not limited to apparatuses and systems including a unit cell having a source electrode, a gate electrode to receive an input radio frequency (RF) signal, and a drain electrode to output an amplified RF signal. A field plate may be coupled with the source electrode, and a feedback resistor may be coupled between the field plate and the source electrode. | ||||||
| 120 | HIGH-LINEARITY LOW NOISE AMPLIFIER | PCT/US2010030027 | 2010-04-06 | WO2010120594A2 | 2010-10-21 | DUSTER JON S; TAYLOR STEWART S |
| Embodiments of a high-linearity low-noise amplifier (LNA) are generally described herein. Other embodiments may be described and claimed. In some embodiments, an RF input signal may be amplified with a cascode amplifier. The cascode amplifier may include integrated notch filters to attenuate undesired signals. The cascode amplifier may operate from a large power supply when blockers are present to avoid voltage swing compression at its output. The cascode amplifier may be biased and designed to operate in a class AB mode to produce linear output current to avoid current compression or excessive current expansion. | ||||||
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