| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 1 | 放大器、放大方法以及滤波器 | CN200780001329.8 | 2007-09-04 | CN101356725B | 2011-11-09 | 饭田幸生; 吉泽淳 |
| 本发明提供一种放大器，该放大器具备：第1可变静电电容元件，其静电电容可变；第2可变静电电容元件，其静电电容可变，与第1可变静电电容元件电气连接，相对于第1可变静电电容元件为逆导电型；以及第1输入部，其对第1可变静电电容元件和第2可变静电电容元件选择性地输入偏置电压和电压信号，在对第1可变静电电容元件和第2可变静电电容元件输入偏置电压和电压信号的情况下，将第1可变静电电容元件和第2可变静电电容元件的静电电容设为第1值，将第1可变静电电容元件和第2可变静电电容元件的静电电容设为小于第1值的第2值，从而对电压信号进行放大。 | ||||||
| 2 | 放大器、放大方法以及滤波器 | CN200780001329.8 | 2007-09-04 | CN101356725A | 2009-01-28 | 饭田幸生; 吉泽淳 |
| 本发明提供一种放大器，该放大器具备：第1可变静电电容元件，其静电电容可变；第2可变静电电容元件，其静电电容可变，与第1可变静电电容元件电气连接，相对于第1可变静电电容元件为逆导电型；以及第1输入部，其对第1可变静电电容元件和第2可变静电电容元件选择性地输入偏置电压和电压信号，在对第1可变静电电容元件和第2可变静电电容元件输入偏置电压和电压信号的情况下，将第1可变静电电容元件和第2可变静电电容元件的静电电容设为第1值，将第1可变静电电容元件和第2可变静电电容元件的静电电容设为小于第1值的第2值，从而对电压信号进行放大。 | ||||||
| 3 | Integrated Circuit Arrangement for a Microphone, Microphone System and Method for Adjusting One or More Circuit Parameters of the Microphone System | US15548371 | 2015-02-27 | US20180034431A1 | 2018-02-01 | Gino Rocca; Tomasz Hanzlik |
| An integrated circuit arrangement for a microphone, a microphone system and a method for adjusting circuit parameters of the microphone are disclosed. In an embodiment an integrated circuit includes an amplifier circuit with a first switchable network circuit for adjusting an amplifier current of the amplifier circuit, the first switchable network circuit comprising a plurality of switches (SW1, . . . ,SWx) each coupled with a first control port of the first switchable network circuit and a control unit coupled with the first control port of the first switchable network circuit and configured to control a setting of the respective switches (SW1, . . . ,SWx) of the first switchable network circuit. | ||||||
| 4 | Rf power amplifier | JP11658292 | 1992-05-11 | JPH05299944A | 1993-11-12 | FUJITA NOBUYUKI |
| PURPOSE: To amplify an on/off RF signal such as a TDMA signal at a high power efficiency with less signal distortion by using a GaAs field effect transistor(FET). CONSTITUTION: An idling current for class A amplification is set not only to a pre-stage FET1 but also to a post-stage FET2 in the RF amplifier. In the high RF signal operation, an impedance of an output LPF 5 connecting to a drain of the FET 2 is set higher than the impedance at a high gain operation so that the FET2 and the load are in power matching in the high RF signal operation, that is, the dynamic impedance of the FET 2 in the high RF signal operation and the load impedance are matched. Furthermore, a drain bias VD of the FETs 1, 2 is turned on/off by a control circuit 1 synchronously with the on/off of the RF signal input. COPYRIGHT: (C)1993,JPO&Japio | ||||||
| 5 | SELF-BIASING AND SELF-SEQUENCING OF DEPLETION-MODE TRANSISTORS | US15250220 | 2016-08-29 | US20180061984A1 | 2018-03-01 | Benone Achiriloaie; Eric Hokenson |
| A transistor circuit includes a transistor having a gate terminal and first and second conduction terminals, a first circuit configured to convert an AC input signal of the transistor circuit to a gate bias voltage and to apply the gate bias voltage to the gate terminal of the transistor, a second circuit configured to convert the AC input signal of the transistor circuit to a control voltage, and a switching circuit configured to apply a first voltage to the first conduction terminal of the transistor in response to the control voltage. | ||||||
| 6 | Distributed amplifier | US15045860 | 2016-02-17 | US09722541B2 | 2017-08-01 | Masaru Sato; Naoko Kurahashi |
| A distributed amplifier includes: an input-side transmission line; M amplification circuits; M output-side transmission lines; and a combination circuit configured to combine outputs of the M output-side transmission lines; wherein the input-side transmission line has an input-side serial line formed by connecting in series M×N unit transmission lines each including the same line length, and an input-side terminating resistor, the M amplification circuits each includes N amplifiers and the N amplifiers of the i-th amplification circuit take the input node of the ((k−1) M+i)-th input-side transmission line to be the input, and the output-side transmission line includes an output-side serial line including N transmission lines each being connected in series between the neighboring outputs of the N amplifiers and each having a line width in which the phase of the output of the amplifier in each stage agrees with one another. | ||||||
| 7 | AMPLIFIER, AMPLIFYING METHOD, AND FILTER | US12093207 | 2007-09-04 | US20090219086A1 | 2009-09-03 | Sachio Iida; Atsushi Yoshizawa |
| An amplifier is provided which includes: a first variable capacitance device of which capacitance is variable, a second variable capacitance device of which capacitance is variable, electrically connected to the first variable capacitance device, and of an inverse conductivity type from the first variable capacitance device, and a first input unit for selectively inputting a bias voltage and a voltage signal to the first variable capacitance device and the second variable capacitance device, wherein, in the event that the bias voltage and the voltage signal are input to the first variable capacitance device and the second variable capacitance device, the capacitance of the first variable capacitance device and the second variable capacitance device is taken as a first value, and wherein the voltage signal is amplified with the capacitance of the first variable capacitance device and the second variable capacitance device as a second value smaller than the first value. | ||||||
| 8 | Multiband Wireless Device and Semiconductor Integrated Circuit | US11769151 | 2007-06-27 | US20080119153A1 | 2008-05-22 | Yoshikazu Sugiyama; Satoshi Adachi; Yusaku Katsube; Masazumi Tone; Taku Takaki |
| When switching over from a portable telephone system of 800 MHz band to a UWB communication system of 9 GHz band, depending upon a signal for changing over a high pass filter and a low pass filter, a reactance element, which is determined to be matching with a load Z of the high pass filter, is connected to an output terminal of a transmitting power amplifier. With this, it is possible to achieve a multi-band or multi-mode wireless receiver of using a frequency band from 800 MHz to 10 GHz, without an enlargement of a circuit scale and an increase of costs. | ||||||
| 9 | RF power amplifier | US891416 | 1992-05-29 | US5250912A | 1993-10-05 | Noriyuki Fujita |
| A radio frequency (RF) amplifier for amplifying an RF signal with a high power efficiency and with a minimum of signal distortions by using a GaAs field effect transistor (FET). An idling current for class "A" amplification is set in the FET. An output low pass filter is connected to the drain of the FET and provided with an impedance higher than a high gain impedance, so that the FET and a load may be matched in power during high RF signal operation, i.e., the dynamic impedance of the FET and the impedance of the load may be matched. A drain bias to the FET is turned on and turned off in synchronism with the ON/OFF of the input RF signal. The amplifier, therefore, not only performs class "A" amplification with a minimum of signal distortions but also further saves power since it is turned off in the absence of a signal, thereby achieving a higher power efficiency. | ||||||
| 10 | 分布型増幅器 | JP2015045237 | 2015-03-06 | JP2016165085A | 2016-09-08 | 佐藤 優; 倉橋 菜緒子 |
| 【課題】出力電力を維持し、少ないサイズ増加で、高遮断周波数の分布型増幅器の実現。 【解決手段】入力側伝送線路と、M(M:2以上の整数)組の増幅回路と、M組の出力側伝送線路と、合成回路と、を有し、入力側伝送線路は、それぞれが同一線路長のM×N(N:2以上の整数)個の単位伝送線路31-1-31-2Nを直列に接続した入力側直列線路と、入力側終端抵抗32と、を有し、M組の増幅回路はそれぞれN個の増幅器33-1A-33-NA,33-1B-33-NBを有し、i(i:1以上、M以下の整数)番目の組のN個の増幅器は、((k−1)M+i)(k:1以上、N以下の整数)番目の入力側直列線路の入力ノードを入力とし、出力側伝送線路は、N個の増幅器の出力間に直列に接続され、各段の増幅器の出力の位相が一致する線路長を有するN個の伝送線路34-1A-34-NA,34-1B-34-NBを含む出力側直列線路を有する分布型増幅器。 【選択図】図5 |
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| 11 | COMMUNICATIONS DEVICE WITH RECEIVER CHAIN OF REDUCED SIZE | US15968927 | 2018-05-02 | US20180323821A1 | 2018-11-08 | Laurent CHABERT; Raphael PAULIN |
| A communications device includes a transmission chain coupled to an antenna a receiver chain coupled to the antenna. The receiver chain includes an amplifier device having an input coupled to the antenna. A controlled switching circuit is included in the amplifier device and is operable to selectively disconnect conduction terminals of an amplifying transistor from power supply terminals when the transmission chain is operating to pass a transmit signal to the antenna. | ||||||
| 12 | Switching circuit | US15195707 | 2016-06-28 | US09748951B2 | 2017-08-29 | Xiaoqiang Zhang; Mark Ingels |
| A conversion circuit is disclosed. In one aspect, the conversion circuit includes a first input terminal for receiving a digital signal. The conversion circuit includes a second input terminal for receiving a bias voltage signal. The conversion circuit includes an output terminal for outputting a current. The conversion circuit includes a first and a second switch transistor connected to the first input terminal for receiving the digital signal. The conversion circuit includes a first and a second current source transistor connected to the second input terminal for receiving the bias voltage signal. The conversion circuit further includes a first branch, wherein the first switch transistor is connected to the output terminal via the first current source transistor. The conversion circuit further includes a second branch, wherein the second current source transistor is connected to the output terminal via the second switch transistor. | ||||||
| 13 | SWITCHING CIRCUIT | US15195707 | 2016-06-28 | US20170005654A1 | 2017-01-05 | Xiaoqiang Zhang; Mark Ingels |
| A conversion circuit is disclosed. In one aspect, the conversion circuit includes a first input terminal for receiving a digital signal. The conversion circuit includes a second input terminal for receiving a bias voltage signal. The conversion circuit includes an output terminal for outputting a current. The conversion circuit includes a first and a second switch transistor connected to the first input terminal for receiving the digital signal. The conversion circuit includes a first and a second current source transistor connected to the second input terminal for receiving the bias voltage signal. The conversion circuit further includes a first branch, wherein the first switch transistor is connected to the output terminal via the first current source transistor. The conversion circuit further includes a second branch, wherein the second current source transistor is connected to the output terminal via the second switch transistor. | ||||||
| 14 | DISTRIBUTED AMPLIFIER | US15045860 | 2016-02-17 | US20160261237A1 | 2016-09-08 | Masaru Sato; Naoko Kurahashi |
| A distributed amplifier includes: an input-side transmission line; M amplification circuits; M output-side transmission lines; and a combination circuit configured to combine outputs of the M output-side transmission lines; wherein the input-side transmission line has an input-side serial line formed by connecting in series MxN unit transmission lines each including the same line length, and an input-side terminating resistor, the M amplification circuits each includes N amplifiers and the N amplifiers of the i-th amplification circuit take the input node of the ((k−1) M+i)-th input-side transmission line to be the input, and the output-side transmission line includes an output-side serial line including N transmission lines each being connected in series between the neighboring outputs of the N amplifiers and each having a line width in which the phase of the output of the amplifier in each stage agrees with one another. | ||||||
| 15 | Amplifier, amplifying method, and filter | US12093207 | 2007-09-04 | US07990210B2 | 2011-08-02 | Sachio Iida; Atsushi Yoshizawa |
| An amplifier is provided which includes: a first variable capacitance device of which capacitance is variable, a second variable capacitance device of which capacitance is variable, electrically connected to the first variable capacitance device, and of an inverse conductivity type from the first variable capacitance device, and a first input unit for selectively inputting a bias voltage and a voltage signal to the first variable capacitance device and the second variable capacitance device, wherein, in the event that the bias voltage and the voltage signal are input to the first variable capacitance device and the second variable capacitance device, the capacitance of the first variable capacitance device and the second variable capacitance device is taken as a first value, and wherein the voltage signal is amplified with the capacitance of the first variable capacitance device and the second variable capacitance device as a second value smaller than the first value. | ||||||
| 16 | Multiband wireless device and semiconductor integrated circuit | US11769151 | 2007-06-27 | US07945232B2 | 2011-05-17 | Yoshikazu Sugiyama; Satoshi Adachi; Yusaku Katsube; Masazumi Tone; Taku Takaki |
| When switching over from a portable telephone system of 800 MHz band to a UWB communication system of 9 GHz band, depending upon a signal for changing over a high pass filter and a low pass filter, a reactance element, which is determined to be matching with a load Z of the high pass filter, is connected to an output terminal of a transmitting power amplifier. With this, it is possible to achieve a multi-band or multi-mode wireless receiver of using a frequency band from 800 MHz to 10 GHz, without an enlargement of a circuit scale and an increase of costs. | ||||||
| 17 | AMPLIFIER, AMPLIFYING METHOD AND FILTER | EP07806651.1 | 2007-09-04 | EP1944865A1 | 2008-07-16 | IIDA, Sachio; YOSHIZAWA, Atsushi |
An amplifier is provided which includes: a first variable capacitance device of which capacitance is variable, a second variable capacitance device of which capacitance is variable, electrically connected to the first variable capacitance device, and of an inverse conductivity type from the first variable capacitance device, and a first input unit for selectively inputting a bias voltage and a voltage signal to the first variable capacitance device and the second variable capacitance device, wherein, in the event that the bias voltage and the voltage signal are input to the first variable capacitance device and the second variable capacitance device, the capacitance of the first variable capacitance device and the second variable capacitance device is taken as a first value, and wherein the voltage signal is amplified with the capacitance of the first variable capacitance device and the second variable capacitance device as a second value smaller than the first value. |
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| 18 | RF power amplifier | EP92109071.8 | 1992-05-29 | EP0516134B1 | 1998-02-11 | Fujita, Noriyuki, c/o NEC Corporation |
| 19 | マイクロフォン用の集積回路構成体、マイクロフォンシステム、およびマイクロフォンシステムの１つ以上の回路パラメータを調整するための方法 | JP2017545292 | 2015-02-27 | JP2018511219A | 2018-04-19 | ロッカ, ギノ; ハンスリック, トマシュ |
| マイクロフォン(12)用の1つの集積回路構成体(20)は、1つの増幅器回路(22)および1つの制御ユニット(30)を備える。この増幅器回路(22)は、この増幅器回路(22)の増幅器電流を調整するための1つの第1の切り替え可能なネットワーク回路(26)を備える。この第1の切り替え可能なネットワーク回路(26)は、複数のスイッチ(SW1, ...,SWx)を備え、各々のスイッチはこの第1の切り替え可能なネットワーク回路(26)の1つの第1の制御ポートにカップリングされている。この制御ユニット(30)は、この第1の切り替え可能なネットワーク回路(26)の第1の制御ポートにカップリングされており、この第1の切り替え可能なネットワーク回路(26)のそれぞれのスイッチ(SW1, ...,SWx)の設定を制御するように構成されている。【選択図】図1 | ||||||
| 20 | Multi-band radio and semiconductor integrated circuit | JP2006310596 | 2006-11-16 | JP4641021B2 | 2011-03-02 | 正純 利根; 勇作 勝部; 聡 安達; 由一 杉山; 高木 卓 |
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