序号 | 专利名 | 申请号 | 申请日 | 公开(公告)号 | 公开(公告)日 | 发明人 |
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41 | Small signal amplification circuit | JP10408375 | 1975-08-29 | JPS5228842A | 1977-03-04 | YOKOYAMA KENJI |
PURPOSE: To obtain an amplification circuit which is adaptable in amplifying the signal of low impedance signal source. COPYRIGHT: (C)1977,JPO&Japio | ||||||
42 | RECONFIGURABLE TUNABLE RF POWER AMPLIFIER | PCT/US2008064613 | 2008-05-23 | WO2008147932A3 | 2009-02-12 | DAWE GEOFFREY C |
A multi-band, multi-standard programmable power amplifier having tunable impedance matching input and output networks and programmable device characteristics. The impedance of either or both of the impedance matching input and output networks is tunable responsive to one or more control signals. In one example, the programmable power amplifier incorporates a feedback control loop and the control signal(s) are varied responsive to the feedback loop. | ||||||
43 | High frequency circuit having multi-chip module structure | EP10250964.3 | 2010-05-24 | EP2287905A3 | 2016-06-22 | Takagi, Kazutaka |
According to one embodiment of the present invention, there is a high frequency circuit having a multi-chip module structure, including a semiconductor substrate set formed with discrete transistors connected in series, a first dielectric substrate set formed with capacitors, and a second dielectric substrate set formed with strip lines. |
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44 | Semiconductor power device and RF signal amplifier | EP06015436.6 | 2006-07-25 | EP1748487A3 | 2016-05-25 | Dixit, Nagaraj Vishwanath; Perugupalli, Prasanth; Lopuch, Stan |
A semiconductor power device comprises a flange, a die having a gate, a source, and a drain. The source is electrically coupled to the flange. A drain matching circuit is located on the flange having an input, an output and a bias input, the input being coupled with the drain. The drain matching circuit comprises an inductor coupled in series with a first capacitor between the drain and flange and a second capacitor arranged next to the first capacitor, wherein the second capacitor is coupled with the bias input and in parallel with the first capacitor through a second inductor. An input terminal is mechanically coupled to the flange and electrically coupled with the gate, an output terminal is mechanically coupled to the flange and electrically coupled with the output of the drain matching circuit, and an input bias terminal is mechanically coupled to the flange and electrically coupled with the drain through the bias input. |
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45 | Sendeschaltung, Verfahren zum Senden und Verwendung | EP09004816.6 | 2009-04-01 | EP2110954B1 | 2012-08-01 | Ferchland, Tilo, Dipl.-Ing.; Beyer, Sascha, Dipl.-Ing.; Kluge, Wolfram, Dr.-Ing. |
46 | MESS-SCHALTUNG FÜR DEN AUSGANG EINES LEISTUNGSVERSTÄRKERS SOWIE EIN DIE MESS-SCHALTUNG UMFASSENDER LEISTUNGSVERSTÄRKER | EP05738728.4 | 2005-03-10 | EP1728084B1 | 2012-01-11 | WAGNER, Elmar |
The invention relates to a measuring circuit for the output of a power amplifier and a power amplifier comprising the measuring circuit. Said measuring circuit for an output (8) of an amplifier (20) comprises a first transistor (4f). The output current (27) of the first transistor (4f) is characteristic of the output current (28) of the amplifier (20), ins particular, the above is essentially proportional to the output current (28) of the amplifier (20). The first transistor (4f) is controlled in parallel to at least one second transistor (4a-4e), driving the amplifier output (8). | ||||||
47 | Radio frequency amplifiers | EP06015328.5 | 1999-02-25 | EP1744448B1 | 2010-10-20 | Järvinen, Esko |
48 | FM ANTENNA AMPLIFIER | EP02738857.8 | 2002-06-28 | EP1401097B1 | 2010-03-03 | ISHIBAYASHI, Katsushiro |
An FM antenna amplifier including a transformer (T) having a primary winding whose one end is connected to an input terminal to which a signal received by an FM antenna is fed and a secondary winding whose one end is fed with power supply voltage and whose arbitrary middle point is connected to an output terminal and a plurality of FETs, for example, three FETs (21 to 23) each having a source connected to the other end of the first winding of this transformer (T) in parallel, a drain connected to the other end of the secondary winding of the transformer in parallel, and a gate grounded. | ||||||
49 | Radio frequency variable gain amplifier with linearity insensitive to gain | EP04007357.9 | 2004-03-26 | EP1484840A3 | 2007-11-14 | Behzad, Arya; Lin, Li |
A multi-stage, variable gain amplifier whose linearity is relatively insensitive to variations in gain control is disclosed. The amplifier includes a primary cascoded pair of transistors for producing a primary output current from an input voltage as a function of a primary cascode control voltage. The amplifier further includes one or more secondary cascoded pairs of transistors coupled to the primary cascoded pair of transistors for producing one or more secondary output currents from the input voltage as a function of one or more secondary cascode control voltages. The output current of the RF circuit is a sum of the primary output current and the one or more secondary output currents |
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50 | Amplifier circuit improved in linearity and frequency band | EP06017070.1 | 2006-08-16 | EP1755215A9 | 2007-07-25 | Kim, Tae Wook; Kim, Bonkee; Lee, Kwyro |
An amplifier circuit improved in linearity and frequency band comprises an amplification block, a feedback block and an output block. The amplification block comprises a main transistor, an auxiliary transistor, a first capacitor, a second capacitor, a main transistor bias unit, and an auxiliary transistor bias unit. The main transistor bias unit comprises a first bias resistor. The auxiliary transistor bias unit comprises a second bias resistor. The feedback block comprises first and second feedback resistors, and the output block comprises an output resistor and an output transistor. |
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51 | AN AMPLIFIER COUPLING ON A REDUCED AREA | EP04775489.0 | 2004-09-30 | EP1794881A1 | 2007-06-13 | NILSSON, Joakim |
The invention discloses an amplifier (200, 400, 500) coupling comprising a first (230), a second (240), a third (250) and a fourth (260) transistor, additionally comprising a signal input port (220) and a signal output port (210, 410). The input port of the amplifier is connected to the first, second, third and fourth transistors such that an input signal to the amplifier is input to the first and the fourth transistor in parallel, and to the second and third transistors in parallel, with the outputs from the first and second transistors being connected in series to each other, and the outputs from the fourth and third transistors being connected in series with each other, said outputs being connected in parallel to each to the one output port of the amplifier. | ||||||
52 | Amplifier circuit improved in linearity and frequency band | EP06017070.1 | 2006-08-16 | EP1755215A2 | 2007-02-21 | Kim, Tae Wook; Kim, Bonkee; Lee, Kwyro |
An amplifier circuit improved in linearity and frequency band comprises an amplification block, a feedback block and an output block. The amplification block comprises a main transistor, an auxiliary transistor, a first capacitor, a second capacitor, a main transistor bias unit, and an auxiliary transistor bias unit. The main transistor bias unit comprises a first bias resistor. The auxiliary transistor bias unit comprises a second bias resistor. The feedback block comprises first and second feedback resistors, and the output block comprises an output resistor and an output transistor. |
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53 | MESS-SCHALTUNG FÜR DEN AUSGANG EINES LEISTUNGSVERSTÄRKERS SOWIE EIN DIE MESS-SCHALTUNG UMFASSENDER LEISTUNGSVERSTÄRKER | EP05738728.4 | 2005-03-10 | EP1728084A1 | 2006-12-06 | WAGNER, Elmar |
The invention relates to a measuring circuit for the output of a power amplifier and a power amplifier comprising the measuring circuit. Said measuring circuit for an output (8) of an amplifier (20) comprises a first transistor (4f). The output current (27) of the first transistor (4f) is characteristic of the output current (28) of the amplifier (20), ins particular, the above is essentially proportional to the output current (28) of the amplifier (20). The first transistor (4f) is controlled in parallel to at least one second transistor (4a-4e), driving the amplifier output (8). | ||||||
54 | High frequency power amplifier having a bipolar transistor | EP01107446.5 | 2001-03-27 | EP1143609B1 | 2006-09-27 | Morizuka, Kouhei, Toshiba Corp. |
55 | TRANSISTOR AMPLIFIER HAVING REDUCED PARASITIC OSCILLATIONS | EP00939833.0 | 2000-06-09 | EP1201028B1 | 2006-07-05 | TEETER, Douglas, A.; PLATZKER, Aryeh |
A transistor device (12') having a plurality of transistor cells (15'). Each one of the cells has a control electrode (17) for controlling a flow of carriers through a semiconductor. The device (12') has an input node (20'). A plurality of filters (18') are provided. Each one of the filters (18') is coupled between the input node (20') and a corresponding one of the control electrodes (17) of the plurality of transistor cells (15'). In one embodiment of the invention, pairs of the control electrodes (17) are connected to a common region and wherein each one of the filters (18') is coupled between the input node (20') and a corresponding one of the common regions. The semiconductor provides a common active region for the plurality of transistor cells (15'). Each one of the filters (18') comprises: a conductive layer (40); a dielectric layer (42) disposed on the conductive layer (40); a resistive layer (44) disposed over the dielectric layer (42); a conductive electrode (46) disposed in electrical contact with a first portion (50) of the resistive layer (44) and providing the input node; and, a connector (52) in electrical contact with a second portion (54) of the resistive layer (44) such second portion (54) of the resistive layer (44) being displaced from the first portion (50) of the resistive layer (44), such connector (52) passing through the dielectric and being in electrical contact with the first conductor (40). | ||||||
56 | FM ANTENNA AMPLIFIER | EP02738857 | 2002-06-28 | EP1401097A4 | 2005-01-19 | ISHIBAYASHI KATSUSHIRO |
An FM antenna amplifier including a transformer (T) having a primary winding whose one end is connected to an input terminal to which a signal received by an FM antenna is fed and a secondary winding whose one end is fed with power supply voltage and whose arbitrary middle point is connected to an output terminal and a plurality of FETs, for example, three FETs (21 to 23) each having a source connected to the other end of the first winding of this transformer (T) in parallel, a drain connected to the other end of the secondary winding of the transformer in parallel, and a gate grounded. | ||||||
57 | High frequency power amplifier having a bipolar transistor | EP01107446.5 | 2001-03-27 | EP1143609A3 | 2004-02-25 | Morizuka, Kouhei, Toshiba Corp. |
The object of the present invention is to provide a bipolar transistor which is excellent in uniformity of current distribution in spite of a small ballast resistance, and can constitute an amplifier showing high efficiency and low distortion with little deterioration of distortion even when a digital modulation wave is input thereto. A high frequency power amplifier of the present invention comprises a plurality of transistor blocks having a bipolar transistor, wherein each of the transistor blocks includes a resistance connected to an emitter of the bipolar transistor, a reference voltage generation circuit for generating a reference voltage as a base bias of the bipolar transistor, and a bias generation circuit connected to a base of the bipolar transistor, the bias generation circuit generating a base bias voltage by converting the reference voltage. |
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58 | TRANSISTOR AMPLIFIER HAVING REDUCED PARASITIC OSCILLATIONS | EP00939833.0 | 2000-06-09 | EP1201028A1 | 2002-05-02 | TEETER, Douglas, A.; PLATZKER, Aryeh |
A transistor device (12') having a plurality of transistor cells (15'). Each one of the cells has a control electrode (17) for controlling a flow of carriers through a semiconductor. The device (12') has an input node (20'). A plurality of filters (18') are provided. Each one of the filters (18') is coupled between the input node (20') and a corresponding one of the control electrodes (17) of the plurality of transistor cells (15'). In one embodiment of the invention, pairs of the control electrodes (17) are connected to a common region and wherein each one of the filters (18') is coupled between the input node (20') and a corresponding one of the common regions. The semiconductor provides a common active region for the plurality of transistor cells (15'). Each one of the filters (18') comprises: a conductive layer (40); a dielectric layer (42) disposed on the conductive layer (40); a resistive layer (44) disposed over the dielectric layer (42); a conductive electrode (46) disposed in electrical contact with a first portion (50) of the resistive layer (44) and providing the input node; and, a connector (52) in electrical contact with a second portion (54) of the resistive layer (44) such second portion (54) of the resistive layer (44) being displaced from the first portion (50) of the resistive layer (44), such connector (52) passing through the dielectric and being in electrical contact with the first conductor (40). | ||||||
59 | CIRCUITS AND METHODS FOR REDUCING SUPPLY SENSITIVITY IN A POWER AMPLIFIER | EP15784905.0 | 2015-10-13 | EP3210298A1 | 2017-08-30 | SCUDERI, Antonino; HADJICHRISTOS, Aristotele |
In one embodiment, the present disclosure includes a circuit comprising a first power amplifier stage having an input to receive an input signal, an output coupled to an output node, the first power amplifier stage receiving a time-varying power supply voltage. The circuit further includes a second power amplifier stage configured in parallel with the first power amplifier stage having an input to receive the input signal, an output coupled to the output node, the second power amplifier stage receiving the time-varying power supply voltage. A first gain of the first power amplifier stage decreases when the power supply voltage is in a first low voltage range, and a second gain of the second power amplifier stage compensates for the decreasing gain of the first power amplifier stage in the first low voltage range. | ||||||
60 | Power amplifier | EP11250063.2 | 2011-01-20 | EP2372906B1 | 2016-01-06 | Clifton, John Christopher |