| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 181 | Low-noise amplifier, including Iii nitride-based high electron mobility transistor | JP2011113609 | 2011-05-20 | JP5325930B2 | 2013-10-23 | フィッシャー ジェレミー |
| A low noise amplifier includes a first Group III-nitride based transistor and a second Group III-nitride based transistor coupled to the first Group III-nitride based transistor. The first Group III-nitride based transistor is configured to provide a first stage of amplification to an input signal, and the second Group III-nitride based transistor is configured to provide a second stage of amplification to the input signal. | ||||||
| 182 | Cascade amplifier with a bypass mode in which the transformer-based | JP2012539039 | 2010-11-12 | JP2013511220A | 2013-03-28 | カバニラス、ジョーズ |
| Cascaded amplifiers with a transformer-based bypass mode are described. In an exemplary design, an apparatus includes first and second amplifiers and a circuit. The first amplifier (e.g., a driver amplifier) provides amplification in a high gain mode and a bypass mode. The second amplifier (e.g., a power amplifier) provides amplification in the high gain mode. The circuit is coupled between the first and second amplifiers and includes a transformer having (i) a primary coil coupled to the first amplifier and (ii) a secondary coil that provides an output signal in the bypass mode. The primary coil may be a load inductor for the first amplifier. The circuit may further include a series combination of a capacitor and a switch coupled in parallel with the primary coil, a switch coupled in series with the secondary coil, and/or a capacitor coupled in parallel with the secondary coil. | ||||||
| 183 | Digital tunable interstage matching circuit | JP2012525692 | 2010-08-19 | JP2013502846A | 2013-01-24 | ジャオ、ユ; ネジャティー・ババク; プレッチャー、ナサン・エム．; ハドジクリストス、アリストテレ |
| A tunable inter-stage matching circuit that can improve performance is described. In an exemplary design, an apparatus includes a first active circuit (e.g., a driver amplifier), a second active circuit (e.g., a power amplifier), and a tunable inter-stage matching circuit coupled between the first and second active circuits. The tunable inter-stage matching circuit includes a tunable capacitor that can be varied in discrete steps to adjust impedance matching between the first and second active circuits. In an exemplary design, the tunable capacitor includes (i) a plurality of capacitors coupled in parallel and (ii) a plurality of switches coupled to the plurality of capacitors, one switch for each capacitor. Each switch may be turned on to select an associated capacitor or turned off to unselect the associated capacitor. The tunable capacitor may further include a fixed capacitor coupled in parallel with the plurality of capacitors. | ||||||
| 184 | Amplifier module having a plurality of operation modes | JP2012523738 | 2010-08-04 | JP2013501470A | 2013-01-10 | プレッチャー、ナサン・エム．; ハドジクリストス、アリストテレ; ネジャティー・ババク |
| 複数の動作モードを備えた増幅器モジュールが記述される。 例示的な設計において、増幅器モジュールは、増幅器（例えば、電力増幅器）、スイッチ、および、出力回路を含む。 増幅器は、第１のモードで入力信号を受取って増幅し増幅信号を提供する。 スイッチは増幅器の出力に結合され、第２のモードで増幅器をバイパスしてバイパス信号を提供する。 出力回路は増幅器およびスイッチに結合される。 出力回路は第１のモードで増幅器のための出力インピーダンス整合を行う。 出力回路は、さらに、（i）第１のモードで増幅信号を受取って出力信号を提供し、（ｉｉ）第２のモードでバイパス信号を受取ってて出力信号を提供する。 増幅器は第１のモードでイネーブルされ、第２のモードでディセーブルされうる。 | ||||||
| 185 | Integration impedance matching for the power amplifier and other circuits, output circuits with power coupling and filtering | JP2012512077 | 2010-05-21 | JP2012527852A | 2012-11-08 | クレメンス、ガイ; ネジャティ、ババク; プレッチャー、ナサン・エム．; フレデリック・ジュニア．、ノーマン・エル．; マイヤーズ、トーマス・エー． |
| 電力増幅器および他の回路での使用に適した、統合インピーダンス整合、電力結合およびフィルタリングを備えた出力回路が記述される。 典型的な設計では、装置は、第１および第２の回路（例えば電力増幅器）および出力回路を含んでいてもよい。 第１の回路は、第１の単一端信号を提供し、第１の出力インピーダンスを有してもよい。 第２の回路は、第２の単一端信号を提供し、第２の出力インピーダンスを有してもよい。 出力回路は、（ｉ）第１および第２の回路のための出力インピーダンス整合およびフィルタを行う第１および第２整合回路、（ｉｉ）結合された単一端信号を得るための第１および第２の単一端信号を結合するコンバイナ（例えば加算ノード）、（ｉｉｉ）結合された単一端信号のためのインピーダンス整合およびフィルタを行う第３の整合回路、（ｉｖ）異なる出力へ単一端信号を送るスイッチを含んでもよい。
【選択図】図３ |
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| 186 | High frequency power amplification device | JP2010280296 | 2010-12-16 | JP2012129844A | 2012-07-05 | NAMIE HISANORI; MARUYAMA MASASHI |
| PROBLEM TO BE SOLVED: To provide a high frequency power amplification device capable of reducing a talk current.SOLUTION: For example, the high frequency power amplification device includes power amplifier circuits PA2m and PA2s, either of which is activated in accordance with an output level, and transmission lines LNmn and LNsub, both having regions juxtaposed to each other. An end of LNsub (output node of PA2s) is connected to a ground supply voltage GND with a capacity C3 in between as an NMOS transistor MNsw is turned on when PA2s is activated, and is opened as MNsw is turned off when PA2m is activated. When PA2s is activated, a current flows through LNmn and LNsub in the same direction to produce a reciprocally strengthening magnetic coupling. When PA2m is activated, on the other hand, a current flowing through LNmn is in the opposite direction to a leakage current through LNsub due to an off capacity of MNsw to produce a reciprocally weakening magnetic coupling of LNmn and LNsub. | ||||||
| 187 | Electronic circuit | JP2010265785 | 2010-11-29 | JP2012119794A | 2012-06-21 | TSUKAJIMA KOJI |
| PROBLEM TO BE SOLVED: To suppress characteristic variations due to length errors in distributed constant lines or due to manufacturing variations.SOLUTION: An electronic circuit includes: a first transistor T1 having a control terminal, a first terminal and a second terminal; a second transistor T2 having a control terminal connected with the second terminal of the first transistor, and a second terminal connected with a DC power supply; a plurality of DC paths 11, 12 comprising independent wiring for supplying DC currents from the first terminal of the second transistor to the second terminal of the first transistor; and distributed constant lines L11, L12 disposed in series within the plurality of DC paths, respectively. | ||||||
| 188 | High-frequency amplifier | JP2008548105 | 2006-11-30 | JP4896990B2 | 2012-03-14 | 正敏 中山; 彰 太田; 和宏 弥政; 一富 森; 輝之 紫村 |
| 189 | Power amplifier | JP2010141044 | 2010-06-21 | JP2012005077A | 2012-01-05 | KAWAI YASUSHI; SAKAI HIROYUKI |
| PROBLEM TO BE SOLVED: To provide a power amplifier capable of reducing a loss of an input in a matching circuit, and of simplifying and downsizing a circuit.SOLUTION: A power amplifier 100 has: an input side transformer 120 having an annular primary coil 121 as a first metal wire and a plurality of straight line secondary coils 122 as a plurality of second metal wires, and that matches an input impedance and distributes an input signal to a plurality of distribution signals; a plurality of push-pull amplifier 110, each of which has a pair of transistors 111 for amplifying one of the distribution signals; and an output side transformer 130 having an annular secondary coil 131 as a third metal wire, and a plurality of straight line primary coils 132 as a plurality of fourth metal wires, and that combines the plurality of amplified distribution signals and matches an output impedance. Two input terminals of the pair of transistors 111 are connected to each other via the second metal wires, and two output terminals thereof are connected to each other via the fourth metal wires. | ||||||
| 190 | Power amplifying system with supply and bias enhancements | JP2011156505 | 2011-07-15 | JP2011239457A | 2011-11-24 | JAMES C CANYON; STEPHEN M ROLFING |
| PROBLEM TO BE SOLVED: To provide a radio frequency (RF) power amplifying system.SOLUTION: The power amplifying system includes a power controller and power amplifiers (220) comprising power transistors (354, 358) and bias circuitry (310). The bias circuitry provides current to the base of the one or more power transistors (354, 358) in such a manner as to automatically maintain the power transistors in substantially linear operation throughout the variation in voltage as supplied by the power controller. | ||||||
| 191 | Semiconductor device | JP2009051203 | 2009-03-04 | JP2010206649A | 2010-09-16 | HAYATA KANJI; KURIYAMA SATORU; HASE MASATOSHI; MATSUMOTO HIDETOSHI |
| <P>PROBLEM TO BE SOLVED: To provide a technology for improving characteristics of a balance amplifier when a power amplifier mounted in a mobile communication device such as a cellular phone, is constituted of the balance amplifier. <P>SOLUTION: One of features of the embodiments is disposing a passive component to be disposed on a low-band signal negative path and a passive component to be disposed on a low-band signal positive path at positions which become symmetric with respect to a centerline CL1 of a semiconductor chip CHP. Thus, symmetry of the low-band signal negative path and the low-band signal positive path is improved. As a result, a matching loss caused by a path difference between the low-band signal negative path and the low-band signal positive path can be sufficiently reduced and characteristics of a low-band signal balance amplifier can be improved. <P>COPYRIGHT: (C)2010,JPO&INPIT | ||||||
| 192 | Amplifier | JP2007072875 | 2007-03-20 | JP2008236354A | 2008-10-02 | SHIGEMATSU HISAO |
| PROBLEM TO BE SOLVED: To reduce a mounting space and a mounting cost while achieving a high output, for example, in a microwave amplifier. SOLUTION: The amplifier is provided with a transistor 1 for amplification, and an impedance conversion circuit 3 configured by being connected to the output part of the transistor 1 for amplification and connecting a plurality of transistors 9 and 12 for impedance conversion with different input impedance in series. COPYRIGHT: (C)2009,JPO&INPIT | ||||||
| 193 | Mmic circuit, impedance matching circuit, and power amplifier | JP2007057272 | 2007-03-07 | JP2008219758A | 2008-09-18 | AKAISHI MAKOTO |
| PROBLEM TO BE SOLVED: To improve the yield of an MMIC for a microwave and millimeter-wave bands, by improving deterioration in the high-frequency characteristics due to capacity variations of a capacitor during manufacturing. SOLUTION: An MMIC power amplifier is composed of a plurality of parallel-connected capacitors having different capacities, which is used for DC-cutting or impedance matching circuits. Each of the plurality of capacitors has an MEMS switch which can be turned on and off, and by switching on/off of the MEMS, a desired capacitor can be selected from among a plurality of capacitors. COPYRIGHT: (C)2008,JPO&INPIT | ||||||
| 194 | Power amplifier and portable telephone terminal | JP2006238118 | 2006-09-01 | JP2008061124A | 2008-03-13 | KUSUNOKI SHIGEO |
| PROBLEM TO BE SOLVED: To solve the problems related to distortion and efficiency by a relatively simple configuration to a signal having a relatively large peak factor. SOLUTION: Bias setting to class A or class AB operation is performed to a first power amplifier 10 for amplifying an input signal. The output of the first power amplifier 10 is connected to an output end sigout. A second power amplifier 20 branches one portion of the input signal as input, is subjected to bias setting to class C operation, and amplifies the input signal. One terminal of a switch 30 is connected to the output of the second power amplifier, and the other terminal is connected to an output terminal sigout. The output of the first power amplifier 20 is connected to the output terminal sigout. COPYRIGHT: (C)2008,JPO&INPIT | ||||||
| 195 | High-frequency power amplifier, high-frequency power amplifier module and mobile phone | JP2001274499 | 2001-09-11 | JP3877558B2 | 2007-02-07 | 修 加賀谷; 正已 大西; 知紀 田上; 健治 関根 |
| To provide a small-sized high frequency power amplifier for preventing oscillation by a small number of switching circuits and outputting high power and low power with high efficiencies, a high frequency power amplifier module and a portable telephone, the high frequency power amplifier is constituted by an amplifying circuit A and an amplifying circuit B connected in parallel, a size of a transistor at an output stage of the amplifying circuit B is made to be equal to or smaller than ¼ of a size of a transistor of an output stage of the amplifying circuit A and a switching circuit is connected between a signal line forward from the output stage of the amplifying circuit A and a ground terminal. | ||||||
| 196 | High frequency power amplifier and high frequency power amplifier module | JP2005223902 | 2005-08-02 | JP2006129444A | 2006-05-18 | TAGAMI TOMONORI; ONISHI MASAMI; MATSUMOTO HIDETOSHI; KURIYAMA SATORU |
| PROBLEM TO BE SOLVED: To provide a high frequency power amplifier with a low noise, highly stable and excellent control characteristic in comparison with those of conventional power amplifiers. SOLUTION: A differential amplifier comprising transistors Q1, Q2 is employed for the first stage of the power amplifier, a balanced-unbalanced conversion and inter-stage adjustment circuit comprising passive elements of capacitors Cp1, Cp2, Ct1, Ct2 and inductors Lp1, Lp2 are provided between the first stage and the second stage, and an unbalanced single end circuit is employed for the second stage. An emitter coupled type is adopted for the configuration of the differential amplifier and the output of the first stage amplifier is controlled by varying a current of a current source for determining its emitter current. COPYRIGHT: (C)2006,JPO&NCIPI | ||||||
| 197 | Switch device, power amplifier device therewith and portable communication terminal device | JP2004043588 | 2004-02-19 | JP2005236691A | 2005-09-02 | KOBAYASHI TOMOO; KUSUNOKI SHIGEO; SHIMADA MASAYUKI; KOIMORI TOSHIYUKI |
| <P>PROBLEM TO BE SOLVED: To prevent a drawback of generating output loss due to output of large power which sneaks into a line side for a medium power output at the time of the large power output in a selecting switch for switching between the large power and the medium power to output power. <P>SOLUTION: A second branch switch block 97 serving as a line of medium power is formed by a plurality of FETs in such a way that a drain of a prestage FET is connected to the source of a poststage FET, and a first branch switch block 96 for a line of large power is formed by connecting the number of FETs smaller than the number of FETs in the medium power line in the same way. Since the larger the number of FETs is, the higher an isolation is, and the isolation of the switch block 96 can be made larger than that of the switch block 97. Therefore, the drawback that the output from the line for large power can be prevented from sneaking into the line of intermediate power at the time of the large power output, and the power can be outputted without generating output loss in the output of large power. <P>COPYRIGHT: (C)2005,JPO&NCIPI | ||||||
| 198 | 高周波フロントエンド回路 | JP2017097220 | 2017-05-16 | JP2018195937A | 2018-12-06 | 竹中 功 |
| 【課題】高周波フロントエンド回路において、増幅回路によって増幅された送信信号が、受信回路の周波数帯域側に漏洩することを抑制する。 【解決手段】通信装置100において、高周波フロントエンド回路1は、受信回路70aと、増幅回路10aを有する送信回路30aとを備える。増幅回路10aは、入力端子Pinおよび出力端子Poutと、入力端子Pinと出力端子Poutとを結ぶ経路上に設けられた増幅素子と、LC共振回路を有し、増幅素子と出力端子Poutとの間に接続されたバイアス回路とを備えている。送信回路30aの周波数通過帯域は、受信回路70aの周波数通過帯域よりも低く、バイアス回路の共振周波数の値は、送信回路30aの周波数通過帯域幅の値よりも小さい。 【選択図】図2 |
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| 199 | 電力増幅モジュール | JP2017028227 | 2017-02-17 | JP2018133778A | 2018-08-23 | 石原 翔太; 山本 靖久 |
| 【課題】 電力増幅モジュールの動作電圧の低電圧化を実現する。 【解決手段】 電力増幅モジュール120は、電力増幅回路200と制御IC300を備える。電力増幅回路200は、RF信号を電力増幅して増幅信号を出力するバイポーラトランジスタTr1を備える。制御IC300は、バイポーラトランジスタTr1にバイアス信号を供給するバイアス回路として機能する電界効果トランジスタTr5を備える。電界効果トランジスタTr5は、バイポーラトランジスタよりも低い閾値電圧で動作可能であるため、電力増幅モジュール120の動作電圧の低電圧化を実現できる。 【選択図】 図2 |
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| 200 | 電力増幅モジュール | JP2016184752 | 2016-09-21 | JP2018050200A | 2018-03-29 | 石原 翔太; 小野 生幸; 島宗 祐介; 森沢 文雅; 中島 靜城; 本多 悠里; 古塩 和博; 佐藤 真人 |
| 【課題】送信信号のスロープ制御を行う電力増幅モジュールにおいて、回路の増大を抑制すること。 【解決手段】電力増幅モジュール120A−2は、増幅信号の信号レベルを制御するためのレベル制御電圧Vrampに応じた第1電流Ibcを出力する第1電流源450と、レベル制御電圧に応じた第2電流Icasを出力する第2電流源451と、ベースに入力信号RFin及び第1バイアス電流Ibias1が供給され、エミッタが接地される第1トランジスタ500aと、エミッタが第1トランジスタのコレクタに接続され、ベースに第2電流が供給され、コレクタから入力信号を増幅した第1増幅信号を出力する第2トランジスタ501と、コレクタに第1電流が供給され、ベースにバイアス制御電流Ibbが供給され、エミッタから第1トランジスタのベースに第1バイアス電流を供給する第3トランジスタ600aと、を備える。 【選択図】図11 |
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