| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 81 | Auto-tuning amplifier | US12020805 | 2008-01-28 | US07917117B2 | 2011-03-29 | Steven Zafonte; Brian Otis |
| This document discloses, among other things, a front end circuit having a selectable center frequency. The center frequency is selected based on a control signal proportional to a phase difference between a reference frequency and an amplifier output. A resonant frequency of a tank circuit coupled to the amplifier is tuned using the control signal. | ||||||
| 82 | PREAMPLIFIER CIRCUIT FOR A MICROELECTROMECHANICAL CAPACITIVE ACOUSTIC TRANSDUCER | US12826210 | 2010-06-29 | US20100329487A1 | 2010-12-30 | Filippo David; Igino Padovani |
| Described herein is a preamplifier circuit for a capacitive acoustic transducer provided with a MEMS detection structure that generates a capacitive variation as a function of an acoustic signal to be detected, starting from a capacitance at rest; the preamplifier circuit is provided with an amplification stage that generates a differential output signal correlated to the capacitive variation. In particular, the amplification stage is an input stage of the preamplifier circuit and has a fully differential amplifier having a first differential input (INP) directly connected to the MEMS detection structure and a second differential input (INN) connected to a reference capacitive element, which has a value of capacitance equal to the capacitance at rest of the MEMS detection structure and fixed with respect to the acoustic signal to be detected; the fully differential amplifier amplifies the capacitive variation and generates the differential output signal. | ||||||
| 83 | Device and method for biasing a transistor amplifier | US12416538 | 2009-04-01 | US07612614B2 | 2009-11-03 | Ping Wai Li; Cong Ke Li; Wei Wang |
| Provided is circuitry for biasing a transistor amplifier with a DC-voltage signal, the transistor amplifier having a first input terminal, a second input terminal, and an output terminal coupled to the second input terminal. The circuitry includes a sensor capacitor connected to the first input terminal and an impedance transistor arranged in parallel with said capacitor, the transistor and capacitor forming a low-pass filter. The circuitry also includes a biasing circuit configured to controllably vary a DC-voltage signal for operatively biasing the amplifier, the biasing circuit including a cascaded current arrangement configured to subdivide a reference current into smaller currents for selectively generating voltage potentials for biasing the impedance transistor to adjustably filter a noise component of the DC-voltage signal via the low-pass filter before the DC-voltage signal is provided to the first input terminal. | ||||||
| 84 | Low noise amplifier | US12207247 | 2008-09-09 | US07592873B2 | 2009-09-22 | Hiroyuki Satoh; Hiroshi Yamazaki |
| For a first transistor, a source thereof is coupled to an input terminal and a drain thereof is coupled to an output terminal. A first variable impedance circuit is arranged between a gate of the first transistor and ground, and the impedance thereof is changed according to a first control signal. A second variable impedance circuit is arranged between the gate and the source of the first transistor, and the impedance thereof is changed according to a second control signal. Furthermore, an impedance circuit is arranged between the gate of the first transistor and a power supply. The ratio of the impedances of the first and second variable impedance circuits can be set to an arbitrary value according to the first and second control signals in order to change the gain of the low noise amplifier. As the result, the generation of unwanted thermal noise can be prevented. | ||||||
| 85 | Variable gain amplifier and control method thereof | US12058354 | 2008-03-28 | US07567126B2 | 2009-07-28 | Tomoyuki Arai |
| A variable gain amplifier has a first amplifier circuit (106) having a first field-effect transistor and amplifying a signal input to a gate of the first field-effect transistor to output; a gate bias control circuit (102) controlling a gate bias of the first amplifier circuit to control a gain of the first amplifier circuit; and a variable matching circuit (103) controlling a capacitor connected to the gate of the first amplifier circuit to control the gain of the first amplifier circuit. | ||||||
| 86 | SEMICONDUCTOR CIRCUIT | US12195051 | 2008-08-20 | US20080303597A1 | 2008-12-11 | Yusuke INOUE |
| There are included a Wilkinson divider/combiner dividing an input signal, amplifying elements amplifying outputs of the Wilkinson divider/combiner, and a Wilkinson divider/combiner combining outputs of respective amplifying elements. A variable capacitor element is connected to a branch point of a signal transmission path in the Wilkinson divider/combiner. A capacitance value of the variable capacitor element is controlled in correspondence with a frequency of an input signal, whereby a matching frequency is corrected to increase an operating frequency band. | ||||||
| 87 | AMPLIFYING CIRCUIT AND ASSOCIATED LINEARITY IMPROVING METHOD | US12134014 | 2008-06-05 | US20080303591A1 | 2008-12-11 | Po-Chih WANG |
| An amplifying circuit and an associated linearity improving method are provided to correct the AM to PM distortion of an amplifier, thereby improving the amplifier linearity. The amplifying circuit includes an amplifier and a correcting unit. The amplifier has a non-linear input capacitor. The correcting unit generates a correction signal according to an input signal of the amplifier, and performs an AM to PM correction according to the correction signal, thereby making the amplifier have an approximately linear equivalent input capacitor. | ||||||
| 88 | Fully differential sensing apparatus and input common-mode feedback circuit thereof | US11467170 | 2006-08-25 | US07358805B2 | 2008-04-15 | Tim K. Shia; Chi-Chen Chung; Long-Xi Chang |
| A fully differential sensing apparatus and an input common mode feedback circuit are provided. The input common mode feedback circuit includes a common mode error amplifier and a plurality of adaptive conductance elements. Each adaptive conductance element behaves with a low impedance characteristic when its anode voltage is greater than its cathode voltage by a positive threshold voltage or, on the contrary, when the anode voltage of such an adaptive conductance element is lower than its cathode voltage by a negative threshold voltage, the adaptive element also behaves with a low impedance characteristic; otherwise the aforementioned adaptive conductance element behaves with a high impedance characteristic. The common mode error amplifier and a plurality of such adaptive conductance elements form a negative feedback loop to effectively maintain the input common voltage of a fully differential input amplifier, which can be used for a fully differential sensing apparatus. | ||||||
| 89 | Variable capacitor circuit and integrated circuit containing the same | US11070259 | 2005-03-03 | US20050195053A1 | 2005-09-08 | Akira Uemura |
| A variable capacitance circuit includes a MOS capacitor, and an application voltage switching section configured to change an application voltage to the MOS capacitor to change a capacitance of the MOS capacitor. The variable capacitance circuit connects the MOS capacitor to an electronic circuit. Here, the electronic circuit may be a voltage amplification circuit, and the variable capacitance circuit may function as an amplification gain switching circuit configured to switch an amplification gain of the voltage amplification circuit, by changing the capacitance to be connected to the voltage amplification circuit. | ||||||
| 90 | Circuit for improved differential amplifier and other applications | US10423141 | 2003-04-24 | US06781459B1 | 2004-08-24 | Albert Warren Brown |
| Differential amplifiers and phase-splitting circuits incorporate voltage-transfer or current-transfer devices of different conductivity types that are connected in series between two different potentials. The current flowing through the two devices is responsive to input signals provided to either or both of the devices. The two devices may be of different types such as bipolar transistors, field-effect transistors, vacuum tubes, triacs and silicon controlled rectifiers. Specific implementations include amplifiers with very low input capacitance and very low second harmonic distortion, multi-state memory cells, detectors and voltage regulators. | ||||||
| 91 | 저잡음 증폭기 매칭 | KR1020167014769 | 2014-10-14 | KR101781998B1 | 2017-09-26 | 로비넷,로버트로이드; 모르세디,알리 |
| 예시적인실시예들은저잡음증폭기(LNA) 매칭디바이스(402)에관련된다. 디바이스는무선신호를수신하기위한안테나및 적어도하나의 LNA를포함할수 있다. 디바이스는안테나와적어도하나의 LNA 사이에커플링되고복수의주파수대역들의각각의대역에대한최적의 LNA 매칭설정을제공하기위한하나이상의제어신호들(S1, S2, S3, S4, S5)을수신하도록구성된 LNA 매칭디바이스(402)를더 포함할수 있다. | ||||||
| 92 | 저잡음 증폭기를 위한 시스템 및 방법 | KR1020150116005 | 2015-08-18 | KR1020160022268A | 2016-02-29 | 바칼스키빈프레드; 일코브니콜라이; 케레르다니엘; 올리베이라파울루 |
| 일실시예에따르면, 회로는입력포트와출력포트사이에결합된제1 신호경로, 및입력포트와출력포트사이에서제1 신호경로와병렬로결합된제2 신호경로를포함한다. 제1 신호경로는입력포트에결합된입력노드를갖는저잡음증폭기(LNA)를포함하고, 제2 신호경로는입력포트와출력포트에결합된스위치를포함한다. | ||||||
| 93 | 저잡음 증폭기 및 그를 이용한 이득 조절 방법 | KR1020130092562 | 2013-08-05 | KR1020150016743A | 2015-02-13 | 김선화; 이교상 |
| 본 발명은 저잡음 증폭기 및 그를 이용한 이득 조절 방법에 관한 것이다.
본 발명에 따른 저잡음 증폭기는, 입력단을 통해 인가된 고주파(RF) 신호를 증폭하는 증폭 수단; 상기 증폭 수단의 일단에 접속되며, 증폭 수단에 동작 전원을 공급하는 전원공급부; 수신 방송신호의 크기에 따라 커패시턴스를 가변시킴으로써 수신 신호의 이득을 조절하는 이득 조절부; 및 상기 이득 조절부에 걸리는 전압의 크기를 조절하기 위한 전압크기 조절부를 포함한다. 이와 같은 본 발명에 의하면, LNA단에서 각 망의 특성에 맞추어 적절한 이득이 설정될 수 있도록 바랙터 다이오드에 의해 커패시턴스를 가변함으로써, 전 주파수 대역에서 수신 감도의 저하 없이 방송을 수신할 수 있다. |
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| 94 | 저왜곡 용량성 신호 소스 증폭기를 위한 시스템 및 방법 | KR1020120092515 | 2012-08-23 | KR1020130023132A | 2013-03-07 | 세발로스호세루이스; 크롭피치마이클 |
| PURPOSE: System and method are provided to process a high sound input signal without introducing high nonlinearity into a system. CONSTITUTION: An amplifier(108) outputs an amplifier microphone signal to an output pad(118). A peak detector(110) detects a peak signal from the output of the amplifier and sets an attenuator(106) according to the output of the peak detector. The attenuator is a variable capacitance implemented by using a capacitor array capable of switching. A bias generator(104) provides bias voltage for microphone(102) itself in a pin(116). [Reference numerals] (102) MEMS microphone; (104) Bias generator; (106) Attenuator; (110) Peak detector; (112) Controller | ||||||
| 95 | Signal converting apparatus and receiving apparatus for supporting dual bandwidth in wireless communication system | KR20120016022 | 2012-02-16 | KR20120056233A | 2012-06-01 | LEE SANG GUG; SHIM YUN A |
| PURPOSE: A signal converting apparatus and a signal receiving apparatus for supporting dual bands in a wireless communication system are provided to obtain isolation between an input and an output by minimizing the reflection and noise factors of a received signal. CONSTITUTION: A load part(114) of a signal converting apparatus includes first to third capacities(C1,C2,C3) and first and second inductors(L1,L2). The first to third capacities and the first and second inductors are composed of an ideal passive device. The second capacitor is connected between a first node(P1) and a second node(P2). One of the ends of the first inductor and the first capacitor is connected between the first node and the third capacity. One of the ends of the second inductor and the second capacitor is connected between the second node and the third capacity. The other ends of the first and second capacitor and the first and second inductors are connected to a ground. | ||||||
| 96 | Source Switched Split LNA | US15917301 | 2018-03-09 | US20180302039A1 | 2018-10-18 | Emre Ayranci; Miles Sanner |
| A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors and gate to ground caps for each legs can be used to further improve the matching performance of the invention. | ||||||
| 97 | CIRCUIT FOR AND METHOD OF IMPLEMENTING A MULTIFUNCTION OUTPUT GENERATOR | US15426917 | 2017-02-07 | US20180226929A1 | 2018-08-09 | Umanath R. Kamath; John K. Jennings; Adrian Lynam |
| A circuit for implementing a multifunction output generator is described. The circuit comprises an amplifier circuit having a first input and a second input; a voltage generator coupled at a first node to a first input of the amplifier circuit; a controllable current source configured to provide a variable current to the first node; and a switching circuit enabling the operation of the amplifier circuit in a first mode for sensing a temperature and a second mode for providing a reference voltage. A method of implementing a multifunction output generator is described. | ||||||
| 98 | LNA with Programmable Linearity | US15895863 | 2018-02-13 | US20180175807A1 | 2018-06-21 | Hossein Noori; Chih-Chieh Cheng |
| A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” input stage and a “common gate” output stage can be turned on or off using the gate of the output stage. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input stage of each cascode. Further switches used for switching degeneration inductors, gate/sources caps and gate to ground caps for each legs can be used to further improve the matching performance of the invention. | ||||||
| 99 | Amplifier dynamic bias adjustment for envelope tracking | US14958848 | 2015-12-03 | US09973145B2 | 2018-05-15 | Dan William Nobbe; Jeffrey A. Dykstra; Chris Olson; James S. Cable |
| An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor. | ||||||
| 100 | Active device and circuits used therewith | US15368026 | 2016-12-02 | US09929708B2 | 2018-03-27 | Farbod Aram |
| An active device and circuits utilized therewith are disclosed. In an aspect, the active device comprises an n-type transistor having a drain, gate and bulk and a p-type transistor having a drain, gate and bulk. The n-type transistor and the p-type transistor include a common source. The device includes a first capacitor coupled between the gate of the n-type transistor and the gate of the p-type transistor, a second capacitor coupled between the drain of the n-type transistor and the drain of p-type transistor and a third capacitor coupled between the bulk of the n-type transistor and the bulk of p-type transistor. The active device has a high breakdown voltage, is memory less and traps even harmonic signals. | ||||||
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