子分类：
| 序号 | 专利名 | 申请号 | 申请日 | 公开（公告）号 | 公开（公告）日 | 发明人 |
|---|---|---|---|---|---|---|
| 41 | Cr oscillation circuit | JP2012148429 | 2012-07-02 | JP5472384B2 | 2014-04-16 | 一心 松尾 |
| 42 | Piezoelectric vibration piece, piezoelectric vibrator, oscillator, electronic apparatus, and wave clock | JP2012062520 | 2012-03-19 | JP2013197857A | 2013-09-30 | ARIMATSU HIROSHI |
| PROBLEM TO BE SOLVED: To provide a piezoelectric vibration piece, a piezoelectric vibrator, an oscillator, an electronic apparatus, and a wave clock which are capable of suppressing diffusion of a connection member while suppressing the number of manufacturing steps and costs.SOLUTION: A piezoelectric vibration piece 2 includes: a piezoelectric board 11 having a pair of vibration arms 8 and 9, and a base 10 integrally fixing basal ends of the pair of vibration arms 8 and 9 extending along a length direction thereof; excitation electrodes 12 and 13 respectively formed on the vibration arms 8 and 9 and pulsating the vibration arms 8 and 9; mount electrodes 15 and 16 that are formed on the base 10 and externally mount the piezoelectric board 11 with a connection member interposed therebetween; and extraction electrodes 19 and 20 for connecting the excitation electrodes 12 and 13 and the mount electrodes 15 and 16. The extraction electrodes 19 and 20 are formed by being folded back a plurality of times between the excitation electrodes 12 and 13 and the mount electrodes 15 and 16. | ||||||
| 43 | Oscillation method and oscillation circuit | JP2012279044 | 2012-12-21 | JP5275508B1 | 2013-08-28 | 彰 滝沢 |
| 【課題】凸型状のパルス波の生成が可能な発振回路を提供する。
【解決手段】ＭＯＳＦＥＴを複数個リング状に接続した発振回路を用いた発振方法であって、ＭＯＳＦＥＴの駆動電源のＧＮＤではなく各ＭＯＳＦＥＴ同士の接続回線のうちの一部にＧＮＤをとり、ＧＮＤをとった箇所から奇数個のＭＯＳＦＥＴを接続した先の接続回線からプローブをとり、プローブとＧＮＤとの間で発振波形を得る。 【選択図】図１ |
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| 44 | Waveform generator | JP5695783 | 1983-03-31 | JPH0669123B2 | 1994-08-31 | 裕也 三田 |
| 45 | 半導体装置 | JP2017020118 | 2017-02-07 | JP6381699B2 | 2018-08-29 | 梅崎 敦司 |
| 46 | 半導体装置 | JP2012215365 | 2012-09-28 | JP6087558B2 | 2017-03-01 | 梅崎 敦司 |
| 47 | 発振器 | JP2015157289 | 2015-08-07 | JP2017038150A | 2017-02-16 | 佐藤 裕治 |
| 【課題】発振周波数決定要因である電流源を間欠的に使用することでフリッカ雑音の発生に拘わらず、安定した周波数の発振出力が得られる発振器を提供する。 【解決手段】3つの電流源I1〜I3と、3つの電流源からの電流によって基準電圧を発生する抵抗Rと、3つの電流源からの電流が供給される2つのコンデンサC1、C2と、2つのコンデンサのうち3つの電流源のいずれかから電流が供給されているコンデンサの端子電圧と基準電圧とを比較して所定周期の比較結果を出力するコンパレータ21と、電流源のそれぞれと抵抗及び2つのコンデンサとの間を接続可能なスイッチ回路SWと、コンパレータの出力に基づいてスイッチ回路を制御して、3つの電流源のうちの2つの電流源からの電流を抵抗及び2つのコンデンサのうちの一方のコンデンサに供給することで3つの電流源を間欠的に使用するスイッチコントローラ22と、を具備する。 【選択図】図1 |
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| 48 | 高周波発振器の発振周波数の可変方法 | JP2013521369 | 2011-06-22 | JP5796069B2 | 2015-10-21 | 小畑 英幸 |
| 49 | 発振器及び半導体集積回路装置 | JP2011025908 | 2011-02-09 | JP5613581B2 | 2014-10-29 | 洋一 飯塚; 康郎 池田; 聰 大西 |
| 50 | Oscillation method and oscillation circuit | JP2012279044 | 2012-12-21 | JP2014123867A | 2014-07-03 | TAKIZAWA AKIRA |
| PROBLEM TO BE SOLVED: To provide an oscillator circuit which can generate a convex-shaped pulse wave.SOLUTION: An oscillation method uses an oscillator circuit connecting a plurality of MOSFETs in a ring shape. A GND is taken on a part of connecting circuits of MOSFETs, instead of a GND of a driving power source of MOSFETs. A probe is taken from a connecting circuit of a connection destination for the odd number of MOSFETs from the part where the GND is taken. An oscillation waveform is obtained between the probe and the GND. | ||||||
| 51 | Cr oscillation circuit | JP2012148429 | 2012-07-02 | JP2013153407A | 2013-08-08 | MATSUO ISSHIN |
| PROBLEM TO BE SOLVED: To provide a CR oscillation circuit that can be adjusted to minimize a temperature characteristic in a simpler configuration.SOLUTION: A series circuit 1 comprising three resistive elements R1-R3 is provided between a power supply VDD and a ground, and the resistive elements R1, R3 have a positive temperature characteristic, the resistive element R2 has substantially no temperature characteristic and the resistive element R2 and a capacitor C1 and/or a resistive element R4 can be trimmed. A first switch circuit 2 connected between the series circuit 1 and a non-inverting input terminal of a comparator 4 turns on when an output signal Vo of the comparator 4 indicates a high level, and a second switch circuit 3 turns on when the output signal Vo indicates a low level. | ||||||
| 52 | Semiconductor device | JP2012215365 | 2012-09-28 | JP2013085237A | 2013-05-09 | UMEZAKI ATSUSHI |
| PROBLEM TO BE SOLVED: To provide a semiconductor device which can reduce power consumption and has a reduced number of transistors.SOLUTION: The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is electrically connected to first wiring, and the other of the source and the drain is electrically connected to second wiring. One of a source and a drain of the second transistor is electrically connected to the first wiring, a gate of the second transistor is electrically connected to a gate of the first transistor, and the other of the source and the drain of the second transistor is electrically connected to one electrode of the capacitor, while the other electrode of the capacitor is electrically connected to third wiring. | ||||||
| 53 | Oscillator and semiconductor integrated circuit device | JP2011025908 | 2011-02-09 | JP2012165314A | 2012-08-30 | IIZUKA YOICHI; IKEDA YASURO; ONISHI SATOSHI |
| PROBLEM TO BE SOLVED: To provide an oscillator that compensates for temperature characteristics even if the magnitude of a capacity Cpara directly parasitic between output terminals of the oscillator is not negligible, and a semiconductor integrated circuit device incorporating the oscillator.SOLUTION: The oscillator having an inductive element L, a capacitive element C and an amplifier 30 connected in parallel between a first terminal and a second terminal, and amplifying in the amplifier a resonance generated by the inductive element and the capacitive element for output from the first terminal and the second terminal includes a first resistive element Rc having a larger resistance value than a parasitic resistance Rof the inductive element connected in series with the capacitive element between the first terminal and the second terminal. | ||||||
| 54 | Waveform generator | JP5695783 | 1983-03-31 | JPS59182602A | 1984-10-17 | MITA HIRONARI |
| PURPOSE:To obtain a waveform generator with high reliability without causing distortion in a generated waveform by the constitution that the change is executed after awaiting the end of one period when the waveform condition of an analog waveform signal is changed. CONSTITUTION:A computer 2 calculates a waveform condition signal (a) based on the set waveform condition and transmits its signal to a waveform generator 1. The generator 1 generates an analog waveform signal (b) determined by the signal (a) and applies it as a load wave to a material test equipment 3. Further, the generator 1 outputs an end signal (c) to the computer 2 every time one period of the signal (b) ends. The 1st wave in the generated waveform is excluded by setting the signal (a) and the interruption processing is attained by using the signal (c) as the interruption signal. When the signal (c) is generated, the computer 2 uses it as an interruption signal and stops the output of the signal (a) so as to discriminate the change in the waveform condition. If any change exists, the signal (a) is calculated based on the waveform condition set newly and then, the signal is supplied to the generator 1. | ||||||
| 55 | 전압 제어 발진기용 시스템 및 방법 | KR1020160002164 | 2016-01-07 | KR1020160085716A | 2016-07-18 | 트로타사베리오 |
| 전압제어발진기용시스템및 방법일 실시예에따라, 전압제어발진기(VCO)는복수의트랜지스터를구비한 VCO 코어, 및 VCO 코어의이미터단자들에연결되는제1 단및 동조단자에연결되는제2 단을구비한버랙터회로를포함한다. 버랙터회로는 VCO 코어의이미터단자들에대한동조단자에인가되는전압을증가시킴으로써증가하는커패시턴스를포함한다. | ||||||
| 56 | 전압 제어 오실레이터를 위한 시스템 및 방법 | KR1020150094604 | 2015-07-02 | KR1020160004952A | 2016-01-13 | 베빌락쿠아안드레아; 티에보트마크 |
| 실시예에따라, 오실레이터는탱크회로와탱크회로에연결된복수의교차연결복합트랜지스터를갖는오실레이터코어회로를포함한다. 복수의복합트랜지스터의각각은바이폴라트랜지스터와바이폴라트랜지스터의베이스에연결된소스를갖는전계효과트랜지스터(FET)를포함한다. | ||||||
| 57 | 전압 제어 발진기 및 전압 제어 발진기의 동작 방법 | KR1020140130101 | 2014-09-29 | KR1020150037614A | 2015-04-08 | 트로타사베리오 |
| 실시예에따르면, 전압제어발진기(VCO)는복수의트랜지스터를갖는 VCO 코어, VCO 코어의콜렉터단자와제 1 공급노드사이에결합된바이어스저항, 및 VCO 코어의이미터단자에결합된버랙터회로를포함한다. 바이어스저항은 VCO 코어의자기-바이어스조건을제한하도록구성된다. | ||||||
| 58 | 전압 제어 발진기용 시스템 및 방법 | KR1020170130629 | 2017-10-11 | KR1020170118646A | 2017-10-25 | 트로타사베리오 |
| 전압제어발진기용시스템및 방법일 실시예에따라, 전압제어발진기(VCO)는복수의트랜지스터를구비한 VCO 코어, 및 VCO 코어의이미터단자들에연결되는제1 단및 동조단자에연결되는제2 단을구비한버랙터회로를포함한다. 버랙터회로는 VCO 코어의이미터단자들에대한동조단자에인가되는전압을증가시킴으로써증가하는커패시턴스를포함한다. | ||||||
| 59 | 전압 제어 발진기용 시스템 및 방법 | KR1020160002164 | 2016-01-07 | KR101787019B1 | 2017-10-18 | 트로타사베리오 |
| 전압제어발진기용시스템및 방법일 실시예에따라, 전압제어발진기(VCO)는복수의트랜지스터를구비한 VCO 코어, 및 VCO 코어의이미터단자들에연결되는제1 단및 동조단자에연결되는제2 단을구비한버랙터회로를포함한다. 버랙터회로는 VCO 코어의이미터단자들에대한동조단자에인가되는전압을증가시킴으로써증가하는커패시턴스를포함한다. | ||||||
| 60 | 발진 방법 및 발진 회로 | KR1020130102382 | 2013-08-28 | KR101396659B1 | 2014-05-23 | 다키자와아키라 |
| Provided is an oscillation circuit capable of generating a convex pulse wave. An oscillation method using the oscillation circuit connecting a plurality of MOSFETs in a ring shape grounds some of connection lines between each MOSFET without grounding a driving power source of the MOSFET and obtains an oscillation waveform between a probe and the ground by providing the probe to the connection line in which the odd number of MOSFETs are connected from the ground. | ||||||
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