PRIORITY

The present application claims priority from U.S. Provisional Patent Application No. 60/267,879, which was filed on Feb. 9, 2001, and is hereby incorporated herein by reference in its entirety.

CROSS-REFERENCE TO RELATED APPLICATION(S)

The present application may be related to the following commonly owned U.S. patent applications, which are hereby incorporated herein by reference in their entireties:

U.S. patent application Ser. No. 09/846,886 entitled OPTICAL LIMITER BASED ON NONLINEAR REFRACTION, filed on May 1, 2001 in the names of Edward H. Sargent and Lukasz Brzozowski; and

U.S. patent application Ser. No. 09/933,315 entitled OPTICAL LOGIC DEVICES BASED ON STABLE, NON-ABSORBING OPTICAL HARD LIMITERS, filed on even date herewith in the names of Erik V. Johnson and Edward H. Sargent.

FIELD OF THE INVENTION

The present invention relates generally to optical information processing, and more particularly to storing an optical signal in the optical state.

BACKGROUND OF THE INVENTION

In today's information age, optical communication technologies are being used more and more frequently for transmitting information at very high speeds. Traditionally, information processing equipment (such as switches, routers, and computers) process information electronically. Therefore, optical communications are often converted into electronic form for processing by the information processing equipment. This electronic processing is slow relative to the speed of the optical communications themselves, and thus often becomes a “bottleneck” of optical communication and processing systems.

Optical information processing systems process information optically without the need to convert the information to an electronic form for processing electronically. One challenge in an optical information processing is the storage of an optical signal. Traditionally, storage of an optical signal would be accomplished by detecting the signal with a photodetector, converting it into excited carriers, and then storing these excited carriers electronically. This technique for storing optical signals is limited by the speed of the electronics and becomes unsatisfactory as optical communication speeds increase.

Thus, optical information processing systems need to store an optical signal in the optical state. The use of bistable devices to store optical signals has been explored (U.S. Pat. Nos. 4,573,767, 4,930,873, 5,349,593, 5,461,507, 5,537,243), and the use of stable devices with feedback has also been examined (U.S. Pat. Nos. 5,617,232, 5,999,284). As well, devices which store information as a chemical reaction have been patented (U.S. Pat. Nos. 4,864,536, 4,992,654, 5,479,384, 6,005,791).

SUMMARY OF THE INVENTION

In accordance with one aspect of the invention, an optical sampler based on stable, non-absorbing optical hard limiters includes an optical feedback loop for storing an optical signal in optical form. The optical feedback loop includes appropriate components for amplifying/reproducing the stored optical signal. The optical sampler outputs the stored optical signal.

BRIEF DESCRIPTION OF THE DRAWINGS

In the accompanying drawings:

FIG. 1

is a schematic block diagram showing a first exemplary optical sampler built from optical logic gates based upon stable, non-absorbing optical hard limiters for use with input/output signals in a range {

0

, I

2

} in accordance with an embodiment of the present invention; and

FIG. 2

is a schematic block diagram showing a second exemplary optical sampler built from optical logic gates based upon stable, non-absorbing optical hard limiters for use with input/output signals in a range {

0

, I

1

} in accordance with an embodiment of the present invention.

DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT

In an embodiment of the present invention, an optical sampler stores an optical signal in the optical state. The optical sampler is based on stable, non-absorbing optical hard limiters. An exemplary stable, non-absorbing optical hard limiter is described in the related application entitled OPTICAL LIMITER BASED ON NONLINEAR REFRACTION, which was incorporated by reference above. Various optical logic devices based on stable, non-absorbing optical hard limiters that may be used as components of the optical sampler are described in the related application entitled OPTICAL LOGIC DEVICES USING STABLE, NON-ABSORBING OPTICAL HARD LIMITERS, which was incorporated by reference above.

An exemplary optical sampler is described. The exemplary optical sampler has a layout similar to an electronic D-type flip-flop and works in a similar manner, although it should be noted that the signals processed by the optical sampler are optical signals that are reduced by approximately one half when split. As with a typical D-type flip-flop, an optical input signal is sampled (latched) based upon a clock signal. The sampled optical input signal is stored by placing the sampled optical input signal in an optical feedback loop. The optical feedback loop provides appropriate amplification/regeneration of the sampled optical input signal. The sampled and stored optical input signal is used to generate an output signal equal to the optical input signal. Once the optical input signal is sampled, the output signal is latched to the optical input signal, and does not change until a new optical input signal is sampled regardless of the state of the optical input signal.

FIG. 1

is a conceptual schematic block diagram showing an exemplary optical sampler

100

built from various optical logic gates described in the related application entitled OPTICAL LOGIC DEVICES USING STABLE, NON-ABSORBING OPTICAL HARD LIMITERS, which was incorporated by reference above. It should be noted that all input, output, and intermediate signals are optical. In this embodiment, input and output signals are in the range {

0

, I

2

}. It should also be noted that certain optical signals are split into two branches, which reduces the signal strength by approximately one half on each branch. Therefore, some intermediate signals are in the range {

0

, I

2

}, while other intermediate signals are in the range {

0

, I

1

}. For convenience, signals in the range {

0

, I

1

} are denoted by a number

1

, while signals in the range {

0

, I

2

} are denoted by a number

2

. The direction of photon propagation is indicated with arrows.

The optical sampler

100

includes, among other things, optical gain element

110

, optical gain element

120

, optical NOT gate

130

, optical AND gate

140

, optical AND gate

150

, optical OR gate

160

, optical gain element

170

, and optical gain element

180

. The optical sampler

100

has two inputs, namely a clock signal CLK2 and an input signal X

2

, and one output, namely output signal Y

2

. All input and output signals are in the range {

0

, I

2

}.

The clock signal CLK2 is split into signals A

1

and D

1

.

The signal A

1

is coupled to the input of the optical gain element

110

. The optical gain element

110

converts the signal A

1

in the range {

0

, I

1

} into signal B

2

in the range {

0

, I

2

}. The signal B

2

from the optical gain element

110

is coupled to the input of the optical NOT gate

130

. The signal C

2

from the optical NOT gate

130

is coupled to one input of the optical AND gate

140

.

The signal D

1

is coupled to the input of the optical gain element

120

. The optical gain element

120

converts the signal D

1

in the range {

0

, I

1

} into signal E

2

in the range {

0

, I

2

}. The signal E

2

from the optical gain element

120

is coupled to one input of the optical AND gate

150

, while the input signal X

2

is coupled to the other input of the optical AND gate

150

.

The signal F

2

from the optical AND gate

140

is coupled to one input of the optical OR gate

160

, while the signal G

2

from the optical AND gate

150

is coupled to the other input of the optical OR gate

160

.

The signal H

2

from the optical OR gate

160

is split into signals N

1

and J

1

.

The signal N

1

is coupled to the input of the optical gain element

180

. The optical gain element

180

converts the signal N

1

in the range {

0

, I

1

} into the output signal Y

2

in the range {

0

, I

2

}.

The signal J

1

is coupled to the input of the optical gain element

170

. The optical gain element

170

converts the signal J

1

in the range {

0

, I

1

} into signal K

2

in the range {

0

, I

2

}. The signal K

2

from the optical gain element

170

is coupled to the other input of the optical AND gate

140

.

When the clock signal CLK2 is I

2

(high), the optical AND gate

150

is essentially activated, while the optical AND gate

140

is deactivated. In this state, the optical AND gate

150

feeds the input signal X

2

to the optical OR gate

160

as signal G

2

, while the optical AND gate

140

feeds a zero signal to the optical OR gate

160

as signal F

2

. The optical OR gate

160

in turn outputs signal H

2

equal to the input signal X

2

. The signal H

2

is split into signals I

1

and J

1

. The signal I

1

is amplified by the optical gain element

180

in order to produce the output signal Y

2

equal to the input signal X

2

. The signal J

1

is amplified by the optical gain element

170

to produce looped back signal K

2

equal to the input signal X

2

, which is fed into the optical AND gate

140

.

When the clock signal CLK2 transitions to zero (low), the optical AND gate

150

is essentially deactivated, while the optical AND gate

140

is activated. In this state, the optical AND gate

140

feeds the looped back signal K

2

to the optical OR gate

160

as signal F

2

. The optical OR gate

160

in turn outputs signal H

2

equal to the looped back signal K

2

. The signal H

2

is split into signals I

1

and J

1

. The signal I

1

is amplified by the optical gain element

180

in order to produce the output signal Y

2

equal to the looped back signal K

2

. The signal J

1

is amplified by the optical gain element

170

to reproduce looped back signal K

2

, which is fed into the optical AND gate

140

.

Thus, when the clock signal CLK2 transitions from I

2

(high) to zero (low), the optical input signal X

2

is sampled (latched) so that the output signal Y

2

is driven to, and remains at, the sampled input signal regardless of the state of the optical input signal X

2

so long as the clock signal CLK2 remains zero (low). The sampled input signal is essentially stored in the feedback loop consisting of the optical AND gate

140

, the signal F

2

, the optical OR gate

160

, the signal H

2

, the signal J

1

, the optical gain element

170

, and the signal K

2

.

It should be noted that, in the described embodiment, there is an inherent delay in the feedback loop that eliminates the need for falling/rising edge triggers that are needed in a traditional electronic D-type flip-flop. Without this inherent delay, simultaneous high-to-low transitions on both the clock signal CLK2 and the input signal X

2

would generally cause a glitch on the output signal Y

2

. By eliminating the falling/rising edge triggers, this inherent delay greatly simplifies the optical sampler

100

. It should be noted, however, that appropriate falling/rising edge triggers can be added to a particular optical sampler embodiment if there is an unsufficient amount of inherent delay in its feedback loop.

FIG. 2

is a conceptual schematic block diagram showing an exemplary optical sampler

200

built from various optical logic gates described in the related application entitled OPTICAL LOGIC DEVICES USING STABLE, NON-ABSORBING OPTICAL HARD LIMITERS, which was incorporated by reference above. It should be noted that all input, output, and intermediate signals are optical. In this embodiment, input and output signals are in the range {

0

, I

1

}. It should also be noted that certain optical signals are split into two branches, which reduces the signal strength by approximately one half on each branch. Therefore, some intermediate signals are in the range {

0

, I

2

}, while other intermediate signals are in the range {

0

, I

1

}. For convenience, signals in the range to, {

0

, I

1

} are denoted by a number

1

, while signals in the range {

0

, I

2

} are denoted by a number

2

. The direction of photon propagation is indicated with arrows.

The optical sampler

200

includes, among other things, optical gain element

110

, optical gain element

120

, optical NOT gate

130

, optical AND gate

140

, optical AND gate

150

, optical OR gate

160

, optical gain element

170

, optical gain element

210

, and optical gain element

220

. The optical sampler

200

has two inputs, namely a clock signal CLK1 and an input signal X

1

, and one output, namely output signal Y

1

. All input and output signals are in the range {

0

, I

1

}.

The clock signal CLK1 is coupled to the input of the optical gain element

210

. The optical gain element

210

converts the signal CLK1 in the range {

0

, I

1

} into signal L

2

in the range {

0

, I

2

}. The signal L

2

is split into signals A

1

and D

1

.

The signal A

1

is coupled to the input of the optical gain element

110

. The optical gain element

110

converts the signal A

1

in the range {

0

, I

1

} into signal B

2

in the range {

0

, I

2

}. The signal B

2

from the optical gain element

110

is coupled to the input of the optical NOT gate

130

. The signal C

2

from the optical NOT gate

130

is coupled to one input of the optical AND gate

140

.

The signal D

1

is coupled to the input of the optical gain element

120

. The optical gain element

120

converts the signal D

1

in the range {

0

, I

1

} into signal E

2

in the range {

0

, I

2

}. The signal E

2

from the optical gain element

120

is coupled to one input of the optical AND gate

150

.

The input signal X

1

is coupled to the input of the optical gain element

220

. The optical gain element

220

converts the input signal X

1

in the range {

0

, I

1

} into signal M

2

in the range {

0

, I

2

}. The signal M

2

is coupled to the other input of the optical AND gate

150

.

The signal F

2

from the optical AND gate

140

is coupled to one input of the optical OR gate

160

, while the signal G

2

from the optical AND gate

150

is coupled to the other input of the optical OR gate

160

.

The signal H

2

from the optical OR gate

160

is split into output signal Y

1

and signal J

1

.

The signal J

1

is coupled to the input of the optical gain element

170

. The optical gain element

170

converts the signal J

1

in the range {

0

, I

1

} into signal K

2

in the range {

0

, I

2

}. The signal K

2

from the optical gain element

170

is coupled to the other input of the optical AND gate

140

.

When the clock signal CLK1 is I

1

, the optical AND gate

150

is essentially activated, while the optical AND gate

140

is deactivated. In this state, the optical AND gate

150

feeds the signal M

2

to the optical OR gate

160

as signal G

2

, while the optical AND gate

140

feeds a zero signal to the optical OR gate

160

as signal F

2

. The optical OR gate

160

in turn outputs signal H

2

equal to the signal M

2

. The signal H

2

is split into output signal Y

1

and signal J

1

. The signal J

1

is amplified by the optical gain element

170

to produce looped back signal K

2

equal to the signal M

2

, which is fed into the optical AND gate

140

.

When the clock signal CLK1 transitions to zero, the optical AND gate

150

is essentially deactivated, while the optical AND gate

140

is activated. In this state, the optical AND gate

140

feeds the looped back signal K

2

to the optical OR gate

160

as signal F

2

. The optical OR gate

160

in turn outputs signal H

2

equal to the looped back signal K

2

. The signal H

2

is split into output signal Y

1

and signal J

1

. The signal J

1

is amplified by the optical gain element

170

to reproduce looped back signal K

2

, which is fed into the optical AND gate

140

.

Thus, when the clock signal CLK1 transitions from I

1

to zero, the optical input signal X

1

is sampled (latched) so that the output signal Y

1

is driven to, and remains at, the sampled input signal regardless of the state of the optical input signal X

1

so long as the clock signal CLK1 remains zero. The sampled input signal is essentially stored in the feedback loop consisting of the optical AND gate

140

, the signal F

2

, the optical OR gate

160

, the signal H

2

, the signal J

1

, the optical gain element

170

, and the signal K

2

.

It should be noted that, in the described embodiment, there is an inherent delay in the feedback loop that eliminates the need for falling/rising edge triggers that are needed in a traditional electronic D-type flip-flop. Without this inherent delay, simultaneous I

1

-to-zero transitions on both the clock signal CLK1 and the input signal X

1

would generally cause a glitch on the output signal Y

1

. By eliminating the falling/rising edge triggers, this inherent delay greatly simplifies the optical sampler

200

. It should be noted, however, that appropriate falling/rising edge triggers can be added to a particular optical sampler embodiment if there is an unsufficient amount of inherent delay in its feedback loop.

Additional considerations are discussed in E. V. Johnson, ALL-OPTICAL SIGNAL PROCESSING AND PACKET FORWARDING USING NONMONOTONIC INTENSITY TRANSFER CHARACTERISTICS, a thesis submitted in conformity with the requirements for the degree of Master of Applied Science, Graduate Department of Electrical and Computer Engineering, University of Toronto (2001), which is hereby incorporated herein by reference in its entirety.

The present invention may be embodied in other specific forms without departing from the true scope of the invention. The described embodiments are to be considered in all respects only as illustrative and not restrictive.