Semiconductor device
专利汇可以提供Semiconductor device专利检索，专利查询，专利分析的服务。并且PURPOSE: To reduce wiring capacitance through a simple method by forming a shallow groove, an upper section thereof is coated with an insulating film, between deep narrow grooves for isolating an element, the surfaces thereof are coated with dielectrics.
CONSTITUTION: A buried collector layer 2 and an active layer 3 are superposed on the (100) face of an Si substrate 1, an Si
3 N
4 mask 5 is executed to the SiO
2 film 4 of the surface and windows 6, 8 are bored, and window width is made narrower than depth. The vertical grooves 9 are formed through reactive sputtering etching, SiO
2 4 is removed selectively, and the groove 10 shallower than the layer 2 and grooves 11 deeper than that are formed through second etching. The surface is coated with SiO
2 12, the film 5 is removed, and poly Si 14 is deposited through novel Si
3 N
4 13 to fill the grooves. The layer 14 is removed through isotropic etching, Si
3 N
4 13 is exposed, and SiO
2 15 is formed to the surface of the poly Si 14 and coated with Si
3 N
4 16. A transistor is manufactured through a predetermined method. In a bipolar device by the constitution, wiring capacitance is reduced because there are thick oxide films 12, 15 in an isolation region, and a circuit is accelerated by approximately 50%.
COPYRIGHT: (C)1984,JPO&Japio，下面是Semiconductor device专利的具体信息内容。
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|---|---|---|
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| 一种CMOS图像传感器结构及制造方法 | 2020-05-08 | 121 |
| 一种单光子雪崩二极管及其制备方法 | 2020-05-08 | 1018 |
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