Read only memory control circuit
专利汇可以提供Read only memory control circuit专利检索，专利查询，专利分析的服务。并且PURPOSE: To reduce energy consumption in a command decoder circuit, a clock generating circuit, etc., by providing a chip selecting terminal at an ROM, selectively impressing a selecting signal, and operating the ROM only at the time of an impression.
CONSTITUTION: The command decoder circuit consists of an ROM 1, a chip selecting terminal 2 to be a chip enable terminal, an input terminal line 3, an inverter 4 provided between the terminal 2 and the terminal line 3, and a latch circuit 5 provided between the terminal 2 and the ROM 1 and composed of FFs. In such a constitution, a command instructing signal from a processor and a circumferential circuit, which are not shown in a figure, is impressed to the input terminal line 3, made into the input signal of the inverter 4, and an interted signal from here is applied to the selecting terminal 2 and the latch circuit 5. Thus, the chip of the ROM 1 is selected, the address signal at 8 bits to be a command input is inserted into the ROM 1, and data corresponding to it are latched by a reading circuit 5, and a control signal is outputted from here.
COPYRIGHT: (C)1989,JPO&Japio，下面是Read only memory control circuit专利的具体信息内容。
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