A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Preferred fabrication techniques include stacking multiple FETs to form switching devices. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.

A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Preferred fabrication techniques include stacking multiple FETs to form switching devices. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.

As in a conventional technology, a hard clipping process (10) and a filtering process (11) are performed on a transmission signal. An original transmission signal is subtracted (14) from a signal on which the processes have been performed, and an inverse sign signal to the suppressed signal is retrieved. By giving a gain (15) to the signal, and adding up (16) to the original transmission signal, a peak voltage is suppressed. The gain can be a ratio of a difference signal between a hard clipped signal and an original transmission signal to a signal of suppression of a filtered signal from the original transmission signal, or a value determined by a simulation depending on the cutoff frequency of a low pass filter used in the filtering process.

A radio frequency (RF) receiver system includes an antenna element, a receiver circuit, and an RF signal path connecting the antenna element to the receiver circuit. A limiter may be connected to the RF signal path and include a positive voltage clamp for clamping the RF signal path to a positive threshold voltage relative to a voltage reference, and a negative voltage clamp for clamping the RF signal path to a negative threshold voltage relative to the voltage reference. The limiter may further include a controllable resistance connected in series with the RF signal path. A control circuit controls the controllable resistance based upon at least one of the positive voltage clamp and the negative voltage clamp.

In the portable telephone of the present invention, a transmission power upper limit value (STEPLIM) in accordance with temperature (T) is found (S1, S2), whether the transmission power set value (STEPn) of the next slot exceeds the upper limit (STEPLIM) or not is determined (S3, S4), and when it does not exceed, a control signal value (Vc) in accordance with the transmission power set value (STEPn) is applied to a variable gain block (11, 13) (S5, S7). When it exceeds the upper limit, a control signal value (Vc) in accordance with the transmission power upper limit value (STEPLIM) is applied to the variable gain block (11, 13) (S6, S7).

In the portable telephone of the present invention, a transmission power upper limit value (STEPLIM) in accordance with temperature (T) is found (S1, S2), whether the transmission power set value (STEPn) of the next slot exceeds the upper limit (STEPLIM) or not is determined (S3, S4), and when it does not exceed, a control signal value (Vc) in accordance with the transmission power set value (STEPn) is applied to a variable gain block (11, 13) (S5, S7). When it exceeds the upper limit, a control signal value (Vc) in accordance with the transmission power upper limit value (STEPLIM) is applied to the variable gain block (11, 13) (S6, S7).

An impedance blocking filter circuit is provided for use in telecommunication systems for interconnecting between incoming telephone lines and customer's terminal equipment so as to unconditionally block impedances above 20 KHz due to the customer's terminal equipment from an ADSL network unit and/or home networking interface unit. The filter circuit includes first, second, and third inductors (L5,L3,L1) connected in series between a first input terminal (66) and a first common point (A). A first resistor (R1) has its one end connected also to the first common point and its other end connected to a first output terminal (70). Fourth, fifth and sixth inductors (L6.L4,L2) are connected in series between a second input terminal (68) and a second common point (B). A second resistor (R2) has its one end also connected to the second common point and its other end connected to a second output terminal (72). A capacitor (C1) has its ends connected across the first and second common points. In other aspects, the filter circuit also includes switching means (K1,K2) for eliminating shunt additive capacitance, correction circuit means (TC1,TC2) reducing significantly return loss, and switch suppression circuit means (74) for eliminating transients.

A limiting method is provided which limits signals having two components I channel and Q channel on two orthogonal coordinate axes within a predetermined range on the coordinate plane specified by the two coordinate axes, wherein the predetermined range is defined by concentric circles having the origin of the two coordinate axes as a center.