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序号 专利名 申请号 申请日 公开(公告)号 公开(公告)日 发明人
21 増幅回路 JP2015536559 2014-09-05 JPWO2015037532A1 2017-03-02 潔 篠井; 陽 浅尾
【課題】負帰還によるゲインの設定に影響を受けることなく高い入インピーダンスを保てるとともに、入力段のトランジスタに起因するノイズを低減できる増幅回路を提供する。【解決手段】差動対10の一対のゲートに差動信号が入力され、差動対10のドレインに接続される負荷回路20に発生した差動信号が差動増幅段60において増幅され、その増幅された差動信号が帰還回路40を介して差動対10の一対のソースに帰還される。差動対10の一対のゲートにおいて増幅回路の負帰還のゲインに影響を受けることなく高い入力インピーダンスを保つことができるとともに、差動対10の2個の第1トランジスタQ1及び第2トランジスタQ2によって入力段の増幅を行うことができるため、従来に比べて入力段のトランジスタの数を減らし、フリッカノイズを低減できる。【選択図】図1
22 改善されたノイズ低減を備えた増幅器 JP2014519041 2012-06-28 JP5792383B2 2015-10-14 ダナセカラン、ビジャヤクマー
23 Semiconductor device JP2007137127 2007-05-23 JP5369388B2 2013-12-18 晃 井上; 清毅 後藤; 康 金谷; 伸介 渡辺
A current limiting circuit is connected to the gate (input terminal) of an amplifying transistor. The current limiting circuit includes a protecting transistor, a first protecting resistor connecting the drain to the gate of the protecting transistor, and a second protecting resistor connecting the source to the gate of the protecting transistor. The current limiting circuit limits current, so that electric power larger than the maximum electric power allowable for the amplifying transistor does not pass.
24 Variable gain amplifier JP2005346282 2005-11-30 JP2007158380A 2007-06-21 MIYAZAKI TAKAHITO; KOJIMA ITSUKI
PROBLEM TO BE SOLVED: To provide a variable gain amplifier that cannot be subjected to disturbances and interferences from other circuit blocks, such as carrier leakage, easily even if composing a plurality of circuits on the same semiconductor substrate, and has small variations in output impedance. SOLUTION: In the variable gain amplifier 122, a transistor 101 for signal amplification has a dedicated pad 110 for grounding to which no other circuit blocks are connected, and the grounding terminal of an output impedance correction circuit 116 is connected to the dedicated pad 110 for grounding, thus achieving the variable gain amplifier that cannot be subjected to other disturbances and interferences, such as carrier leakage, easily, and has small variations in the output impedance. COPYRIGHT: (C)2007,JPO&INPIT
25 増幅回路 JP2015536559 2014-09-05 JP6194004B2 2017-09-06 篠井 潔; 浅尾 陽
26 改善されたノイズ低減を備えた増幅器 JP2015155258 2015-08-05 JP2016007018A 2016-01-14 ビジャヤクマー・ダナセカラン
【課題】ポップノイズ低減を備えた増幅器を提供する。
【解決手段】増幅器100は、主出端子112において、増幅された信号を出力するように構成された主出力段106と、二次出力端子116において、増幅された信号のコピーを出力するように構成された二次出力段108と、主出力端子においてクリック及びポップノイズを低減させるために、二次出力端子と主出力端子との間に可変抵抗結合を提供するように構成された信号結合器118とを含む。
【選択図】図1
27 Multi-band radio and semiconductor integrated circuit JP2006310596 2006-11-16 JP4641021B2 2011-03-02 正純 利根; 勇作 勝部; 聡 安達; 由一 杉山; 高木  卓
28 Multiband radio device and semiconductor integrated circuit JP2006310596 2006-11-16 JP2008131098A 2008-06-05 SUGIYAMA YOSHIICHI; ADACHI SATOSHI; KATSUBE YUSAKU; TONE MASAZUMI; TAKAGI TAKU
PROBLEM TO BE SOLVED: To obtain a multiband and multimode radio device using a frequency band of 800 MHz to 10 GHz without increasing the circuit scale nor the cost. SOLUTION: When the radio device is switched from a 800 MHz-band mobile phone system to a 9 GHz-band UWB communication system, a reactance element determined to match a load Z of a high-pass filter is connected to a transmission power amplifier output terminal in response to a signal for switching between the high-pass filter and a low-pass filter. COPYRIGHT: (C)2008,JPO&INPIT
29 Magnetic head driving circuit and magnetic recording/reproducing device, and reproduction head protecting method JP2004309045 2004-10-25 JP2006120269A 2006-05-11 HOKUTO SHINGO; OKAMOTO YUJIRO
PROBLEM TO BE SOLVED: To protect a reproduction head without affecting a circuit operation in a magnetic recording/reproducing device. SOLUTION: The magnetic recording/reproducing device 100 which is a hard disk drive for writing information into a magnetic disk not shown in the figure or for reading out the information therefrom, includes the reproduction head 10, a recording head 12 and a magnetic head driving circuit 200. The magnetic head driving circuit 200 is arranged for controlling to drive the reproduction head 10 and the recording head 12, and in this magnetic head driving circuit 200, the reproduction head 10, a recording head driving circuit 16, a control section 18 and a variable impedance element 20 are unitedly integrated. This magnetic head driving circuit 200 is changed over in a time sharing manner to a read mode at the reproducing operation and to a write mode at the recording operation. By the control section 18, the impedance of the variable impedance element 20 is lowered at the write mode. COPYRIGHT: (C)2006,JPO&NCIPI
30 동적으로 바이어스되는 기저대역 전류 증폭기를 위한 장치 및 방법 KR1020150126426 2015-09-07 KR1020160031416A 2016-03-22 세스,시다스; 손상원; 권대현; 베누고팔란,스리람쿠마르; 조,토마스
본발명은동적으로바이어스되는기저대역전류증폭기에관한것이다. 본발명의동적으로바이어스되는기저대역전류증폭기는양의출력및 음의출력을갖는입력인터페이스, 출력버스를갖는제어기, 제1 입력, 제2 입력, 제어입력, 양의출력및 음의출력을갖는가변저항네트워크, 제1 입력, 제2 입력, 제3 입력, 제1 출력, 그리고제2 출력을갖는증폭기스테이지, 제1 입력, 제2 입력, 제3 입력, 그리고출력을갖는하이브리드차동포락선검출기및 전파정류기, 입력, 제1 출력및 제2 출력을갖는트랜스컨덕터, 제1 입력, 제2 입력, 그리고제3 입력을갖는제1 가변트랜지스터, 제1 입력, 제2 입력, 그리고제3 입력을갖는제2 가변트랜지스터, 제1 입력, 제2 입력, 그리고제3 입력을갖는제3 가변트랜지스터, 그리고제1 입력, 제2 입력, 그리고제3 입력을갖는제4 가변트랜지스터를포함한다.
31 POWER AMPLIFICATION MODULE US15995202 2018-06-01 US20180287571A1 2018-10-04 Shigeki KOYA
A power amplification module includes: an amplifier that amplifies an input signal and outputs an amplified signal; and a harmonic-termination circuit to which harmonics of the amplified signal are input and the impedance of which is controlled in accordance with the frequency of a harmonic. The power amplification module can operate in a first mode in which a power supply voltage changes in accordance with the average voltage value of the amplified signal over a prescribed time period or in a second mode in which the power supply voltage changes in accordance with the envelope of the input signal. The impedance of the harmonic-termination circuit is controlled such that at least one even-ordered harmonic is short-circuited when the power amplification module operates in the first mode and at least one odd-ordered harmonic of third order or higher is short-circuited when the power amplification module operates in the second mode.
32 Apparatus and method for dynamically biased baseband current amplifier US15419668 2017-01-30 US10008984B2 2018-06-26 Siddharth Seth; Sang Won Son; Dae Hyun Kwon; Sriramkumar Venugopalan; Thomas Cho
An amplifier circuit is provided. The amplifier circuit includes an amplifier stage; a plurality of variable transistors connected to the amplifier stage; a transconductor connected to at least one of the plurality of variable transistors; and a hybrid differential envelope detector and full-wave rectifier connected to the transconductor.
33 Circuit and Method for a High Common Mode Rejection Amplifier by Using a Digitally Controlled Gain Trim Circuit US15201941 2016-07-05 US20180097490A1 2018-04-05 Zakaria Mengad; Steven Collins; Vladislav Vasilev
An amplifier comprising a differential amplifier configured to be provide a comparator function, and a gain trimming circuit is electrically configured to provide gain trimming using a T-network comprising a varistor element. In addition, a method of trimming the gain of a differential amplifier, comprising the steps of a first step, (a) providing the differential amplifier comprising resistors in both of its paths, a second step, (b) providing a varistor in a T-network between both said paths; and lastly, a third step, (c) trimming the gain of the differential amplifier by adjusting the varistor's resistance.
34 MINIMIZING STARTUP TRANSIENTS IN AN AUDIO PLAYBACK PATH US15195626 2016-06-28 US20170374456A1 2017-12-28 Tejasvi DAS; Anand ILANGO
A method may be provided for powering up or down a playback path comprising a digital-to-analog converter (DAC) for generating a non-ground-centered analog intermediate voltage centered at a common-mode voltage and coupled to a driver for generating a ground-centered playback path output voltage at an output of the driver wherein the output of the driver is clamped via a finite impedance to a ground voltage. The method may include transitioning continuously or in a plurality of discrete steps the analog intermediate voltage from an initial voltage to the common-mode voltage such that the transitioning is substantially inaudible at the output of the driver. A method for operating an output clamp of an output driver stage of a playback path may include transitioning continuously or in a plurality of discrete steps an impedance of the output clamp in order to match an output offset of the output driver stage in order to minimize audio artifacts appearing at an output of the output driver stage.
35 POWER AMPLIFICATION MODULE US15413763 2017-01-24 US20170310287A1 2017-10-26 Shigeki KOYA
A power amplification module includes: an amplifier that amplifies an input signal and outputs an amplified signal; and a harmonic-termination circuit to which harmonics of the amplified signal are input and the impedance of which is controlled in accordance with the frequency of a harmonic. The power amplification module can operate in a first mode in which a power supply voltage changes in accordance with the average voltage value of the amplified signal over a prescribed time period or in a second mode in which the power supply voltage changes in accordance with the envelope of the input signal. The impedance of the harmonic-termination circuit is controlled such that at least one even-ordered harmonic is short-circuited when the power amplification module operates in the first mode and at least one odd-ordered harmonic of third order or higher is short-circuited when the power amplification module operates in the second mode.
36 APPARATUS AND METHOD FOR DYNAMICALLY BIASED BASEBAND CURRENT AMPLIFIER US15419668 2017-01-30 US20170141737A1 2017-05-18 Siddharth Seth; Sang Won SON; Dae Hyun KWON; Sriramkumar VENUGOPALAN; Thomas CHO
An amplifier circuit is provided. The amplifier circuit includes an amplifier stage; a plurality of variable transistors connected to the amplifier stage; a transconductor connected to at least one of the plurality of variable transistors; and a hybrid differential envelope detector and full-wave rectifier connected to the transconductor.
37 Apparatus and method for dynamically biased baseband current amplifier US14819088 2015-08-05 US09559646B2 2017-01-31 Siddharth Seth; Sang Won Son; Dae Hyun Kwon; Sriramkumar Venugopalan; Thomas Cho
A dynamically biased baseband current amplifier is provided. The dynamically biased baseband current amplifier includes an input interface; a controller; a variable resistor network; an amplifier stage; a hybrid differential envelope detector and full-wave rectifier; a transconductor; a first variable transistor; a second variable transistor; a third variable transistor; and a fourth variable transistor.
38 APPARATUS AND METHOD FOR DYNAMICALLY BIASED BASEBAND CURRENT AMPLIFIER US14819088 2015-08-05 US20160072447A1 2016-03-10 Siddharth SETH; Sang Won SON; Dae Hyun KWON; Sriramkumar VENUGOPALAN; Thomas CHO
A dynamically biased baseband current amplifier is provided. The dynamically biased baseband current amplifier includes an input interface; a controller; a variable resistor network; an amplifier stage; a hybrid differential envelope detector and full-wave rectifier; a transconductor; a first variable transistor; a second variable transistor; a third variable transistor; and a fourth variable transistor.
39 Temperature compensation circuit and electronic device with temperature compensation US13889735 2013-05-08 US08922280B2 2014-12-30 Po Wen Hsueh
A temperature compensation circuit is adapted to be used in an electronic device including a processing circuit. The temperature compensation circuit includes a thermistor, a compensation capacitor and a compensation diode. The thermistor has two ends, one of which is adapted to be electrically connected to the processing circuit. The compensation capacitor has two ends, one of which is electrically connected to the other one of the two ends of the thermistor. The compensation diode has an anode electrically connected to the other one of the two ends of the compensation capacitor, and a cathode to be grounded. The impedance of the thermistor varies with temperature so as to compensate and stabilize an output of the electronic device.
40 AMPLIFIER WITH IMPROVED NOISE REDUCTION US13235273 2011-09-16 US20130002348A1 2013-01-03 Vijayakumar Dhanasekaran
An amplifier with improved noise reduction is disclosed. In one implementation, an amplifier is provided that includes a main output stage configured to output an amplified signal at a main output terminal, a secondary output stage configured to output a copy of the amplified signal at a secondary output terminal, and a signal coupler configured to provide a variable resistance coupling between the secondary output terminal and the main output terminal to reduce noise at the main output terminal.
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