| Document | Document Title |
|---|---|
| US11363160B2 |
Detachable device, control method thereof, and storage medium
A detachable device that can be attached/detached to/from an electronic apparatus and includes a memory unit: analyzes input data for analysis from the electronic apparatus; divides a processing result obtained by the analysis into a plurality of partial data and store the partial data in a plurality of areas of the memory unit such that addresses are not continuous; determines, based on a parameter included in a read command from the electronic apparatus, whether the read command is a command for reading out the processing result; and if it is determined that the read command is the command for reading out the processing result, reads out the plurality of partial data from the plurality of areas of the memory unit, constructs the partial data to the processing result, and outputs the processing result. |
| US11363156B2 |
Image reading apparatus and image reading control method
An image reading apparatus includes: a reader configured to read an image of a document to be transported; a cleaning section configured to clean a reading surface of the reader, a drive source for performing a cleaning operation of the reading surface by the cleaning section; and a control unit configured to control the drive source, wherein when the control unit detects dirt on the reading surface based on data received from the reader, the control unit controls the drive source to perform the cleaning operation by the cleaning section. |
| US11363155B2 |
Image reading device and image forming apparatus
Provided is an image reading device including: a document pressing portion that is attached to an apparatus body and configured to open or close to the apparatus body to press a document in between; and an opening force applying unit that applies a drive force of a drive source to the document pressing portion as an opening force to open the document pressing portion temporarily in a period of opening the document pressing portion. |
| US11363142B2 |
Techniques for benchmarking performance in a contact center system
Techniques for benchmarking performance in a contact center system are disclosed. In one particular embodiment, the techniques may be realized as a method for benchmarking contact center system performance comprising cycling, by at least one computer processor configured to perform contact center operations, between a first contact-agent pairing strategy and a second contact-agent pairing strategy for pairing contacts with agents in the contact center system; determining an agent-utilization bias in the first contact-agent pairing strategy comprising a difference between a first agent utilization of the first contact-agent pairing strategy and a balanced agent utilization; and determining a relative performance of the second contact-agent pairing strategy compared to the first contact-agent pairing strategy based on the agent-utilization bias in the first contact-agent pairing strategy. |
| US11363139B2 |
Identifying, screening, and blocking of calls from problematic telecommunications carriers and number blocks
A method and systems for identifying communicators as wanted or unwanted based on communications from such communicators, the method comprising determining communications from phone numbers as being unwanted by analyzing communication content features of communications associated with unwanted communicators, identifying telecommunications carriers that acquired the phone numbers, computing scores for the telecommunications carriers based on an amount of the determined unwanted communications from the phone numbers are unwanted, intercepting an inbound communication from a given phone number, identifying the given phone number is associated with a given one of the telecommunications carriers, and configuring handling of communications from the phone number based on a score of the given telecommunications carrier. |
| US11363138B2 |
Fraud detection system and method
A method, computer program product, and computing system for receiving input information concerning a conversation between a caller and a recipient; processing the input information to assess a fraud-threat-level; defining a targeted response based, at least in part, upon the fraud-threat-level assessed, wherein the targeted response is intended to refine the assessed fraud-threat-level; and effectuating the targeted response. |
| US11363135B2 |
System and method for communicating with inmates in a privileged communication
A system and method for with an inmate in a privileged communication are disclosed. a communication system includes a portal subsystem that determines whether a communication should be monitored, or not, based on received information, including access information, from a first communication device. Based on the determination, the communication system bypasses a monitoring subsystem and stores and/or transmits the communication to a second communication device by way of a non-monitoring subsystem. |
| US11363129B2 |
Method and apparatus for processing contact information using a wireless terminal
A method for processing contact information includes displaying a list of contacts on a display of a wireless terminal, determining a first contact from the list of contacts in response to a selection of a user, obtaining a web log address and an online shop address of the first contact, obtaining, from a network service, a first content corresponding to the web log address and the online shop address of the first contact, and displaying the first content on a first area of the display, where the first content is dynamically updated. |
| US11363128B2 |
Method and device for audio input routing
A method on a mobile device for processing an audio input is described. A trigger for the audio input is received. At least one parameter is determined for an audio processor based on at least one input characteristic for the audio input. The audio input is routed to the audio processor with the at least one parameter. |
| US11363125B2 |
Systems and methods for increasing reliability for media data distribution
A system and method for increasing reliability for media data distribution using an unreliable protocol within a network of devices is provided. A preemptive packet recovery (PPR) module is provided within a receiver to organize any correctly received payload packets and recover any missing payload packets using a plurality of forward error correction packets. The forward error correction packets include redundant payload data corresponding to the payload packets. If the PPR module is not able to recover a missing payload packet, the PPR module sends a Negative Acknowledgment (NACK) to the provider requesting that the provider resend the missing packet. The system relies on the recovery logic enabled by a packet reconstruction module to recover any missing packets and only requests the resending of missing packets when packets are not recoverable, thus maintaining the increased speed of UDP while increasing the reliability of the data being sent and received. |
| US11363121B2 |
Systems and methods for standardizing field-value pairs across different entities
Methods, systems, and computer-readable storage mediums for standardizing node field-value pairs of node profiles generated using electronic activities across multiple entities are described. In one aspect, the system can access, for a node profile of an entity, data points linked to the node profile. The system may determine a seniority value and a department value using the data points. The system may generate a normalized job title value by combining the seniority value and the department value using a title formatting policy specifying a format in which to combine to the seniority value and the department value. The normalized job title value may identify the seniority and department of entity. The system may store an association between the node profile and the normalized job title value in one or more data structures. |
| US11363116B2 |
Systems and methods for intelligent routing and content placement in information centric networks
A content caching system enables an NDN network to place content closer to each end user(s) and to provide an explicit path for the target end user(s) to that content for better performance just in advance of users' anticipated request(s). The apparatus includes NDN routers and SDN controller employing a content commander, at least a content placement agent and at least one content analysis agent. |
| US11363115B2 |
Integrated operational communications between computational instances of a remote network management platform
A system may involve a communication bus and computational instances configured for communication with one another by way of the communication bus. The system is configured to: (i) receive, by a first computational instance, a first communication request, wherein the first communication request specifies first attributes; (ii) store, in a first persistent storage, the first attributes; (iii) generate a second communication request that specifies second attributes; (iv) transmit, by the first computational instance and to a second computational instance by way of the communication bus, the second communication request; (v) receive, by the second computational instance, the second communication request; (vi) store, in a second persistent storage, the second attributes; (vii) generate a third communication request that specifies third attributes; and (viii) transmit, by the second computational instance and to a third computational instance by way of the communication bus, the third communication request. |
| US11363113B1 |
Dynamic micro-region formation for service provider network independent edge locations
Techniques for dynamic micro-region formation for service provider network independent edge locations are described. A set of services corresponding to services of the service provider network can be deployed to a separate, customer-managed datacenter. The services may be used privately by the customer or publicly by other users using the same or similar interfaces as are utilized for the services within the service provider network. These deployed independent edge locations can be grouped dynamically based on distance in terms of latency to result in micro-regions that users can use, e.g., to launch compute resources into. |
| US11363112B2 |
High-density multi-tenant distributed cache as a service
A multi-tenant, elastically scalable cache as a service is disclosed. Embodiments of the cache service eliminate the need for applications to manage their own cache tier. The multi-tenant cache service is implemented by maintaining/creating multiple named caches in a cache cluster and mapping each tenant's cache to a named cache in the cluster. Strict quotas are enforced on cache sizes This allows caches with different replication attributes to co-exist on the same cache server, allows migration of a cache from one cluster to another for load balancing purposes, and allows a cache to inflate/deflate to meet business needs. A network load balancer is used to route cache items to servers. |
| US11363107B2 |
Location monitoring via a gateway
A remote location monitoring system, for example, a home monitoring or weather monitoring system may include one or more sensors and/or receivers at a first location such as a residence or business to be monitored. The sensors and receivers may communicate with a remote central server via a gateway device and the detection data received from the sensors and receivers may be displayed via display circuitry coupled to a processor of the gateway device. The sensors, receivers, and gateway device may be controlled by users locally or remotely via the server. Users may register to receive remote notifications of weather events and other home monitoring events. Users may also access remotely sensors and receivers to configure alerts, notifications, and automatic responses for the devices and integrated appliances at the first location. |
| US11363102B2 |
Communication method and apparatus for network accessible only in specific area
This application provides a communication method and an apparatus. The method includes: a terminal determines that a detected application is associated with a first network; determines, based on information configured on the terminal, that the first network is a network accessible only in a specific area; obtains network information for the first network; and in response to when the terminal is within an area indicated by the network information, determine to initiate a session management procedure. |
| US11363101B2 |
Using existing servers in a wellbore environment as data sources for streaming servers
A streaming server can receive a request from a client device to access data about a wellbore environment in a database server. The database server can be communicatively coupled to a server, which can be communicatively coupled to the streaming server. The streaming server can communicate data in a standardized format with the server using a request and response protocol. The streaming server can communicate the wellbore environment data from the database server in a streaming format with the client device. |
| US11363098B2 |
Peer-to-peer connections based on user-defined probability assertions
A method of correlating probability assertions and resource allocations includes receiving a first probability assertion and a first resource allocation from a first client device; receiving a second probability assertion and a second resource allocation from a second client device; correlating the first probability assertion with the second probability assertion by matching characteristics of the first probability assertion with characteristics of the second probability assertion; and creating a peer-to-peer match between the first request on the second request from the client devices. |
| US11363095B1 |
Policy-driven client and destination priority
A method and system for policy-driven traffic management in cloud-based multi-tenant systems is disclosed. Each end user device within each tenant is provided policies to specify priority based upon, for example, end-to-end performance, bandwidth or service capacity, service or link availability, or security. Different routes are provided for each policy. An application can request a route to an Internet service according to the policy to be assigned a route. |
| US11363093B2 |
Multi-stage pipelining for distributed graph processing
Techniques are described herein for evaluating graph processing tasks using a multi-stage pipelining communication mechanism. In a multi-node system comprising a plurality of nodes, each node of said plurality of nodes executes a respective communication agent object. The respective communication agent object comprises: a sender lambda function is configured to perform sending operations and generate source messages based on the sender operations. An intermediate lambda function is configured to read source messages marked for a node, perform intermediate operations based on the source messages and generate intermediate messages based on the intermediate operations. A final receiver lambda function configured to: read intermediate messages marked for said each node, perform final operations based on the intermediate messages and generate a final result based on the final operations. |
| US11363089B2 |
Systems and methods for optimization of transmission of real-time data via network labeling
The present invention relates to systems and methods for network labeling in order to enhance real time data transfers. A network for a real time data transfer is identified and predictive models for network performance are compared against to determine if the network is suitable for the data transfer. If so, then the real time data transfer may be completed as expected. However, if the network is predicted to be unsuitable for transmission an alternate means for connection may be suggested. The alternate suggestion may include delaying the data transfer until the network is expected to be in better conditions, connecting to another access point in the network, or switching to another network entirely. During the data transfer, the quality of the network is monitored in order to update the predictive models for the network's quality. Identifiers for the network may be utilized to keep track of the networks. Network signal strength, signal pollution and time may also be tracked in order to identify patterns in the network's performance. |
| US11363085B2 |
In-band quality data
A method of transmitting data in a media stream in accordance with a media streaming protocol includes generating data of a first type associated with a first type identifier in accordance with the protocol, encapsulating the generated data in a data structure defined by the protocol, the data structure including a type identifier field for specifying a type of data contained within the data structure, setting the type identifier field to a second type identifier different than the first type identifier, forming a packet comprising the first data structure, and transmitting the packet in the media stream. |
| US11363082B2 |
Video conference telepresence controller
A video conference telepresence controller includes a first set of instructions commanding a server to create and maintain a queue structure for clients of a video conference telepresence session, a second set of instructions commanding the server to monitor audio/video feeds of the clients of the video conference telepresence sessions and identify the clients of those feeds, a third set of instructions commanding the server to detect precursor events to a session disturbance or flow interruption in one or more of the monitored feeds and flagging the feeds harboring the events for action, and a fourth set of instructions commanding the server to perform an interruption, redirect, or deletion of the one or more feeds and for providing notification thereof to one or more clients. |
| US11363081B2 |
Method and system for conducting remote communications at a funeral home
A method for conducting remote communications at a funeral home in accordance with one or more aspects of the present disclosure is presented. The method includes providing a first video conference system positioned in a funeral home. A second video conference system is positioned in a vehicle structure remotely located from the funeral home. The vehicle structure is operable to have vehicles driven into and out of the vehicle structure. A communication link is established between the first and second video conference systems. One or more family members are enabled to gather at the funeral home for a funeral service of a loved one. One or more passengers are driven in a first vehicle into the vehicle structure. While the one or more passengers remain in the first vehicle, the one or more passengers and the one or more family members communicate via the communication link. |
| US11363080B1 |
Managed intelligent discovery and mesh connectivity orchestration for collaboration solutions
A method for managing intelligent discovery and mesh connectivity orchestration for collaboration solution sessions. The disclosed method may be information technology decision maker (ITDM) and security compliant while offering a simplified end-user experience to overcome pain points tied to co-located collaboration user experience. The disclosed method may provide time and/or session bound manageability (and security) policies tied to co-located collaboration actions (e.g., hotkey based) and connectivity management. The disclosed method may further offer peer-to-peer (P2P) session management optimization using out-of-band (OOB) capabilities and negotiations for purposes of screen casting, content sharing, etc. The disclosed method moreover initializes mesh connectivity state contingent for P2P sessions, as well as adapts mesh state to real-time changes in participant system and/or connectivity states. |
| US11363077B2 |
Communication session participation using prerecorded messages
The technology disclosed herein enables user participation in a communication session using prerecorded messages. In a particular embodiment, a method includes determining a first context of a first prerecorded message from a user. In real-time during a communication session that exchanges user communications between a plurality of participants, the method includes determining a session context of the user communications and determining that the first context corresponds to the session context preceding a first insertion point in the user communications. The method further includes inserting the first prerecorded message into the user communications at the first insertion point. |
| US11363071B2 |
User interfaces for managing a local network
The present disclosure generally relates to user interfaces for managing a local network using an electronic device, where the electronic device is connected to a router and a plurality of external devices, including a first set of one or more external devices and a second set of one or more external devices, on the local network. The user interfaces enable a user to apply the same network access policy to the first set of one or more external devices and the second set of one or more external devices or to apply different network access policies to the first set of one or more external devices and the second set of one or more external devices, respectively. |
| US11363068B2 |
Method and system for providing a complete traceability of changes incurred in a security policy
A computer-implemented method and a system provide a complete traceability of changes incurred in a security policy corresponding to a resource. A policy tracing engine (PTE) monitors and determines events of interest occurring at the resource. The PTE determines administrator-initiated intent-based changes and dynamic event-based changes incurred in the security policy and assigns a unique policy identifier (UPI) to the security policy. The UPI is a combination of unique identifiers assigned to the intent-based change and the event-based change. The PTE recomputes and stores the security policy and the UP in a policy database. The PTE receives network access information including the UPI from the corresponding resource deployed with the security policy. The PTE generates a traceability report that provides a complete traceability of each policy action performed in a networked environment to a source of each change incurred in the security policy as identified by the UPI. |
| US11363064B2 |
Identifying spam using near-duplicate detection for text and images
Embodiments described herein provide systems, methods, and computer storage media for detecting spam using by comparing hash values of content. In embodiments, hash values are generated based on the type of content and compared to other hash values in storage buckets. The similarity of content is determined by calculating the distance between two hash values and determining whether the distance exceeds a distance index. Counter values associated with hash values in storage are incremented when the distances between hash values exceed the distance index. Spam indications are communicated when the counter values for associated with hash values exceed a count threshold. |
| US11363061B2 |
Runtime detection of injection attacks on web applications via static and dynamic analysis
In one aspect, a method for preventing attacks on a web application server by monitoring and validating the API calls executed by the dynamic language code of web application is provided. The method includes the step of scanning the computer system for web applications and the location of dynamic language code or script files used by the web applications. The method includes the step of parsing all script files to identify API calls, the location of API calls, and arguments used in the API calls and storing them as rules. |
| US11363060B2 |
Email security in a multi-tenant email service
The technology described herein helps improve email security within a multi-tenant email service. In particular, the technology described herein helps make it more difficult for a first tenant of the email service to impersonate a second tenant of the email service by validating the sending domain before the email leaves the multi-tenant email service. In particular, the technology runs a sending-side source validation on an email. If the source validation fails, the email is still sent, but using a source IP address that will cause the email to fail a receiving-side email authentication tests, such as the sender policy framework (SPF) email authentication test. In contrast, if the source validation passes, the email is sent using a source IP address that will cause the email to pass the receiving-side email authentication tests. |
| US11363058B2 |
Detecting execution of modified executable code
A first storage device or first storage disk including first executable instructions that, when executed, cause a processor to at least: in response to determining a variable associated with a memory page that (1) has been loaded into local memory from a second storage device and (2) has been accessed from the local memory, has a first state, identify the memory page as a modified memory page, the memory page including second executable instructions. The first instructions also cause the processor to, in response to determining the second executable instructions of the modified memory page have been changed since a previous analysis of the modified memory page, perform anti-malware analysis of at least a portion of the modified memory page. |
| US11363057B1 |
Computer-based system for analyzing and quantifying cyber threat patterns and methods of use thereof
At least some embodiments are directed to a computer-based cyber-attack frequency tracking system that determines types and frequencies of cyber-attacks. In at least some embodiments, the method of a cyber-attack frequency tracking system may operate a processor in an enterprise computing environment for automatically conducting a process that comprises receiving, a plurality of data values that represent a plurality of cyber-attacks. Determining cyber-attack types, and then determining the frequency of attempts and contacts with assets. After that determining likelihood values. Aggregating these determinations to produce a quantifiable value of a likelihood values of each of the plurality of cyber-attack types. |
| US11363055B2 |
System and methods for dynamic controlled evaluation of cloud service vulnerabilities
Embodiments of the invention are directed to systems, methods, and computer program products for rapid assessment of cloud frameworks to evaluate those considered for use in an enterprise context. The invention may quickly and consistently identify gaps or weaknesses of cloud frameworks or resources, assess the potential negative impact of such gaps or weaknesses, and facilitate the communication of quantifiable data to responsible parties in order to facilitate the implementation of necessary controls or actions. Embodiments of the invention are highly adaptable and dynamic in fashion such that they can be quickly and easily updated based on the changing needs of the enterprise. |
| US11363054B2 |
Apparatus and method for analyzing security vulnerabilities
A method for analyzing vulnerabilities may include: an analysis target URL receiving step of receiving a plurality of analysis target uniform resource locator (URL) addresses extracted from the analysis target server; an identification key setting step of setting respective identification keys corresponding to the plurality of analysis target URL addresses; a vulnerability analyzing step of performing a simulated attack so as to access the external server by the analysis target server by inserting an analysis hypertext transfer protocol (HTTP) request sentence including a URL address of an external server and the identification key into the analysis target URL address; an access record checking step of requesting an access record of the analysis target server to the external server; and a vulnerability extracting step of extracting a vulnerability of the analysis target server by using the identification key included in the access record. |
| US11363053B2 |
Device for managing utilized service
A device 1 for managing utilized services, which serves to manage an external service that is utilized when a user website provided by a user server 14 is accessed, is equipped with a CSP tag generation unit 9 for generating a CSP tag, which is a content security policy tag that allows access only to a prescribed domain and is stipulated by the World Wide Web Consortium. |
| US11363051B2 |
System and method for mitigating cyber security threats by devices using risk factors
A system and method for mitigating cyber security threats by devices using risk factors. The method includes determining a plurality of risk factors for a device based on a plurality of risk behaviors indicated by network activity and information of the device; determining a risk score for the device based on the plurality of risk factors and a plurality of weights, wherein each of the plurality of weights is applied to one of the plurality of risk factors; and performing at least one mitigation action based on the risk score. |
| US11363049B1 |
Information security system and method for anomaly detection in data transmission
A system for anomaly detection in data transmission extracts data features from a data file. The system compares each data feature with a corresponding historical data feature associated with a historical transmission of the data file. The system determines whether the data feature deviates from the corresponding historical data feature. In response to determining that the data feature deviates from the corresponding historical data feature, the system determines that the data feature is associated with an anomaly. The system determines whether more than a threshold percentage of the data features are associated with anomalies. If it is determined that more than the threshold percentage of the data features are associated with anomalies, the system determines whether a transmission channel through which the data file is transmitted has failed. In response to determining that the transmission channel has failed, the system transmits the data file using another transmission channel. |
| US11363047B2 |
Generating investigation timeline displays including activity events and investigation workflow events
Techniques and mechanisms are disclosed that enable network security analysts and other users to efficiently conduct network security investigations and to produce useful representations of investigation results. As used herein, a network security investigation generally refers to an analysis by an analyst (or team of analysts) of one or more detected network events that may pose internal and/or external threats to a computer network under management. A network security application provides various interfaces that enable users to create investigation timelines, where the investigation timelines display a collection of events related to a particular network security investigation. A network security application further provides functionality to monitor and log user interactions with the network security application, where particular logged user interactions may also be added to one or more investigation timelines. |
| US11363046B2 |
Network operation application monitoring
Systems and methods that determine an anomaly in a network are provided. A monitoring engine is installed on a computing device that monitors network information and application information for data flows generated on the computing device and transmitted over a network and for data flows received by the computing device from the network. The network information includes an internet protocol (IP) source address, a source port, an IP destination address, a destination port, and a transport protocol, and a number of bytes sent or received by the flow. The application information includes a process identifier (ID), the threads ID, an application ID and/or a function call, arguments passed to the function, a stack trace of the function, etc., that application used to generate the data flows. The network information and application information can be used to identify the application, thread and/or a function that caused an anomaly in the network. |
| US11363043B2 |
Threat mitigation system and method
A computer-implemented method, computer program product and computing system for: receiving platform information from a plurality of security-relevant subsystems; processing the platform information to generate processed platform information; identifying more threat-pertinent content included within the processed content; and routing the more threat-pertinent content to a threat analysis engine. |
| US11363041B2 |
Protecting computer assets from malicious attacks
A method selectively installs a particular signature on a particular gateway based on the type of signature and the type of computer asset that is protected by that particular gateway. A system and/or analyst receives multiple signatures, where different signatures from the multiple signatures are specific for different types of computer assets. The system and/or analyst identifies and extracts a particular signature, from the multiple signatures, that will protect, if implemented on the appropriate gateway, a particular computer asset. The system and/or analyst identifies the appropriate gateway that protects the particular computer asset, and installs only the extracted particular signature from the multiple signatures on that appropriate gateway. |
| US11363035B2 |
Configurable robustness agent in a plant security system
A communications network security system includes a robustness agent that operates within a communications interface of a device at one or more nodes of the network to analyze and filter messages coming from or going onto the network. At each of the nodes, the robustness agent determines one or more sets of message characteristics associated with each of the messages passing through the agent, and the agent is configured to allow certain types of messages (e.g., messages with certain predetermined sets of characteristics) to be passed through the agent, prevent messages with other predetermined characteristics from being passed through the agent, such as by halting (discarding or filtering) these messages, and/or passes still other messages having other sets of message characteristics to a volume filter to be counted. The volume filter counts the number of messages with a particular set of message characteristics and passes these messages if the number of these detected messages over a particular period of time is less than a particular threshold, and filters these messages if the number of counted messages is greater than a particular threshold over a particular period of time. |
| US11363028B2 |
Systems and methods for delegating access to a protected resource
A method for managing access privileges is disclosed. The method includes: obtaining, based on employee data received from a first client server having access to a human resources database of an organization, a first indication identifying a change in a first employee structure of the organization, the first employee structure indicating an employee status associated with each of one or more of the employees; retrieving permissions data defining access privileges associated with one or more employee statuses within the first employee structure for accessing a protected resource; and updating a user permissions database associated with the protected resource to indicate a change in access privileges for at least one employee of the organization based on the first indication and the permissions data, the user permissions database indicating access privileges for employees of the organization that are authorized to access the protected resource. |
| US11363023B2 |
Method, device and system for obtaining local domain name
A method, device and system for obtaining a local domain name are provided. A Dynamic Host Configuration Protocol (DHCP) request from a User Equipment (UE) is received, in which the request carries an option for indicating returning a domain name of a local domain where the UE is located; and the domain name of the local domain where the UE is located is obtained according to the DHCP request, and the domain name of the local domain where the UE is located is carried in a DHCP reply message to be returned to the UE. A device and system for obtaining a local domain name are also provided. |
| US11363022B2 |
Use of DHCP for location information of a user device for automatic traffic forwarding
Systems and methods implemented by an application executed on a user device for service discovery and connectivity include, responsive to joining a new network, performing a Dynamic Host Configuration Protocol (DHCP) operation to obtain network configuration parameters; receiving a DHCP message in response with the network configuration parameters; via an application executed on the user device for service discovery and connectivity analyzing data in the DHCP message to determine one or more forwarding profiles on the new network, wherein the one or more forwarding profiles are based on a location or trust of the new network; and automatically installing the determined one or more forwarding profiles. |
| US11363021B1 |
Proxy service for two-factor authentication
The present disclosure relates to two-factor authentication with a Hardware Security Module (HSM). In response to a login attempt, the HSM indicates that two-factor authentication is required. To generate the second authentication factor, a management console is accessed using credentials. The management console generates the second authentication factor and provides the second authentication factor to the client. The client then provides the second authentication factor to the HSM to complete the two-factor authentication operations. |
| US11363017B2 |
Smart home network security through blockchain
Systems and methods receive a first indication that an Internet of Things (IoT) device is attempting to access a home network; determine that the IoT device is a trusted device; store an identifier associated with the IoT device to a blockchain in response to determining that the IoT device is a trusted device; receive a second indication that an event has occurred with respect to the IoT device; determine whether the event is a major event; and verify the identifier associated with the IoT device by storing an identity and information associated with the event to the blockchain in response to determining that the event is a major event. |
| US11363011B2 |
Unified mobile security system and method of operation
A mobile secure agent on a wireless device executes one or more authenticated data collection profiles provisioned by a private profile producer. Each data package can only be transmitted to a collector certificated by the same private profile producer. Update profiles are signed and provisioned through a tunnel initiated from the mobile secure agent. A Certificate Authority provides libraries, anchors, and certificates in a key management message module to each mobile secure agent which enables revocation and replacement of certificates. Data stored in this way on a wireless device may only be transmitted in encrypted form to an authenticated destination. |
| US11363004B2 |
Secure device relay
Embodiments of the present invention disclose a method, a computer program product, and a computer system for providing a secure device relay between a data collection device and a server using a smart device. The present invention comprises transmitting to a server a unique identifier corresponding to a data collection device and a digital signature corresponding to a smart device. In addition, the present invention provides for receiving from the server a key pair and an exchange configuration defining access control to data stored on the data collection device. Moreover, the present invention includes transmitting to the data collection device a public key of the received key pair and the exchange configuration. |
| US11363002B2 |
Systems and methods for providing a marketplace where data and algorithms can be chosen and interact via encryption
A method includes receiving, on a computer-implemented system and from user, an identification of data and an identification of an algorithm and, based on a user interaction with the computer-implemented system comprising a one-click interaction or a two-click interaction. Without further user input, the method includes dividing the data into a data first subset and a data second subset, dividing the algorithm (or a Boolean logic gate representation of the algorithm) into an algorithm first subset and an algorithm second subset, running, on the computer-implemented system at a first location, the data first subset with the algorithm first subset to yield a first partial result, running, on the computer-implemented system at a second location separate from the first location, the data second subset with the algorithm second subset to yield a second partial result and outputting a combined result based on the first partial result and the second partial result. |
| US11363001B1 |
Rotating internet protocol addresses in a virtual private network
A method for rotating internet protocol (IP) addresses in a virtual private network (VPN), the method comprising receiving, at a first VPN server, a first data request and a second data request during an established VPN connection between a user device and a second VPN server; retrieving, during the established VPN connection, first data associated with the first data request using a first exit IP address; and retrieving, during the established VPN connection, second data associated with the second data request using a second exit IP address, different from the first exit IP address. Various other aspects are contemplated. |
| US11362997B2 |
Real-time policy rule evaluation with multistage processing
A method, apparatus, system, and computer program product evaluate an information asset with a corpus of policies in conjunction with the context of access including a specific user. A large corresponding set of rules in the policy corpus are identified by computer system. A continuous process of rule evaluation occurs against information asset metadata wherein a series of processing including set of common subexpressions between the predicates of all active rules, pre-evaluation, compaction and storage are identified by the computer system in the policy and rule corpus. Metadata for the information asset is applied by the computer system to the set of common subexpressions to form partially evaluated rules for the policy. The partially evaluated rules henceforth compacted are stored by the computer system in association with the information asset. Subsequently the partially evaluated rules are a compressed form of the rule corpus for the policies in the system and hence reduce computer resources and significantly improve the response tome used to evaluate the enforcement decision for the said information asset with the policy in conjunction with the context of access. The process can be repeated each time at least one of the metadata or the policy changes to provide continuous processing of rules to maintain compacted up-to-date partially evaluated rules to enforce the policy. |
| US11362995B2 |
Systems and methods for providing pre-emptive intercept warnings for online privacy or security
Systems and methods for providing pre-emptive intercept warning for online privacy or security are disclosed. In one embodiment, at a privacy security appliance comprising at least one computer processor, a method for may include: (1) establishing a virtual private network (VPN) connection with a computer application executed by a client device; (2) receiving, over the VPN connection, an internet protocol (e.g., HTTP or HTTPS) request for a website host; (3) communicating the internet protocol request to the website host; (4) receiving a response to the internet protocol request from the website host; (5) inspecting the response for privacy or security issues with embedded links in the response; (6) scoring the embedded links based on the inspection; (7) generating a mock webpage based on the response comprising the scoring for the embedded links; and (8) delivering the mock webpage with the scoring to the application over the VPN. The mock webpage may include links to the embedded links. |
| US11362994B2 |
Media flow transport security management
A media flow transport security manager of a hybrid cloud-based media production system having a network orchestrator and an extensible resource manager (ERM) includes a firewall communicatively coupled to a computing platform having a hardware processor and a memory storing a security software code. The hardware processor executes the security software code to communicate with the network orchestrator to identify multicast production media flow(s) for processing in a cloud-based virtual production environment, and to communicate with the ERM to obtain an identifier of each cloud-based resource used for processing cloud production media flow(s) corresponding to the identified multicast production media flow(s). The hardware processor also executes the security software code to receive an alert that the cloud production media flow(s) have been processed to generate corresponding post-production cloud media flow(s), and to route, using the obtained identifier of the cloud-based resource(s), the post-production cloud media flow(s) through the firewall. |
| US11362989B2 |
Rapid duplicate IP address detection for floating IP address crossing multiple cluster broadcast domains
Described is an improved approach to detect conflicts for the assignment of addresses in a computing system. The improved approach implements identification of address conflicts across multiple broadcast domains in a computing system. |
| US11362985B2 |
Address resolution in virtual extensible networks
A network element is provided. The network element includes a tunneling endpoint having a virtual address. The tunneling endpoint is configured to receive an address resolution reply that has a destination MAC (media access control) address matching the virtual address of the tunneling endpoint and is from a network device in a first network that includes the tunneling endpoint. The tunneling endpoint is further configured to send the address resolution reply via an interconnect to a further tunneling endpoint in a further network. A method for address resolution in virtual extensible networks is also provided. |
| US11362981B2 |
System and method for delivering a digital therapeutic from a parsed electronic message
The system and method delivers a digital therapeutic, specific to an emotional or mental state (EMS) parsed from an electronic message, comprising: an electronic computing device communicatively coupled to a processor. The processor further comprising; an EMS store; a message prescriber; a sentiment vector generator comprising: a parsing module; a coordinate-based sentiment value spectrum comprising one positive to negative-scaled axis and one perpendicular active to passive scaled axis forming a two-dimensional plot of a sentiment value along a positive to negative line (positivity correlate) and an active to passive line (activity correlate). The program executable by the processor and configured to: receive a text input comprising message content from the electronic computing device; parse, at the parsing module, the message content comprised in the text input for emotionally charged language, wherein the parsing module further comprises a semantic layer configured to recognize natural language syntax for conversion into a standardized lexicon; based on the emotionally charged language, plot a sentiment value as a point on the coordinate-based sentiment value spectrum for the text input, wherein the plotted point reflects a two-dimensional sentiment value along the two correlates of positivity and activity for said text input. |
| US11362980B2 |
Sending messages to an unavailable device
An apparatus, system, method, and program product are disclosed for sending messages to an unavailable device. The apparatus includes a status module that determines that a recipient device for a message is unavailable to receive the message. The apparatus includes a message module that sends the message to an intermediate device for storage until the recipient device is available to receive the message in response to determining that the recipient device is unavailable to receive the message. The apparatus includes a notification module that sends a notification to the recipient device that the message is available to access from the intermediate device. |
| US11362979B2 |
Displaying messaging interfaces based upon email conversations
One or more computing devices, systems, and/or methods for displaying messaging interfaces based upon email conversations are provided. For example, an email conversation associated with a plurality of user accounts may be identified. Email activity associated with the plurality of user accounts may be monitored. Based upon the email activity, it may be detected that a second plurality of user accounts of the plurality of user accounts are concurrently in an active state. A first device, associated with a first user account of the second plurality of user accounts, may display a first messaging interface comprising a first representation of the email conversation. A second device, associated with a second user account of the second plurality of user accounts, may display a second messaging interface comprising a second representation of the email conversation. |
| US11362974B2 |
Systems and methods for presenting event notifications, based on trending communications, on devices notwithstanding a user instruction to disable event notifications
Systems and methods are provided for generating for presentation information about an event on a device that is in a mode of operation that prevents presentation of information about events. This may be accomplished by a media guidance application that receives a command, on a user device associated with a first user, to place the user device in a do not disturb mode. The media guidance application receives, while the user device is in the do not disturb mode, information about an event and determines whether the event is relevant to the user. The media guidance application then determines whether the event is trending among a plurality of users associated with the user and, if trending, displays, while the user device is in the do not disturb mode, a notification about the event to the user on the user device. |
| US11362970B2 |
Information processing system and information processing method
An information processing system and an information processing method. The information processing system acquires input information input to the user terminal, searches response information for the input information, responds to the user terminal with the response information in response to the input information, determines whether to display a switching reception screen configured to receive a switching operation to perform a chat between the user terminal and the operator terminal, and displays the switching reception screen on the user terminal based on determination result. |
| US11362969B2 |
Efficient packet re-transmission for express data paths
A network packet is received from a network interface card (NIC). A determination is made, in view of a filter specifying handling of network packets, as to whether the network packet is to be modified. In response to determining that the network packet is to be modified, a portion of the network packet is modified in view of the filter. The modified portion of the network packet is provided to the NIC. |
| US11362968B2 |
Technologies for dynamic batch size management
Technologies for dynamically managing a batch size of packets include a network device. The network device is to receive, into a queue, packets from a remote node to be processed by the network device, determine a throughput provided by the network device while the packets are processed, determine whether the determined throughput satisfies a predefined condition, and adjust a batch size of packets in response to a determination that the determined throughput satisfies a predefined condition. The batch size is indicative of a threshold number of queued packets required to be present in the queue before the queued packets in the queue can be processed by the network device. |
| US11362967B2 |
Expansion of packet data within processing pipeline
Some embodiments provide a network forwarding IC with packet processing pipelines, at least one of which includes a parser, a set of match-action stages, and a deparser. The parser is configured to receive a packet and generate a PHV including a first number of data containers storing data for the packet. A first match-action stage is configured to receive the PHV from the parser and expand the PHV to a second, larger number of data containers storing data for the packet. Each of a set of intermediate match-action stage is configured to receive the expanded PHV from a previous stage and provide the expanded PHV to a subsequent stage. A final match-action stage is configured to receive the expanded PHV and reduce the PHV to the first number of data containers. The deparser is configured to receive the reduced PHV from the final match-action stage and reconstruct the packet. |
| US11362965B2 |
System and method for reconfigurable network device
A network device includes a hardware component. The network device includes a first device receiver operably connected to the hardware component via a first hardware component connection and adapted to receive a device. The network device further includes a second device receiver operably connected to the hardware component via a second hardware component connection. The first device receiver of the network device is adapted to reversibly reallocate the first hardware component connection to the second device receiver. |
| US11362956B2 |
Probabilistic service level agreements (SLA)
Regulating transmission of data packets between a first network and a second network over a datalink. Embodiments include determining a first plurality of token bucket rate (TBR) parameters, each TBR parameter corresponding to a one of a first plurality of packet drop precedence (DP) levels and one of a first plurality of timescales (TS). The determination of the first plurality of bucket rate parameters is based on a peak rate requirement, the data link capacity, and a nominal speed requirement associated with the data link. Embodiments also include determining a second plurality of TBR parameters based on the first plurality of TBR parameters and a guaranteed rate requirement, the second plurality comprising a further DP level than the first plurality. Embodiments also include regulating data packets sent between the first network and the second network via the data link based on the second plurality of TBR parameters. |
| US11362955B2 |
Applicability of policies for wireless communication
Certain aspects of the present disclosure provide techniques for selecting policies for routing of data traffic. Certain aspects provide a method for wireless communication by a user-equipment (UE). The method generally includes selecting at least one policy for routing of data traffic to a network, wherein the policy comprise an access network discovery and selection policy (ANDSP) if the UE has the ANDSP provisioned regardless of whether the UE is registered to evolved packet core (EPC) or fifth-generation core network (5GCN), and communicating the data traffic to the network based on the selection. |
| US11362951B2 |
Routing method and apparatus
Embodiments of the present invention provide a routing method and apparatus. A controller receives a path measurement message, determines a path score of each of at least two paths based on a preset rule and the path measurement message. Then the controller determines a routing policy of a first customer-premises equipment based on the path score of each of the at least two paths, and sends the routing policy to the first customer-premises equipment. According to the present invention, path quality of each path can be scored based on the preset rule and the path measurement message obtained after measurement by the first customer-premises equipment; and the routing policy is generated based on path scores and delivered to the first customer-premises equipment, to ensure that customer-premises equipments in an entire network can transmit a data packet sent by a service application more quickly, stably, and securely. |
| US11362950B2 |
Multi-phase IP-flow-based classifier with domain name and HTTP header awareness
An apparatus and method for classifying traffic data in a communication network based on IP flow. Traffic data in a communication network is monitored in order to detect an IP flow. A preliminary classification is assigned to the IP flow based on protocol information contained in its first packet. Subsequent packets within the IP flow are further monitored, and the IP flow is reclassified based, in part, on the domain name of the responding server. Web pages can also be classified, and monitored to determine their response time. |
| US11362941B2 |
Stateless multicast in label switched packet networks
Various example embodiments for supporting stateless multicast in label switched packet networks are presented. Various example embodiments for supporting stateless multicast in label switched packet networks may be configured to support stateless multicast in label switched packet networks based on support for handling a label switched packet associated with a multicast group, where the label switched packet includes a payload and a header and, further, where the header includes a set of labels indicative of a group of egress routers including at least a portion of the egress routers of the multicast group. |
| US11362940B2 |
Method and apparatus for determining identification information about cross-domain path, and storage medium
Provided are a method and apparatus for determining identification information about a cross-domain path, and a storage medium. The method includes: receiving a path computation request from a first child path computation element (PCE), wherein the path computation request carries a compression identifier for identifying compression of path segments and a path set-up type (PST); after identification information about a path from a source node to a destination node is acquired, instructing, according to the compression identifier and the PST, each of sub-PCEs corresponding to the one or more path segments to compress identification information about a respective one of the one or more path segments; and receiving the compressed identification information about each path segment. |
| US11362937B2 |
Location-aware routing for east-west data traffic
Techniques for utilizing Software-Defined Field-Area Network (SD-FAN) controllers to receive a geographic location and transmission power of individual nodes and generate a geographic location topology of a Field-Area Network (FAN) to provide nodes with location-aware route paths for data transmission. One or more SD-FAN controller(s) may maintain a geographic location database to store the geographic location and transmission power of the individual nodes. Each node may utilize a Destination Address Object to advertise its geographic location and transmission power to the SD-FAN controller. The SD-FAN controller(s) may utilize the geographic location table to generate the geographic location topology of the FAN and determine a location-aware route path for optimized data transmission between nodes in the FAN. |
| US11362934B2 |
Method to route packets in a distributed direct interconnect network
The present invention provides a method and apparatus to route data packets across a torus or higher radix topology that has low latency, increased throughput and traffic distribution to avoid hot spots development. Disclosed is a method of routing packets in a distributed direct interconnect network from a source node to a destination node comprising the steps of: discovering all nodes and associated ports; updating the database to include the nodes and ports in the network topology; calculating the shortest path from every output port on each node to every other node in the topology; segmenting each packet into flits at the output port of the source node; as the flits are segmented, distributing said flits along the shortest path from each output port on the source node to the destination node using wormhole switching, whereby the packets are distributed along alternate maximum disjoint routes in the network topology; and re-assembling and re-ordering the packets at the destination node so that the packets accord with their original order/form. |
| US11362930B2 |
System and method for carrying and optimizing internet traffic over a source-selected path routing network
The present application generally relates to a system and method for interfacing a source-selected path routing network with existing legacy IP networks. This interfacing may be achieved by installing specific router devices at the borders of the source-selected path routing network. Said router devices are able to exchange routing information in the form of IP prefix announcements and withdrawals between legacy IP networks and the source-selected path routing network according to an appropriate exterior gateway protocol. Hereby, the source-selected path routing network that in reality comprises a plurality of autonomous systems is conceptually regarded as a single autonomous system. Hence, a legacy IP network that is a direct neighbor of a source-selected path routing network may ensure that traffic destined to it traverses the source-selected path routing network by announcing its routing information only to the source-selected path routing network via an appropriate exterior gateway protocol. |
| US11362926B2 |
Dynamic wireless network selections
Example implementations relate to dynamic wireless network selection. In some examples, a computing device may comprise a processing resource and a memory resource storing machine-readable instructions to determine a computing device is executing a number of applications, classify the number of applications, prioritize the number of applications based on the classification of the number of applications, determine at least one test from a plurality of tests to send to a network based on the prioritization of the applications, perform the at least one test from the plurality of tests, and determine a network adapter of the network to be used by the device based on the at least one test performed. |
| US11362921B2 |
Systems and methods for multiple round trip time (RTT) estimation in wireless networks
Disclosed are techniques for determining round-trip times (RTTs) between a user equipment (UE) and multiple base stations. In an aspect, the UE transmits an RTT measurement signal whose arrival time is measured by each of the base stations, and each of the base stations returns an RTT response signal whose arrival times are measured by the UE. In another aspect, the base stations each transmit an RTT measurement signal and the UE returns an RTT response signal. The receiver of the RTT measurement signal may include the measured arrival time in a payload of the RTT Response signal. Alternatively, the measured arrival time(s) of the RTT Measurement signal(s) and the transmission time(s) of the RTT Response signal(s) are sent in a separate message. The RTT signals can be wideband signals using low reuse resources. |
| US11362917B2 |
Slave, work machine, and log information storage method
There are provided a slave, a work machine, and a method for storing log information, which are capable of appropriately store the log information when a communication abnormality occurs such that communication cannot be kept between a master and the slave in an industrial network. The control section performs first storage processing storing the log information into a volatile storage section when a communication abnormality occurs such that communication with the master cannot be kept, communication abnormality determination processing for determining whether the communication abnormality has occurred, and second storage processing storing the log information into a non-volatile storage section by acquiring the log information from the volatile storage section, in response to a determination made in that the communication abnormality has occurred as a result of the communication abnormality determination processing. |
| US11362912B2 |
Support ticket platform for improving network infrastructures
A support ticket platform improves the provision and maintenance of network infrastructures. A support ticket platform can include a support ticket server and a support ticket database that employ a unique architecture and configuration to provide such improvements in a scalable manner. The support ticket platform can be configured to automatically detect network issues and to leverage its unique architecture and configuration to automatically create support tickets to represent the network issues. The support ticket platform can employ network and company objects to rapidly create a large number of support tickets and to enable management of the support tickets as a group. The support ticket platform can also leverage its unique architecture and configuration to provide a number of additional functions for improving the provision and maintenance of network infrastructures. |
| US11362907B2 |
Systems and methods for characterizing a client device
Techniques are disclosed for passively characterizing a type of host or computing device which may be engaged in a transaction between the host and another computing device. Observation data corresponding to one or more sessions of network traffic between an unclassified host and a second system may be passively generated by a device characterization server. The observation data can be processed by the device characterization server using a machine-learning classifier. The machine-learning classifier can be trained with a set of training data that includes multiple sessions of network traffic from multiple training data hosts. Each session of network traffic includes an exchange of multiple packets in various embodiments, including packets sent from, and packets received by, the training data hosts. Based on the processing, the unclassified host may be characterized by the device characterization server as one of a physical computing device, a virtual machine, or a container. |
| US11362906B2 |
Targeted content selection using a federated learning system
A device may obtain configuration data for a server-side model. The device may generate synthetic usage data based on the configuration data. The device may train the server-side model based on the synthetic usage data. The device may determine update data based on the trained server-side model. The device may provide, to a client device, a message that includes the update data. The message may be configured to cause the client device to train a client-side model based on the update data and historical user data associated with the client device. The device may receive, from the client device, the client-side model data and may select content data based on the client-side model data and the trained server-side model. The device may provide the content data to the client device to permit the client device to provide content that is associated with the content data. |
| US11362904B2 |
Technologies for network discovery
Technologies for enhanced network discovery and configuration include a network with a fabric manager and multiple network devices. A network device requests platform information from a management controller and receives the platform information via a sideband interface. The network device broadcasts a discovery message indicative of the platform information on a link layer network. The fabric manager discovers the network topology with an enhanced link layer discovery protocol and creates a vPOD in the network. The vPOD includes an application network with multiple racks. The fabric manager creates a tagged network domain for the vPOD. The fabric manager sends an out-of-band configuration command to the network device with a tag associated with the vPOD. After receiving the out-of-band configuration command, the network device receives a packet, compares domain metadata of the packet to the tag received from the fabric manager, and routes the packet. Other embodiments are described and claimed. |
| US11362900B2 |
Systems, methods, and storage media for controlling identity information across multiple identity domains in a distributed identity infrastructure
Systems, methods, and storage media for controlling identity information across multiple identity domains in a distributed identity infrastructure are disclosed. Exemplary implementations may: transmit first identity information from a first identity domain to an identity information control system; use the identity information control system to translate the first identity information from the first format to a second format and from the second format to a third format; send the first identity information in the third format from the identity information control system to a second identity domain; and replace second identity information in the second identity domain with the first identity information. |
| US11362899B2 |
System, method, and apparatus to support mixed network communications on a vehicle
An example system includes a vehicle having an Ethernet based network and a controller area network (CAN) based network; a CAN vehicle control device disposed onboard the vehicle and structured to control operation of a component of the vehicle; an Ethernet vehicle control device disposed onboard the vehicle and structured to electrically communicate with the CAN vehicle control device; an Ethernet switch disposed onboard the vehicle and having a plurality of physical ports connected to the Ethernet based network; a CAN gateway disposed onboard the vehicle and connected to the CAN based network and the Ethernet switch; and a network convergence circuit defined at least in part by the Ethernet switch and/or the CAN gateway, and structured to facilitate electronic communications between the Ethernet vehicle control device and the CAN vehicle control device. |
| US11362898B2 |
Network policy configuration
In some examples, a configurator device maps a configuration attribute received from a wireless device to a credential attribute, the credential attribute to be mapped to a network policy. The configurator device sends the credential attribute to the wireless device, the credential attribute useable by the wireless device to access an access point (AP), and useable by the AP to obtain the network policy to apply to a communication of the wireless device. |
| US11362893B2 |
Method and apparatus for configuring a cloud storage software appliance
The embodiments disclosed herein relate to intelligent configuration of a cloud-service gateway based on a pattern recognition algorithm. A machine-learning model is trained to learn the patterns of correlation among many configuration parameters affecting the performance of the system when processing an observed or estimated workload. Training the model may be performed off-line with performance data observed during experiments performed with a variety of configurations and workloads. Once trained, the model may be used to recommend: (a) new configuration parameter values based on constraints of the system being configured, (b) an amount of work that can be performed at a certain performance level when the system is configured with certain parameter values, or (c) the expected performance level when running a certain workload on the system configured with certain configuration parameter values. |
| US11362891B2 |
Selecting and using a cloud-based hardware accelerator
A cloud-based hardware accelerator is selected by deploying an accelerator image to first and second clouds to generate first and second cloud-based hardware accelerators, executing a first request on the first and second cloud-based hardware accelerators, monitoring characteristics of the first and second cloud-based hardware accelerators executing the first request, which may include execution time and monetary cost, and selecting one of the first and second hardware accelerators according to defined selection criteria. Subsequent requests are then routed to the selected cloud-based accelerator. |
| US11362888B2 |
Communication apparatus, communication system, and communication method
A communication apparatus that can communicate with a public communication network by using an in-vehicle communication module permanently installed in a vehicle or one or more external communication modules not installed permanently in the vehicle. The communication apparatus includes: a memory unit configured to store a selection table recording a criterion for selecting a communication module to be used for the communication; and a control unit configured to evaluate a plurality of the communication modules and acquire an evaluation result; and to select a communication module to be used for communication according to the evaluation result and the selection table. |
| US11362883B1 |
Link state tracking for virtual interfaces
Presented herein are methodologies for tracking a link state of a physical network connection and selectively reporting the link state to virtual machines that rely on the physical network connection. A method includes receiving an indication, at a hypervisor, which is running on a host computer and which instantiates a virtual switch, that a physical link interconnecting the host computer to a network has failed; determining that the physical link serves the virtual switch; determining whether link state tracking is enabled for the physical link; and when link state tracking is enabled for the physical link, notifying a virtual machine, which is running on the host computer and which is being served by the virtual switch, that a connection between the virtual machine and the network has failed. |
| US11362881B2 |
Distributed system for self updating agents and provides security
A distributed system includes a client system with a plurality of managed devices. At least one agent is in communication with the managed devices. The one agent updates and changes at least one management policy. Anomaly detection is pushed out to the one agent. A dedicated polling server is in communication with the one agent. The one agent communicates over a subscribed bus, and runs on the dedicated polling server. A portal bridge is in communication with the bus and communicates through a client system firewall to a Network System. The portal bridge listens on the bus through a firewall of the client system. The one agent discovers a local environment and retrieves monitored client system parameters. The one agent performs at least one of: communicates a time data series or detects an anomaly, in response to a detection of a hole the at least one agent checks a value for an anomaly and detected anomalies are communicated to the server, when an anomaly is not detected the agent sends a time series data point to the repository and when there are changes in the monitored system parameters the agent loads the change and restarts with the polling. In response to anomaly detection one or more physical changes in a managed infrastructure hardware is made, where the hardware supports the flow and processing of information, and in response to production of the clusters security of the managed infrastructure is maintained. |
| US11362880B2 |
Network-operating method in which a query is broadcast by SNMP protocol
The invention relates to a method for operating a network, wherein at least two network devices are connected to one another in the network via a data line and exchange data via this data line, wherein each network device is fixedly assigned an independent MAC address, wherein a network management station also controls the configuration and/or the operation of the network, characterised in that a query is sent from the network management station by multicast by means of the SNMP protocol to the network devices so as to query the configuration parameters of the network devices and/or configure the queried network device by SNMP. |
| US11362878B2 |
Radio (NR) remaining minimum system information (RMSI) multiplexing and periodicity considerations
Techniques and devices for signaling control and system information are provided. In one aspect, a base station determines a type of multiplexing and a periodicity for transmission of remaining minimum system information (RMSI). The type of multiplexing is for multiplexing the RMSI with a synchronization signal (SS) block. The base station generates an indicator that signals the type of multiplexing and the periodicity. In another aspect, a user equipment (UE) identifies the indicator and determines the type of multiplexing and the periodicity based on the indicator. The UE processes the transmission of RMSI based on the type of multiplexing and the periodicity. Other aspects and features are also claimed and described. |
| US11362874B2 |
Systems and methods for communicating by modulating data on zeros
Systems and methods for transmitting data using various Modulation on Zeros schemes are described. In many embodiments, a communication system is utilized that includes a transmitter having a modulator that modulates a plurality of information bits to encode the bits in the zeros of the z-transform of a discrete-time baseband signal. In addition, the communication system includes a receiver having a decoder configured to decode a plurality of bits of information from the samples of a received signal by: determining a plurality of zeros of a z-transform of a received discrete-time baseband signal based upon samples from a received continuous-time signal, identifying zeros that encode the plurality of information bits, and outputting a plurality of decoded information bits based upon the identified zeros. |
| US11362871B2 |
Communication device and method for communication with a counterpart communication device
A communication device and method are presented that support the use of both uniform and non-uniform constellations and provide a reasonable solution for signaling. Capability information is transmitted, said capability information indicating if non-uniform transmission constellations are supported by the mapping circuitry on the transmitter side and/or if non-uniform reception constellations are supported by the demapping circuitry on the receiver side. |
| US11362864B2 |
Communication control system, communication control device and communication control method
A communication system includes a first local area network (LAN), a first router that is operatively coupled to the first LAN, a second local area network (LAN), a second router that is operatively coupled to the second LAN, and a communication network that facilitates communication between the first router and the second router. The first router includes a communication control device having at least one processor that transmits first information indicating a connection relation of a first communication relay device to the first communication relay device connected via the Internet. The processor also receives the first information from the first communication relay device. The processor also causes connection information in accordance with the received information indicating the connection relation of the first communication relay device to be displayed on a display unit. |
| US11362857B2 |
Message processing method, apparatus, electronic control unit and readable storage medium
Provided are a message processing method, an apparatus, an electronic control unit, and a readable storage medium. The method includes configuring different sending times for any two different electronic control units corresponding to the same message ID in sending time configuration information of electronic control units; and when sending messages to a CAN bus, sending, by the electronic control units, the messages to the CAN bus at available sending times according to corresponding sending time configuration information, so that the time for any two different electronic control units corresponding to the same message ID to send messages to the CAN bus is separated. The method can improve the safety of the unmanned system. |
| US11362856B2 |
Processing operation requesting method and device
A processing operation requesting method and device using associated groups. Specifically, the processing operation requesting method of the present invention includes: receiving an operation request; sending the operation request to a first entity group for processing; determining at least one second entity group associated the first entity group; and sending the operation request to the at least one second entity group for processing. |
| US11362855B1 |
Computer monitoring system, apparatus and method for monitoring appliance operation
A system and method to monitor individual appliance performance. A monitor module is provided for aggregating data from a plurality of appliances wherein the module includes. Included in the monitor device is a gateway device configured to capture operational data relating to each of the plurality of appliances and an analyzing device configured to determine individual operational characteristics for each of the appliances from analysis of the captured operational data. A notification device is further provided which is configured to provide information to a user regarding the determined operational characteristics for each of the appliances. |
| US11362850B2 |
Communication device and communication method
[Object] To provide a communication device and a communication method which are capable of achieving both an improvement in reliability of communication in which a frame is transmitted to a plurality of destinations and effective use of wireless communication resources.[Solution] The communication device includes: a communication unit configured to perform communication of a frame. The communication unit transmits a transmission acknowledgment request frame for a transmission acknowledgment response frame including frequency allocation information specifying a transmission frequency of the transmission acknowledgment response frame, and receives the transmission acknowledgment response frame which has undergone frequency division multiplexing, on the basis of the frequency allocation information. |
| US11362848B1 |
Administrator-based navigating of participants between rooms within a virtual conferencing system
Aspects of the present disclosure involve a system comprising a computer-readable storage medium storing a program and method for administrator-based navigating of a participant between rooms. The program and method provide, to a first of plural participants, a first user interface for navigating a virtual space comprising plural rooms, the first user interface allowing the first participant to move the plural participants among the plural rooms; provide, to a second participant, a second user interface for navigating the virtual space, the second user interface allowing the second participant to move among the plural rooms while disallowing to move other participants among the plural rooms; receive an indication of user input via the first user interface, to move the second participant from a first room to a second room; and provide, in response to receiving the indication, for switching the second participant from the first to second room. |
| US11362847B2 |
Method, system, and non-transitory computer-readable record medium for providing multiple group calls in one chatroom
Disclosed is a method, system, and non-transitory computer-readable record medium for providing a plurality of group calls in a single chatroom. A group call providing method including receiving, by the at least one processor, information about a plurality of group call channels generated in response to a first request from at least one member included in a chatroom, from a server, providing, by the at least one processor, a group call channel list about the plurality of group call channels through the chatroom based on the information about the plurality of group call channels, and starting, by the at least one processor, a group call through a specific group call channel, from among the plurality of group call channels, in response to receiving a second request for joining the specific group call channel through the group call channel list may be provided. |
| US11362846B1 |
Publish/subscribe messaging pattern in communications among mobile computing devices
Systems and method may implement a publish/subscribe messaging framework for distributing messages among a plurality of mobile computing devices. A particular “publish/subscribe channel” may be implemented in the context of an auction for one or more items, e.g., collectibles such as trading cards, toys, and/or figurines. The implementation of the publish/subscribe messaging framework may allow for real-time communications of developments in the auction(s) which, in combination with a real-time video stream from a host to a plurality of guests in the channel, amounts to an improved user experience at host devices and guest devices. |
| US11362845B2 |
Secure communication between server device and clients utilizing strong physical unclonable functions
A client device is fabricated using a semiconductor fabrication process. One or more uncontrollable random physical processes in the semiconductor fabrication process can cause small differences between the client device and other client devices. When the client device is presented with a challenge from a server device, the client device generates a random response that depends on its physical properties. The server device stores this random response as a part of a virtual PUF circuitry storage device having other random responses from the other client devices. The server device uses the random response of the client device stored in the virtual PUF circuitry storage device for one or more encryption algorithms to encrypt information to be provided to the client device. |
| US11362844B1 |
Security device and methods for end-to-end verifiable elections
Systems and methods for provisioning and operating a primary security device in a verifiable end-to-end election system are presented herein. The security device serves as a root of trust for chains of certificates that are deployed and utilized throughout the election process. These chains of certificates, originating with the device, which acts as an intermediate certification authority, are used to create a verifiable trust chain throughout the different parts of the election process, the trust chain being traceable back to the device and to the original root of trust certificate. In various embodiments the security device includes a compute module, a security chip, a connection to a human interface display device, at least one lockable transfer device port, and an air-gapped main board to house the compute module, the security chip, and the lockable transfer device port. |
| US11362842B2 |
Membership compiler for applications
An example operation may include one or more of evaluating a proposed membership conversion submitted by a client application (App) on a client subject to a first membership services provider (MSP1), evaluating the validity of the client according to channel membership rules, placing a transaction certificate in a creator field of a client transaction request, using fabric-attribute-based authentication to authenticate the client that submitted the membership conversion proposal, consulting a membership table to determine access rights of the client, and passing the access rights information to an application membership credential generator compliant with a second membership services provider (MSP2). |
| US11362836B2 |
Consensus protocol for permissioned ledgers
The present invention relates to a method for reaching a consensus for appending, at a current round (j), a new block of data to a permissioned ledger distributed through a network comprising network connected devices authorized by the ledger, called nodes, said method being performed by a tamper-proof computing device configured for managing securely digital keys and comprising a random number generator and a cryptoprocessor for generating signatures with said keys, and comprising, for a set of transactions to be validated, the steps of: receiving, from at least a first node (Nk), a candidate block (Bj,Nk) computed by said first node on transactions among said set of transactions, for each received candidate block, generating a random value by the random number generator, and generating a signed selection message comprising: an identifier of the current round (j), said received candidate block (Bj,Nk) and said generated random value by said cryptoprocessor, broadcasting said signed selection messages to the nodes of said network, enabling them to select the new block (Bj) to be appended to the ledger for the current round based on said random values comprised in said signed selection messages. |
| US11362832B2 |
Distributed proof-of-work for sharded or parallel blockchains
A computer-based method for combining individual hashpower of a plethora of shards that use a proof-of-work hash procedure such that each shard benefits from the hashpower from all other shards in the plethora of shards whereby a chosen set of shards having a maximal combined individual hashpower is a consensus. |
| US11362821B2 |
Secure selective rules driven token invalidation
Secure selective token-based access control includes receiving a data access request from over a computer communications network, extracting a token from the request, selecting a decryption key for use in decrypting the token and attempting decryption of the token using the decryption key. Thereafter, on condition that the decryption key successfully decrypts the token into decrypted data, a creation date of the token in the decrypted data may be read and a rule applied to the creation date, the rule determining whether or not to expire the token. Finally, in response to a determination by the application of the rule to expire the token based upon the creation date of the token, the token is expired from subsequent use in authorizing servicing of the data access request, but otherwise the data access request is authorized for servicing. |
| US11362817B2 |
Quantum cryptographic key output apparatus, quantum cryptographic key communication system, and quantum cryptographic key output method
A quantum cryptographic key output apparatus includes a semiconductor laser device that repeatedly generates pulsed laser light, an encoder that encodes the pulsed laser light based on a quantum cryptographic key, an optical branching unit that branches the pulsed laser light, and an attenuator that attenuates a light intensity of first pulsed laser light so that the number of photons of the first pulsed laser light has any one of a plurality of candidate values that are values equal to or smaller than 1. Further, the output apparatus includes a light intensity determination unit that determines whether or not a light intensity of a second pulsed laser light is in a predetermined range, and an information output unit that outputs specifying information for specifying the first pulsed laser light corresponding to second pulsed laser light of which the light intensity is not in the predetermined range to an input apparatus. |
| US11362814B1 |
Autonomous devices
Autonomous devices and systems, methods, and program products for authorizing and performing autonomous devices transactions are disclosed. An autonomous device can be configured to generate a first hash value of a chain of hash values by applying a hash algorithm to first data including first new data and a first previous hash value of the chain of hash values, the first previous hash value computed by applying the hash algorithm to first previous data. The device can transmit to a transaction computer system the first hash value and the first new data. The device can generate and transmit to the transaction computer system a first signed electronic transaction request comprising first transaction data comprising a sending account identifier associated with the autonomous device, a destination account identifier, a transaction amount, and a timestamp. The device can digitally sign the transaction request using a private key of an asymmetric key pair. |
| US11362811B2 |
Secure telecommunications
The present disclosure describes techniques for configuring and participating in encrypted audio calls, audio conferences, video calls, and video conferences. In particular, a call initiator generates a meeting identifier and a first meeting key, which are encrypted using a first encryption key and distributed to one or more participants of the call. The one or more participants decrypt the meeting identifier and the first meeting key, and use that information to participate in the encrypted call. Further, participants respond to the encrypted communication data by encrypting their reply data with the first meeting key. The call initiator decrypts the reply data using the first meeting key. |
| US11362807B2 |
Sealed distributed ledger system
A system for ensuring privacy of transactions is provided. The system may be performed by a computing system during execution of trusted code within a secure enclave of the computing system. The system receives an indication of a transaction. The system validates the transaction. The system encrypts the validated transaction using an encryption key of the trusted code. The system requests untrusted code of the computing system to store the encrypted validated transaction in a portion of a data store. The untrusted code cannot decrypt the encrypted validated transaction that is stored in the data store. Rather, only the trusted code can decrypt the encrypted validated transaction. |
| US11362805B2 |
Database encryption layer
An example operation may include one or more of receiving, by one or more endorser nodes of a blockchain network, an invoke chaincode transaction proposal, executing chaincode, encrypting, by an application programming interface between the chaincode and a shared ledger, blockchain state to the shared ledger, decrypting blockchain state from the shared ledger, endorsing, by the one or more endorser nodes, one or more results from executing the chaincode, and creating a blockchain transaction from the one or more endorsed results. |
| US11362804B1 |
System for interexchange of state data among disparate block chains
A method of using an interexchange to process states of subsystems tracked by disparate block chains. The method comprises locating a first block comprising current state information associated with a first process stored in a first block chain by an interexchange application executing on a computer system, wherein the first process is performed by a first subsystem, reading the current state information of the first process by the interexchange application from the located first block, transcoding a representation of the current state information by the interexchange application to a representation associated with a second block chain, creating a block by the interexchange application, wherein the created block stores the transcoded representation of the current state information in a data field of the created block that the predefined block structure associates to the transcoded current state information, and attaching the created block to the second block chain. |
| US11362798B2 |
Channelization options for reducing network sensitivity
A technology is described for increasing signal booster gain from a weak-signal far node in the proximity of a strong-signal near node. A first splitter can be coupled to a first interface port. A first channelized switchable first-direction parallel path can be coupled to the first splitter comprising a first channelized first-direction bandpass filter for a first subset of a selected first-direction band. A first switchable first-direction parallel path coupled to the first splitter can comprise: a switchable first-direction path comprising a first bandpass filter for passing the selected first-direction band; and a second channelized switchable first-direction parallel path comprising a second channelized first-direction bandpass filter for a second subset of the selected first-direction band. |
| US11362795B2 |
Reduction of TTI bundling in view of proactive imposition of air-interface resource reservation for a device class
A method and system for controlling application of TTI bundling on a carrier on which an access node provides service, the carrier defining air-interface resources. An example method includes detecting that at least a predefined threshold number of devices of a predefined class (e.g., IoT devices) are connected with the access node on the carrier. Further, the example method includes, responsive to the detecting that at least the predefined threshold number of devices of the predefined class are connected with the access node on the carrier, proactively reserving a portion of the air-interface resources for use to serve communications between the access node and the devices of the predefined class and, in view of the proactive reserving of the portion of the air-interface resources, imposing a reduction in the application of the TTI bundling by the access node on the carrier. |
| US11362790B2 |
Method and device used in UE and base station for wireless communication
The present disclosure provides a method and device used in UE and a base station for wireless communications. The UE receives a first signaling; and operates a first radio signal. The first radio signal comprises K first-type sub-signals and K first-type reference signals; the first signaling is used for determining time-frequency resources occupied by the first radio signal; time-domain resources occupied by the K first-type sub-signals are non-orthogonal, and frequency-domain resources occupied by each two of the K first-type reference signals are mutually orthogonal; the K first-type reference signals are respectively used for channel estimation of the K first-type sub-signals, and a reference signal port of each of the K first-type reference signals is associated with a target reference signal port. The above method is advantageous in improving efficiency of PTRSs in multi-TRP/panel transmissions. |
| US11362789B2 |
Method for transmitting and receiving reference signal in unlicensed band, and device therefor
Disclosed is a method by which a terminal receives a tracking reference signal (TRS) in an unlicensed band. Particularly, the method receives a common physical downlink control channel (PDCCH) including first information related to the TRS transmission, and receives the TRS on the basis of the first information, wherein the first information can include information on whether TRS is transmitted and/or on a TRS transmission format. |
| US11362785B2 |
Signaling sequences of sounding reference signal resource indicator collections for uplink repetitions
Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment may receive at least one sounding reference signal (SRS) resource set configuration for a plurality of SRS resources that correspond to respective SRS ports on which an SRS is to be transmitted; transmit SRSs using the SRS resources; receive downlink control information that identifies a sequence of SRS resource indicator (SRI) collections, where an SRI collection identifies one or more of the SRS resources used for transmitting the SRSs; and transmit a plurality of repetitions of an uplink communication based at least in part on the sequence of SRI collections, where a repetition is transmitted using one or more uplink ports that correspond to one or more SRS ports associated with the one or more SRS resources identified based at least in part on the SRI collection. Numerous other aspects are provided. |
| US11362784B2 |
Method and apparatus for channel estimation and data decoding in wireless communication system
A communication method and system that combine the internet of things (IoT) technology with fifth generation (5G) communication systems supporting a higher data rate after fourth generation (4G) systems are provided. The present disclosure may be applied to intelligent services, such as smart homes, smart buildings, smart cities, smart or connected cars, healthcare, digital education, retail businesses, and security and safety related services on the basis of 5G communication technologies and IoT related technologies. A method of a terminal in a wireless communication system to improve DMRS channel estimation performance is provided. The method includes receiving first information configuring a physical resource block (PRB) bundling size indication based on second information, receiving the second information indicating the number of at least one PRB, if the PRB bundling size indication is configured, and estimating the channel state based on an assumption that the same precoding is applied to the at least one PRB based on the second information. |
| US11362778B2 |
Method for receiving control information for SRS transmission in wireless communication system, and user equipment therefor
A method for a user equipment to receive control information for a sounding reference symbol (SRS) transmission in a wireless communication system may comprise: a step of receiving, from a base station, any one piece of information on an SRS bandwidth (BW), the number of SRS blocks and the length of an SRS block which have been set up for the user equipment; and a step of transmitting an SRS on the basis of the control information. |
| US11362775B2 |
Systems and methods for providing high data throughput in 6 GHz Wi-Fi network
A method for allowing wireless communication between an access point and a wireless station in a wireless communication network includes: providing at least one from a combination of a 2.4 GHz frequency band and a 5 GHz frequency band; providing a frequency band including a 6 GHz frequency band for allowing wireless data communication; assigning a first data communication channel having a first frequency bandwidth in the frequency band including the 6 GHz frequency band between the access point and the wireless station; and transmitting data packets between the access point and the wireless station via the first data communication channel in the frequency band including the 6 GHz frequency band. Each of the 2.4 GHz frequency band and the 5 GHz frequency band includes a plurality of subchannels having a first base frequency bandwidth of 20 MHz, and the frequency band including the 6 GHz frequency band includes a plurality of subchannels having a second base frequency bandwidth that is larger than the first base frequency bandwidth. |
| US11362773B2 |
Method and apparatus for transmitting and receiving data by relay node in wireless communication system
The present invention relates to a wireless communication system. More specifically, the present invention relates to a method and a device for transmitting to a child node, a STATUS PDU including Negative Acknowledgement (NACK) information corresponding to one or more data units of which reception failure is detected, wherein the STATUS PDU does not include ACK information for data units which are successfully received. |
| US11362772B2 |
Radio communication apparatus and radio communication method
Provided is a radio communication device which can make Acknowledgement (ACK) reception quality and Negative Acknowledgement (NACK) reception quality to be equal to each other. The device includes: a scrambling unit (214) which multiplies a response signal after modulated, by a scrambling code “1” or “e−j(π/2)” so as to rotate a constellation for each of response signals on a cyclic shift axis; a spread unit (215) which performs a primary spread of the response signal by using a Zero Auto Correlation (ZAC) sequence set by a control unit (209); and a spread unit (218) which performs a secondary spread of the response signal after subjected to the primary spread, by using a block-wise spread code sequence set by the control unit (209). |
| US11362771B2 |
Base station and automatic retransmission scheduling method thereof
The invention provides a base station and an automatic retransmission scheduling method thereof. The automatic retransmission scheduling method includes the following steps: when at least one first layer of protocol data unit of a first protocol layer constitutes a second layer PDU of a second protocol layer, assigning a retransmission serial number of the second layer PDU according to a serial number of the first layer PDU; sending the second layer PDU to a user equipment; receiving a status report of a first retransmission mechanism of the first protocol layer, and an acknowledgement serial number indicates that receiving of multiple PDUs of the first protocol layer by the UE is acknowledged; comparing the retransmission serial number of the second layer PDU with the ACK serial number, and determining whether to disable retransmission of the second layer PDU based on a second retransmission mechanism. |
| US11362766B2 |
Method and apparatus for obtaining HARQ feedback and method and apparatus for transmitting HARQ feedback
The present disclosure provides a method and an apparatus for obtaining HARQ feedback and transmitting HARQ feedback. The method of obtaining HARQ feedback includes: short TTI scheduling information is configured into a first target long TTI according to service requirements; the short TTI scheduling information is sent to second equipment through the first target long TTI; one or more short TTIs in a second target long TTI is scheduled according to the short TTI scheduling information and the scheduled one or more short TTIs are sent to the second equipment; and HARQ feedback for each of the one or more short TTIs which is sequentially sent by the second equipment within the second target long TTI is received. The method provided in the present disclosure may effectively shorten the HARQ feedback latency of short TTIs and improve the flexibility of data transmission. |
| US11362760B2 |
Polar code rate matching method and apparatus
Example Polar code rate matching methods and apparatus are described. One example method includes determining indexes of Z polarized channels on which forced frozen bits are placed, where the Z polarized channels are a subset of N polarized channels corresponding to N to-be-encoded bits, where N=2n, Z |
| US11362756B2 |
System and methods for coherent PON architecture and burst-mode reception
An optical network communication system utilizes a passive optical network including an optical hub having an optical line terminal, downstream transmitter, an upstream receiver, a processor, and a multiplexer. The upstream receiver includes a plurality of TWDMA upstream subreceivers. The system includes a power splitter for dividing a coherent optical signal from the optical hub into a plurality of downstream wavelength signals, a long fiber to carry the coherent optical signal between the optical hub and the power splitter, and a plurality of serving groups. Each serving group includes a plurality of optical network units configured to (i) receive at least one downstream wavelength signal, and (ii) transmit at least one upstream wavelength signal. The system includes a plurality of short fibers to carry the downstream and upstream wavelength signals between the power splitter and the optical network units, respectively. Each upstream subreceiver receives a respective upstream wavelength signal. |
| US11362754B1 |
Adaptive inline modulation tuning for optical interfaces
Embodiments for adaptive inline modulation tuning for optical interfaces is described. The inline modulation tuning is provided by optical nodes, where the optical nodes exchange optical modulation information and node ability information between optical devices in a node pair. An optimal modulation scheme for the node pair is selected based on modulation abilities of each node and associated transceiver, as well as a link quality and performance observed for the optical link. |
| US11362753B2 |
Optical node device
An optical node device includes one or more input-side wavelength selection switches, a plurality of output-side wavelength selection switches, and an amplification unit. The input-side wavelength selection switches include a plurality of output ports, separate input light in accordance with a wavelength, and output the separated light from the output port corresponding to an output destination of the separated light. The output-side wavelength selection switches include input ports each receiving the light output from each of the one or more input-side wavelength selection switches, multiplex the light received from the input ports, and output the light. The amplification unit amplifies the light output from each of the output ports of the input-side wavelength selection switches and outputs the amplified light to the output-side wavelength selection switch at the output destination corresponding to the output port. |
| US11362749B2 |
Switching sub-system for distributed antenna systems using time division duplexing
A switching control module can optimize time division duplexing operations of a distributed antenna system (“DAS”). The switching control module can include a measurement receiver and a processor. The measurement receiver can measure signal powers of downlink signals in a downlink path of the DAS. The processor can determine start times for downlink sub-frames transmitted via the downlink path based on downlink signal powers measured by the measurement receiver exceeding a threshold signal power. The processor can identify a clock setting that controls a timing of switching signals used for switching the DAS between an uplink mode and a downlink mode. The processor can statistically determine a switching time adjustment for the clock setting based on switching time differentials between the clock setting and the start times. The processor can update the clock setting based on the switching time adjustment. |
| US11362748B2 |
Reception device, transmission device, and data processing method
The present technology relates to a reception device, a transmission device, and a data processing method for easily controlling operation of an application accompanying content.The reception device receives the content and controls activation of the application accompanying the content on the basis of valid period information indicating a period in which the application is valid, thereby to easily control the operation of the application accompanying the content. The present technology can be applied to, for example, a television receiver or the like capable of receiving terrestrial broadcasting. |
| US11362746B2 |
Efficient near-field communication based on audio signals
The present disclosure describes an efficient computer-implemented near-field communication system and method based on broadcasting audio signals for dynamically providing context-related additional content to a mobile device. In embodiments of the present invention, the additional content is mapped to specific audio watermarks and/or triggering commands which are encoded together into a digital signal. Based on continuously scanning the received background noise, an exactly defined frequency range and volume is dynamically selected for broadcasting the signal. Hence, the encoded digital signal is further modulated into an audio signal in the exactly defined frequency range. In embodiments of the present invention, the selected exactly defined frequency range for transmitting the audio signal may preferably be located in the ultrasound and/or infrasound frequency range. In case of transmitting infrasound signals, gyrosensors of the mobile device may be employed as audio signal receivers in embodiments of the present invention. Moreover, in further embodiments of the present invention, audio signal receiver of a mobile device such as gyrosensors or microphones may be switched on by transmitting a command via a wireless network such as Wifi or Bluetooth. Also the information about the selected frequency range and volume for broadcasting the audio signal may be provided to the mobile device via a wireless network in embodiments of the present invention. In response, an audio signal receiver of the mobile device may be tuned to the selected frequency range. The received audio signal is further processed on the mobile device so that the context-related additional content may be displayed and/or rendered. |
| US11362745B2 |
Radio wave state analysis method
A radio wave state analysis method acquires a radio wave for a place at which an audio system is sited, where the audio system includes one or more receiving devices for wireless reception of an audio signal; and generates relationship information indicative of a relationship between condition information and radio wave information indicative of the radio wave state, where the condition information includes at least one of time information indicative of a time when the radio wave state is measured or position information indicative of a position of the audio system. |
| US11362744B2 |
Noise detection and localization
Various techniques include detecting noise in a network, identifying the type of noise in the network, localizing noise in the network, determining noise scores for network devices, and/or determining likelihoods that particular devices are causing noise and/or are in proximity of a point of entry of noise into the network. |
| US11362741B2 |
Distributed system for radio frequency environment simulation
A method and system for measuring a device under test are disclosed. In some embodiments, a method of implementing a measurement system is provided. The method includes providing a plurality of nodes, each node including a combination of a communication tester configured to generate a communication signal and a channel emulator configured to emulate a channel, and providing a user interface configured to enable a user to control at least one of the plurality of nodes. |
| US11362740B2 |
Power over fiber system
A power over fiber system includes a power sourcing equipment, a powered device, an optical fiber cable and a controller. The power sourcing equipment includes semiconductor lasers. The semiconductor lasers output feed light of different wavelengths by oscillating with electric power. The powered device includes photoelectric conversion elements. The photoelectric conversion elements have different photoelectric conversion efficiencies and convert the feed light output from the power sourcing equipment into electric power with their respective photoelectric conversion efficiencies. The optical fiber cable transmits the feed light from the power sourcing equipment to the powered device. The controller performs a process of selecting and activating one of the semiconductor lasers and a process of selecting and activating one of the photoelectric conversion elements in order that the power over fiber system perform predetermined power supply. |
| US11362737B2 |
Ternary modulation using inter-operable transmitters and receivers
A ternary phase shift keying transmitter and receiver can efficiently communicate using ternary encoded data that avoids indistinguishable transition curves for each of the three modulated states in the ternary encoded data. The transmitter is interoperable and can function with different types of receivers including direct detection-based receivers and coherent detection-based receivers. |
| US11362729B2 |
Pre-amplifier for a modem
Technology for a pre-amplification system for a modem is disclosed. The pre-amplification system can include an uplink-downlink signal path communicatively coupled between a first modem port of the modem and a first donor antenna port. The pre-amplification system can include a downlink signal path communicatively coupled between a second modem port of the modem and a second donor antenna port. The downlink signal path can include a pre-amplifier configured to amplify a received downlink cellular signal to produce an amplified downlink cellular signal to be directed to the second modem port. |
| US11362717B2 |
Wireless communication method and device
A wireless communication method and device are provided. The method comprises the following operations. A terminal device sends first information to a network device. The first information indicates a switching mode supported by the terminal device and/or a performance parameter value corresponding to the supported switching mode, the switching mode indicates a manner in which the terminal device switches from one transmission mode to another transmission mode, and the transmission mode indicates the number of transmitters and the number of receivers used by the terminal device. |
| US11362715B2 |
Method and device for setting reference signal in wireless communication system
Provided is a method, performed by a user equipment (UE), of communicating based on reference signal configuration, the method including receiving, from a base station (BS), channel state information reference signal (CSI-RS) resource setting; determining whether CSI-RS reporting setting corresponding to the CSI-RS resource setting is allocated; and based on a result of the determining, determining whether to generate CSI. |
| US11362712B2 |
Adaptive numerology for beamforming training
A method for communications is proposed. The method may comprise determining a numerology for beamforming training supportable by a network node and a terminal device. The method may further comprise configuring the numerology for the beamforming training. The numerology may define radio resources with adaptive properties used for transmissions of beamforming training signals. The method may further comprise performing the beamforming training based at least partly on the configured numerology. |
| US11362709B1 |
Signal generation method, transmission device, reception method, and reception device
A signal generation method is used in a transmission device that transmits a plurality of transmission signals from a plurality of antennas at the same frequency and at the same time, in the case where larger power change is performed on a first transmission signal than on a second transmission signal during generation process of the first transmission signal and the second transmission signal, the first transmission signal and the second transmission signal are mapped before the power change such that a minimum Euclidian distance between possible signal points for the first signal is longer than a minimum Euclidian distance between possible signal points for the second signal. |
| US11362704B2 |
Cross-sub-band quasi co-location signaling
Methods, systems, and devices for wireless communication are described. A base station may configure a first sub-band and a second sub-band of a system bandwidth for communication with a user equipment (UE). The base station may determine a spatial quasi co-location (QCL) relationship between the first sub-band and the second sub-band and may transmit signaling to the UE that indicates the determined spatial QCL relationship. Upon receiving the signaling, the UE may derive, based on the indicated spatial QCL relationship, spatial parameters (e.g., beam width, pointing angle, etc.) for communication with the base station via the second sub-band. The spatial parameters may be derived based on spatial parameters used for reception of a downlink transmission from the base station via the first sub-band. Subsequently, the UE may communicate with the base station via the second sub-band using the derived spatial parameters. |
| US11362703B1 |
Positional tracking assisted beam forming in wireless virtual reality systems
Embodiments of the present disclosure support a head-mounted display (HMD) wirelessly coupled to a console. The HMD includes a positional tracking system, a beam controller and a transceiver. The positional tracking system tracks position of the HMD and generates positional information describing the tracked position of the HMD. The transceiver communicates with a console via a wireless channel, in accordance with communication instructions, the communication instructions causing the transceiver to communicate over one directional beam of a plurality of directional beams. The beam controller determines a change in the positional information. Based on the change to the positional information, the beam controller determines a directional beam of the plurality of directional beams. The beam controller further generates the communication instructions identifying the determined directional beam, and provides the communication instructions to the transceiver. |
| US11362702B2 |
Echo and near-end crosstalk cancellation system
An echo and near-end cross-talk (NEXT) cancellation system includes a time-domain processing module and a frequency-domain processing module. The time-domain processing module is configured to receive an unprocessed signal after an analog-to-digital conversion, remove at least one time-domain dominant component of interference from the unprocessed signal, and accordingly cancel a time-domain processed signal. The frequency-domain processing module is connected to the time-domain processing module, and configured to receive the time-domain processed signal, cancel at least one frequency-domain component of the interference from the unprocessed signal, and accordingly generate a processed signal. |
| US11362701B2 |
Multi-radio synchronization within a single connected system
A multi-radio border router for synchronizing communications of multiple border router radios is provided. For example, the border router includes a border router component connected to each of the plurality of border router radios. The border router component configured for selecting one of the plurality of border router radios as a master radio and assigning channel offset parameters for each of the plurality of border router radios. The master radio is configured for broadcasting synchronization beacons based on which the non-master radios synchronize their respective clocks with that of the master radio. After the synchronization, each of the border router radios communicates with endpoints associated therewith according to a channel hopping pattern modified by applying a channel offset determined based on the channel offset parameters assigned to the respective radio. |
| US11362699B2 |
Mobile terminal
A mobile terminal including a body for receiving an electronic component therein; a middle frame mounted on the body a main board mounted on the body; a side case surrounding an edge of the body, wherein the side case includes a plurality of antenna radiators having a first end and a second end, and a plurality of slits defined between the plurality of antenna radiators; a ground line connected to each of the antenna radiators; and a feeding line for supplying power to each of the antenna radiators. Further, each of the antenna radiators includes the second end grounded by the ground line and the first end spaced apart from the second end of a neighbor antenna radiator. |
| US11362695B2 |
Method for communication between a portable device comprising a touch-sensitive surface and a peripheral device selected by a directional slide on the touch-sensitive surface
Method for communication between a portable device comprising a touch-sensitive surface and a peripheral device selected from among at least one peripheral device, comprising the steps of: determining a current position and a current orientation of the portable device; determining a direction of a selection slide on the touch sensitive surface of the portable device, carried out by an individual's finger or by any object; defining, from among the at least one peripheral device, the selected peripheral device whose position corresponds to the direction of the selection slide; starting a communication between the portable device and the selected peripheral device. |
| US11362693B2 |
Method and apparatus for detecting and analyzing passive intermodulation interference in a communication system
A system that incorporates aspects of the subject disclosure may perform operations including, for example, receiving, via an antenna, a signal generated by a communication device, detecting passive intermodulation interference in the signal, the interference generated by one or more transmitters unassociated with the communication device, and the interference determined from signal characteristics associated with a signaling protocol used by the one or more transmitters. Other embodiments are disclosed. |
| US11362690B2 |
Apparatus and method for amplifying transmission signals in wireless communication system
The present disclosure relates to a 5th generation (5G) or pre-5G communication system for supporting a data transmission rate higher than that of a 4th generation (4G) communication system such as long term evolution (LTE). The present disclosure is to amplify transmission signals in a wireless communication system, and a transmitting device may include an antenna array including a plurality of antenna elements, a plurality of amplification chains for amplifying signals transmitted through the plurality of the antenna elements, and a power supply line for supplying powers to the plurality of the amplification chains. Herein, the powers used by power amplifiers included in at least one amplification chain of the plurality of the amplification chains may be divided by filtering or by independent pads and branch-lines. |
| US11362683B2 |
Variable rate low density parity check decoder
A method includes receiving a first data frame and a second data frame from a communication channel; decoding the first data frame using a first portion of an extended parity-check matrix (PCM); and decoding the second data frame using a second portion of the extended PCM. The first portion is a subset of the second portion. |
| US11362673B2 |
Entropy agnostic data encoding and decoding
Entropy agnostic data encoding includes: receiving, by an encoder, input data including a bit string; generating a plurality of candidate codewords, including encoding the input data bit string with a plurality of binary vectors, wherein the plurality of binary vectors includes a set of deterministic biased binary vectors and a set of random binary vectors; selecting, in dependence upon a predefined criteria, one of the plurality of candidate codewords; and transmitting the selected candidate codeword to a decoder. |
| US11362667B1 |
Reducing delay-lock loop delay fluctuation
A device includes a master delay-lock loop (DLL) having a phase frequency detector connected in series with a charge pump that is to generate a control voltage. A slave DLL is coupled to the master DLL and has a delay line including a buffer to receive a slave clock and a series of delay cells coupled between the buffer and an output terminal that is to output a delay clock, the series of delay cells variably controlled by the control voltage. The master DLL and the slave DLL are powered by a power supply that experiences undershoot or overshoot in response to a load transient. A dummy load is coupled between the delay line of the slave DLL and an output of the power supply, the dummy load including an exclusive OR gate that receives, as inputs, a first output of the buffer and the delay clock. |
| US11362666B2 |
Low-jitter frequency division clock clock circuit
The present disclosure provides a low-jitter frequency division clock circuit, including: a clock control signal generation circuit, to generate clock signals having different phases; a low-level narrow pulse width clock control signal generation circuit, to generate a low-level narrow pulse width clock control signal; a high-level narrow pulse width clock control signal generation circuit, to generate a high-level narrow pulse width clock control signal; and a frequency division clock generation circuit, to generate a frequency division clock signal according to low-level narrow pulse width clock control signal and high-level narrow pulse width clock control signal. The delay from a clock input end to an output end of low-jitter frequency division clock circuit is up to three logic gates. Compared with traditional divide-by-2 frequency division clock circuits based on D-flip-flop, the low-jitter frequency division clock circuit of the present disclosure has fewer logic gates, a shorter delay, and lower jitter. |
| US11362660B2 |
Level shifter circuit and method of operating the same
A circuit includes a level shifter circuit, an output circuit, an enable circuit, a first and a second feedback circuit. The level shifter circuit is coupled to a first voltage supply, and is configured to generate at least a first and a second signal responsive to at least the first enable signal or the first input signal. The output circuit is coupled to at least the level shifter circuit and the first voltage supply, and configured to receive the first and the second signal. The enable circuit is configured to generate a second enable signal responsive to the first enable signal. The first feedback circuit is configured to receive the first enable signal, the second enable signal and the first feedback signal. The second feedback circuit is configured to receive the first enable signal, the second enable signal and the second feedback signal. |
| US11362659B2 |
Thin keyboard apparatus
A thin keyboard apparatus includes a base plate and a supporting unit. The base plate has a plate body which is formed with four retaining openings and four retaining members. Each retaining opening is bordered by a peripheral edge which has first and second edge sections extending along two different and intersecting directions. Each retaining member has an upper wall, a first connecting wall interconnecting the upper wall and the first edge section, a second connecting wall interconnecting the upper wall and the second edge section, and a broken hole dividing the first edge section from the second edge section. The supporting unit is slidably pivoted to the retaining members. |
| US11362656B1 |
Josephson RF to RF frequency converter
A single flux quantum (SFQ) circuit includes a radio frequency (RF) to direct current (DC) conversion stage. A DC to RF current conversion stage is coupled to a single output of the RF to DC conversion stage. The DC to RF current conversion stage includes a plurality of series stacked Josephson Junctions (JJs) having n stages, configured to convert a DC current received from the RF to DC conversion stage and reconvert the DC current to an RF tone. |
| US11362649B1 |
Circuit and method for adaptively eliminating ringing in signals driving capacitive loads
A control signal may be produced in response to an assertion of a switch signal by asserting the control signal, waiting an adaptive delay after the assertion of the switch signal, de-asserting the control signal in response to the expiration of the adaptive delay, and re-asserting the control signal in response to a current generated according to the control signal becoming zero. The adaptive delay may be adjusted according to a voltage generated using the current. A circuit may include an XOR gate producing the control signal from a switch signal and an output of a Set-Reset Flip-Flop (SRFF), a zero-detect circuit that resets the SRFF when a current generated using the control circuit becomes zero, and a delay circuit to set the SRFF an adaptive delay after assertion of the switch signal and to adjust the adaptive delay according to a voltage generated by the current. |
| US11362647B2 |
Hysteresis comparator, semiconductor device, and power storage device
To provide a hysteresis comparator having a small circuit area and low power consumption. The hysteresis comparator includes a comparator, a switch, a first capacitor, a second capacitor, and a logic circuit. A first terminal of the switch is electrically connected to one of a pair of conductive regions of the first capacitor, one of a pair of conductive regions of the second capacitor, and a first input terminal of the comparator. An output terminal of the comparator is electrically connected to an input terminal of the logic circuit. An output terminal of the logic circuit is electrically connected to the other of the pair of conductive regions of the second capacitor. The logic circuit has a function of generating an inverted signal of a signal input to the input terminal of the logic circuit and outputting the inverted signal to the output terminal of the logic circuit. A reference potential is input to the first input terminal of the comparator and the reference potential is held by the switch. Due to change in the potential of the output terminal of the comparator, the reference potential is changed by capacitive coupling of the second capacitor. |
| US11362646B1 |
Variable current drive for isolated gate drivers
A method for driving a high-power drive device includes providing a signal having a first predetermined signal level to an output node during a first phase of a multi-phase transition process. The method includes generating a first indication of a first parameter associated with the signal provided to the output node. The method includes generating a second indication of a second parameter associated with the signal provided to the output node. The method includes providing the signal having a second predetermined signal level to the output node during a second phase of the multi-phase transition process. The method includes transitioning from the first phase to the second phase based on the first indication and the second indication. A multi-die, distributed package technique addresses power dissipation requirements for a driver product based on size and associated power dissipation needs of the high-power drive device in a target application. |
| US11362644B2 |
Switch module
A switch module includes a first terminal, first and second filters, and first and second switches. Impedance of the first filter for a signal in a stop band is capacitive. When the first switch is turned OFF, impedance of the first switch is capacitive, and impedance of the first filter seen from an end portion of the first switch connected to the first filter is not in a short state and impedance of the first filter seen from the first terminal is in an open state. |
| US11362643B2 |
Multiplexer
A multiplexer includes first and second filters and additional circuits. The first filter is coupled to transmit and antenna terminals, the second filter is coupled to receive and antenna terminals, one additional circuit is coupled to transmit and receive terminals, and another additional circuit is coupled to transmit and antenna terminals. Pass bands of the first and second filters are respectively first and second frequency bands, and the second frequency band including a center frequency higher than a center frequency of the first frequency band. The one additional circuit includes a first resonator group including first IDT electrodes aligned in a propagation direction of an acoustic wave. The other additional circuit includes a second resonator group including second IDT electrodes aligned in the propagation direction. An average pitch of electrode fingers is greater among the first IDT electrodes than the second IDT electrodes. |
| US11362640B2 |
Electrode-defined unsuspended acoustic resonator
A bulk acoustic resonator operable in a bulk acoustic mode includes a resonator body mounted to a separate carrier that is not part of the resonator body. The resonator body includes a piezoelectric layer, a device layer, and a top conductive layer on the piezoelectric layer opposite the device layer. The piezoelectric layer is a single crystal of LiNbO3 cut at an angle of 130°±30°. A surface of the device layer opposite the piezoelectric layer is for mounting the resonator body to the carrier. |
| US11362638B2 |
Bulk acoustic wave resonator with a heatsink region and electrical insulator region
Certain aspects of the present disclosure provide a bulk acoustic wave (BAW) resonator having a substrate with a heatsink region and an electrical insulator region. An example electroacoustic device generally includes a piezoelectric layer, a first electrode structure, a second electrode structure, one or more reflector layers, and a substrate having a heatsink region and an electrical insulator region. The heatsink region is arranged under a first portion of the first electrode structure, the first portion of the first electrode structure overlapping the second electrode structure. The insulator region is arranged under a second portion of the first electrode structure, the second portion of the first electrode structure being adjacent to the first portion of the first electrode structure. |
| US11362636B2 |
Multiplexer, front end circuit, and communication device
A multiplexer includes a first acoustic wave filter, a second acoustic wave filter, and an inductor-capacitor (LC) filter each connected to a common terminal. A passband of the second acoustic wave filter is between a passband of the first acoustic wave filter and a passband of the LC filter, a frequency gap between the passband of the second acoustic wave filter and the passband of the LC filter is greater than a frequency gap between the passband of the first acoustic wave filter and the passband of the second acoustic wave filter, the passband of the first acoustic wave filter includes a transmission band of the first communication band, the passband of the LC filter includes a reception band of the first communication band, and the passband of the second acoustic wave filter includes a reception band of a second communication band. |
| US11362627B1 |
Process tracking pulse generator
Systems and devices are provided for tracking pullup current generated by power amplifiers regardless of variations in PVT conditions. An apparatus may include one or more power amplifiers that powers components of the apparatus, a tracking circuit, and a pulse generation circuit. The tracking circuit may include an amplifier. Further, the tracking circuit may include pullup current tracking circuitry that is coupled to the amplifier and generates a first current that tracks pullup current generated by the one or more power amplifiers. Furthermore, the pulse generation circuit may include pullup current generator circuitry that generates a second current that mirrors the first current. In addition, the pulse generation circuit may also include pulse generator circuitry that is coupled to the pullup current generator circuitry and that generates a pulse to control operation of the one or more power amplifiers based at least in part on the second current. |
| US11362625B2 |
Balanced-to-Doherty mode switchable power amplifier
A balanced-to-Doherty (B2D) mode-reconfigurable power amplifier (PA) has the capability of maintaining high linearity and high efficiency against load mismatch. The reconfigurable PA includes a switch to alternatively connect to a pre-determined resistive load or a pre-determined pure reactive load (jX), i.e., short, open, or finite reactance between an output quadrature coupler and ground. The biasing of Doherty mode is adaptive dependent on the value of reactive loading (jX). The Doherty operation of this PA is based on an architecture configured from a balanced amplifier, e.g., a quasi-balanced amplifier. |
| US11362623B2 |
Voltage-controlled oscillator
A voltage-controlled oscillator includes a first transistor, a second transistor, an inductive impedance element, a first variable capacitive impedance element, and a second variable capacitive impedance element. The first transistor has a source coupled to a first power source, a drain coupled to a first node, and a gate coupled to a second node. The second transistor has a source coupled to the first power source, a drain coupled to the second node, and a gate coupled to the first node. The inductive impedance element has a first terminal coupled to the first node and a second terminal coupled to the second node. The first variable capacitive impedance element has a first terminal coupled to the first node and a second terminal coupled to a third node. The second variable capacitive impedance element has a first terminal coupled to the second node and a second terminal coupled to the third node. |
| US11362621B2 |
Wiring device of photovoltaic equipment
A wiring device of photovoltaic power generation equipment includes an aluminum wire and a copper-aluminum transition element. One end of the aluminum end is connected with the aluminum end of the copper-aluminum transition piece, and the other end of the aluminum end is configured to connect with an external connecting component. The copper end is configured to connect with photovoltaic power generation equipment. In the wiring device of the photovoltaic power generation equipment provided in the present application, the copper-aluminum transition piece is arranged at the position of the photovoltaic power generation equipment, and the aluminum end of the copper-aluminum transition piece is connected to the external connecting component by the aluminum wire, avoiding using copper wire for long-distance conduction. The cost of the aluminum wire is much lower than that of the copper wire. Therefore, the cost of the wiring device provided by the application is reduced. |
| US11362619B2 |
Photoelectric conversion device
Disclosed is a photoelectric conversion device that includes: a thin panel-shaped photoelectric conversion module; a first connection member that couples to an outer edge of the photoelectric conversion module at a joint so as to be electrically connected to the photoelectric conversion module; a reinforcing member that couples to a portion including the joint; and a main body that receives electric power supply from the photoelectric conversion module via the first connection member. The first connection member is mechanically and electrically attachable/detachable to/from the main body and has a thickness in vertical direction that is greater than a thickness in vertical direction of the photoelectric conversion module and less than or equal to a thickness in vertical direction of the reinforcing member at the joint. |
| US11362617B2 |
Self-generating smart glass
Provided is a self-generating smart glass, including: a window frame, an outer glass and an inner glass, a plurality of solar panels, a first electric telescopic rod, a plurality of slide grooves which are symmetrically arranged on a top and a bottom of the window frame, a foldable plate located between the outer glass and the inner glass, a first battery, a light sensor and a control system. Two adjacent outer surfaces of the foldable plate are provided with the solar panels which are connected in series through flexible wires and communicated with the first battery. The first electric telescopic rod, the light sensor and the control system are respectively connected to the power supply; and the first electric telescopic rod and the light sensor are respectively connected to the control system. |
| US11362613B2 |
Motor driving circuit and motor driving method
A motor driving circuit and a motor driving method are provided. The motor driving circuit is used to drive the motor and includes an inverter circuit, a control circuit, a current-limiting circuit, a start circuit and a transient circuit. The control circuit controls the inverter circuit to drive the motor with a motor control current according to a set current limit value indicated by a current-limiting signal, and outputs a steady state ready signal in response to the motor reaching a steady state. The current-limiting circuit generates the current-limiting signal according to a start state signal, or generates the current-limiting signal according to a transient signal. The start circuit outputs the start state signal when the motor starts. The transient circuit detects whether the motor is in a transient state, and outputs the transient signal in response to the motor being in a transient state. |
| US11362612B2 |
Power device of electric vehicle
Disclosed herein is a power device of an electric vehicle including a motor housing that is configured to accommodate a motor which generates a driving force, and an inverter housing that has the shape of a cylinder which has first and second opened surfaces, that is coupled to the motor housing such that a shaft which delivers the driving force is coupled to the motor, and that is configured to accommodate an inverter module which supplies first, second and third AC power to the motor. |
| US11362611B2 |
Variable torque motor/generator/transmission
The present disclosure is directed to an electric generator and motor transmission system that is capable of operating with high energy, wide operating range and extremely variable torque and RPM conditions. In accordance with various embodiments, the disclosed system is operable to: dynamically change the output “size” of the motor/generator by modularly engaging and disengaging rotor/stator sets as power demands increase or decrease; activate one stator or another within the rotor/stator sets as torque/RPM or amperage/voltage requirements change; and/or change from parallel to series winding configurations or the reverse through sets of 2, 4, 6 or more parallel, three-phase, non-twisted coil windings with switchable separated center tap to efficiently meet torque/RPM or amperage/voltage requirements. |
| US11362610B2 |
Method for operating a synchronous motor excited by permanent magnets, electronic control device, motor arrangement, and storage medium
A method for operating a permanent magnet synchronous motor comprises setting a maximum power, determining a current vector and an output voltage vector in the dq coordinate system. A setpoint amount for a setpoint voltage vector is calculated on the basis of the maximum power, the current vector and the output voltage vector. The setpoint voltage vector is generated with the setpoint amount, and then operating the permanent magnet synchronous motor at least with the setpoint voltage vector. |
| US11362609B2 |
Active sound generation apparatus using motor
Disclosed is an active sound generation apparatus using a motor, the apparatus including a target sound generating signal generator configured to select the target sound and to generate a current command signal for driving the motor to generate the target sound, a current sensor configured to sense phase current of the motor, a motor controller configured to generate a voltage command for driving the motor to generate the target sound and to control driving of the motor based on a current command signal generated by the target sound generating signal generator, the phase current of the motor sensed by the current sensor, and a counter electromotive force compensation value of the motor, and a radiated noise generator configured to generate the target sound using vibration generated from the motor driven by the motor controller. |
| US11362606B2 |
Control device for alternating-current electric motor
An inverter converts direct-current power to alternating-current power by operations of a plurality of switching elements under a PWM control, and supplies the alternating-current power to an alternating-current electric motor. A feedback control computation unit of an inverter control unit uses current values acquired from current sensors detecting a current flowing to the alternating-current electric motor and a rotation angle of the alternating-current electric motor to perform a control computation in a (N/2) cycle (N is a natural number) of a triangular wave carrier of the PWM control. At the acquisition of the current values detected by the current sensors, an average acquisition unit acquires an average of current values in a carrier half cycle as a period between a peak and a valley of the carrier, or acquires a current value regarded as an average of the current values at an acquirable timing. |
| US11362604B2 |
Compact, low-cost electric field mill
An electric field mill (EFM) incorporates a novel rotor and shaft grounding mechanism providing a low-impedance path to ground via a bearing packed with electrically conductive grease. A removable bearing washer allows for servicing. The EFM includes a data processing scheme built around a peak detection algorithm and moving much of the signal processing to digital processing. A GPS disciplined sampling clock and cellular connectivity allow for use and maintenance of arrays of widely scattered EFMs. |
| US11362600B2 |
Electrostatic motor having unipolar drive
A generator/controller for electrostatic motors exploits properties of a delta-connected electrostatic motor to accommodate high common mode DC offset voltages thus permitting construction of an electrostatic drive circuit outputting unipolar sinusoidal power and having a substantial reduction in the complexity and size. |
| US11362599B2 |
Controlling method for single-phase bidirectional inverter and device thereof
A controlling method is for a single-phase bidirectional inverter. The single-phase bidirectional inverter includes a switch and an inductor. The controlling method for the single-phase bidirectional inverter includes an extracting step, a calculating step, and an integrating step. In the extracting step, a current command is inputted to the switch and obtaining a current through the inductor. The current is piecewisely linearized to extract a magnetizing inductance and a demagnetizing inductance of the inductor. In the calculating step, a duty ratio of the switch is used to calculate a variation of the current of the magnetizing inductance and a variation of the current of the demagnetizing inductance. In the integrating step, the variation of the current of the magnetizing inductance and the variation of the current of the demagnetizing inductance are integrated to obtain another duty ratio of the switch in the next cycle. |
| US11362597B2 |
Power control device
The present power control device includes an inverter, a step-up/down converter, a first capacitor, a second capacitor, and a control device. The step-up/down converter includes an upper arm and a lower arm that are switching elements, and a reactor that has a first end and a second end, the first end being connected to the first capacitor, and the second end being connected between the upper arm and the lower arm. The control device is configured to fix the lower arm in an off state and control the upper arm such that the upper arm switches at a predetermined duty ratio. |
| US11362596B2 |
System and method for operating a system
In a system and method for operating a system having a rectifier which is suppliable from an electric AC-voltage supply network, an inverter which feeds an electric motor, and a DC/DC converter which is connected to an energy accumulator, the DC-voltage side connection of the inverter is connected to the DC-voltage side connection of the rectifier, in particular, the electric motor is supplied from the AC-voltage side connection of the inverter, a first DC-voltage side connection of the DC/DC converter is connected to the DC-voltage side connection of the rectifier, in particular, the DC-voltage side connection of the inverter and the first DC-voltage side connection of the DC/DC converter are connected in parallel, the DC/DC converter has a housing in which a device for current acquisition is situated, which acquires either the current, in particular network phase currents, flowing into the rectifier at the AC-voltage side connection of the rectifier, or the current emerging from the rectifier at the DC-voltage side connection of the rectifier, and the acquired value is forwarded to a signal electronics situated in the housing of the DC/DC converter, which generates control signals for semiconductor switches of the DC/DC converter. |
| US11362595B1 |
Power converter pre-charge with line synchronization
For power converter pre-charge with line synchronization, a method magnetizes a power transformer of a power converter with a supply voltage from a variable voltage variable frequency supply. The method pre-charges power cells of the power converter fed from the power transformer to a specified voltage with the supply voltage. The method further modifies a primary amplitude, a primary phase, and a primary frequency of a primary winding of the power converter with the supply voltage to match a main amplitude, a main phase, and a main frequency of a main voltage of a main power source. In response to matching the primary amplitude, the primary phase, and the primary frequency to the main amplitude, the main phase, and the main frequency, the method connects the main power source to the power transformer. |
| US11362591B2 |
Quasi-resonant auto-tuning controller
A quasi-resonant auto-tuning controller includes a zero-voltage crossing detection circuit and a valley tuning finite-state machine having a look-up table. The zero-voltage crossing detection circuit receives a reference voltage and receives an auxiliary signal from an auxiliary winding. The zero-voltage crossing detection circuit produces a comparison signal having pulses when the auxiliary signal is less than the reference voltage. The valley tuning finite-state machine produces a divided pulse width based on the comparison signal, stores the divided pulse width of each pulse in the look-up table, determines, from the comparison signal, that the auxiliary signal is less than the reference voltage, waits a time period corresponding to the divided pulse width stored in the look-up table if the auxiliary signal is less than the reference voltage, and produces a valley point signal after waiting the time period. |
| US11362589B2 |
Flying capacitor converter
A flying capacitor converter includes an inductor, a first switch and a second switch, a first diode and a second diode, a first capacitor and a second capacitor, a flying capacitor, a third diode and a third capacitor, a fourth diode, and a fifth diode. The inductor is coupled to a first node. The first switch and the second switch are commonly connected to a second node. The first diode and the second diode are commonly connected to a third node. The first capacitor and the second capacitor are commonly connected to a fourth node. The flying capacitor is coupled to the second node and the third node. The third diode and the third capacitor are commonly connected to a fifth node. The fifth diode is coupled to the third node and the fourth node. |
| US11362588B2 |
Power conversion circuit and related apparatus and terminal device
A power conversion circuit includes a first switch branch, a second switch branch, a third switch branch, a filter branch, and a first capacitor. A first terminal of the first capacitor is connected to a power source through the first switch branch, and a second terminal of the first capacitor is grounded through the second switch branch. The filter branch includes a filter inductor and a filter capacitor. A first terminal of the filter inductor is connected to the first terminal of the first capacitor, and a second terminal of the filter inductor is connected to a first terminal of the filter capacitor. A second terminal of the filter capacitor is grounded, and the filter capacitor is connected in parallel with the load. The third switch branch is connected between the second terminal of the first capacitor and the second terminal of the filter inductor. |
| US11362587B2 |
Hysteretic pulse modulation for charge balance of multi-level power converters
In described examples of methods and control circuitry to control a multi-level power conversion system, the control circuitry generates PWM signals having a duty cycle to control an output signal. The duty cycle is adjustable in different switching cycles. States of the system's switches are adjustable in one or more intervals within the switching cycles. In response to a voltage across a capacitor of the system being outside a non-zero voltage range, the control circuitry adjusts states of the switches in two intervals to discharge or charge the capacitor in a given switching cycle. |
| US11362583B2 |
Method for controlling a Vienna rectifier
A method for generating a current set point value for a charging device connected to an electrical network includes measuring at least one electrical voltage, calculating a filtered voltage according to the measured voltage and a value of electrical pulsation of the electrical network, estimating a frequency and the amplitude of the measured voltage according to the at least one measured voltage and the at least one filtered voltage, calculating a consolidated voltage according to the measured voltage and the filtered voltage, and generating a current set point value according to the consolidated voltage and the estimated amplitude. |
| US11362582B2 |
Multi-phase converter control system and method for interleaving multi-phase converters
A desired OFF period module is configured to determine a desired OFF period for a plurality of switches of a PFC circuit based on an input voltage and an output voltage. A blanking timer module is configured to output a blanking signal, set the blanking signal to a first state when a countdown timer is greater than zero, and set the blanking signal to a second state when the countdown timer reaches zero. A switching control module is configured to: transition a first switch of the plurality of switches from an ON state to an OFF state in response to (i) a measured current through an inductor of the PFC circuit being greater than a demanded current through the inductor and (ii) the blanking signal being in the second state; and maintain the first switch in the OFF state for the desired OFF period after the transition. |
| US11362580B2 |
Power conversion device with temperature control
In order to cause an output to be continued while protecting a DC-DC converter including a temperature detector from overheating, without stopping an operation or excessively reducing an output, even when an abnormality has occurred in a cooler or the temperature detector has failed, a controller sets current values at which a control using droop characteristics is started in a multiple of stages in accordance with temperature values, and carries out the control using droop characteristics by switching the current value in accordance with a temperature detected by the temperature detector. |
| US11362576B1 |
Power converter with multiple output voltages
An apparatus such as a power supply system includes a switched-capacitor converter operative to receive an input voltage. The switched-capacitor converter includes multiple resonant circuit paths to convert the input voltage into a first output voltage and a second output voltage. A first output of the switched-capacitor converter is operative to output the first output voltage; a second output of the switched-capacitor converter is operative to output the second output voltage. |
| US11362573B1 |
Rotating pressure generator
A rotating pressure generator includes a rotor and a stator arranged surrounding the rotor. The rotor is adapted to rotate about a central axis and has a body defining an outer surface, and a plurality of first magnets attached to the outer surface extending radially outwardly from the outer surface. Further, the stator includes a plurality of arcuate bodies arrayed circularly and coaxially around the rotor and a plurality of second magnets attached to an inner surface of each of the arcuate bodies. The second magnets are oriented such that a first pole of each second magnet faces a first pole of the first magnet and magnetic polarity of the first pole of the second magnet is identical to a magnetic polarity of the first pole of the first magnet. The rotor rotates about the central axis in response to the reciprocating movements of the plurality of arcuate bodies. |
| US11362569B2 |
Electric drive apparatus, and electric power steering apparatus
In an electric power steering apparatus, a motor housing includes an axial end part opposite to an output part of an electric motor. An electronic control section is arranged at the axial end part of the motor housing. The electronic control section includes a control circuit part, a power supply circuit part, and a power conversion circuit part. The axial end part of the motor housing includes a power conversion part thermal radiation region and a power supply part thermal radiation region. The power conversion circuit part is mounted to the power conversion part thermal radiation region to allow heat to be transferred from the power conversion circuit part to the motor housing. The power supply circuit part is mounted to the power supply part thermal radiation region to allow heat to be transferred from the power supply circuit part to the motor housing. |
| US11362565B2 |
Electromagnetic automatic balancing device based on radial excitation
An electromagnetic automatic balancing device based on radial excitation includes a shell, a rotatory ring, a stationary ring, a pair of connecting bearings and a controller. The rotatory ring includes two bilaterally symmetrical outer excitation magnetic rings, two bilaterally symmetrical inner excitation magnetic rings, two bilaterally symmetrical counterweight discs, two bilaterally symmetrical first counterweight blocks, two bilaterally symmetrical second counterweight blocks and a pair of rotatory-ring bearings. The stationary ring includes a stator, two bilaterally symmetrical excitation frameworks and two bilaterally symmetrical coils. The rotatory ring and the stationary ring are installed in the shell and connected through a pair of connecting bearings. The stator is installed in the center of the shell. The excitation frameworks are respectively fixed at both ends of the stator. |
| US11362564B2 |
Temperature compensated linear actuator and encoder
A linear actuator includes a casing that contains a moveable shaft moved by a motor in response to a drive signal and coupled to an encoder that determines an actual instantaneous position of the shaft and forms part of a control loop that adjusts the drive signal so as to ensure accurate positioning of the shaft. A temperature sensor mounted on the shaft produces a temperature signal indicative of instantaneously measured temperature, and a temperature compensator responsive to the measured temperature for generating a negative or positive offset for correcting the drive signal so as to move the shaft to a positon that is corrected for instantaneous expansion or contraction of the shaft owing to departures of the shaft's actual temperature from a known baseline temperature. |
| US11362563B2 |
Cooling enclosure and motor
A motor includes a cooling enclosure. The cooling enclosure includes a cover body, an inner fan, and an outer fan. A first cooling cavity, a second cooling cavity, and an isolating cavity between the first cooling cavity and the second cooling cavity are formed in the cover body. A plurality of first and second cooling pipes are respectively disposed in the first and second cooling cavity; both being in communication with the isolating cavity and the outside. The cover body includes a first surface and an opposite second surface. The inner fan is disposed on the first surface. Sides of the inner fan are respectively in communication with the first and second cooling cavities. The inner fan is configured to provide circulating power for internal circulating air. The outer fan is in communication with the isolating cavity. The cooling enclosure and the motor can realize relatively high cooling efficiency. |
| US11362557B2 |
Electric motor and field element
An electric motor for reducing eddy current loss including an armature; a field element or permanent magnet as a magnetic source; and a shaft rotating together with the armature or field element. The permanent includes magnet particles bound together by a binder resin, and has a degree of electric resistance anisotropy (ρ1/ρ2) of 2 or more. The first electric resistivity (ρ1) is measured in an axial direction and a second electric resistivity (ρ2) is measured in a direction perpendicular to the axial direction. The bonded magnet is, for example, a compression-molded bonded magnet that contains 93% to 98.5% of the magnet particles, and the first electric resistivity is 300 μΩm or more. When the compression-molded bonded magnet whose compression direction is arranged along the axial direction is used as a field source, the eddy current loss occurring in the compression-molded bonded magnet can be efficiently reduced. |
| US11362556B2 |
Motor
The present invention may provide a motor including a shaft, a rotor disposed outside the shaft, and a stator disposed outside the rotor, wherein the rotor includes a rotor core surrounding the shaft and a magnet disposed inside the rotor core, the rotor core includes a pocket in which the magnet is disposed, the rotor core is formed by stacking a plurality of plates, a lower end plate of the plurality of plates is disposed to cover at least a part of the pocket, and an upper end plate of the plurality of plates is disposed at a level higher than a level of the magnet. |
| US11362553B2 |
Motor rotor
A motor rotor may include a body having axially extending first and second magnets embedded into the body, the first magnet and the second magnet being arranged at an angle and spaced apart by an axially extending magnetic shielding component. The first magnet includes a first surface away from a central axis of the rotor body and a second surface facing the central axis. The second magnet includes a third surface away from the central axis and a fourth surface facing the central axis, wherein the first surface and the third surface and extension surfaces thereof define a first area of the body part away from the central axis and a second area of the body part close to the central axis. |
| US11362552B2 |
Electric machine component and method to fabricate
An electric machine rotor including a first stamped rotor lamination and a first stamped sheet of a material different than the first stamped rotor lamination is provided. The first stamped rotor lamination may define a pair of magnet pockets. The first stamped sheet may be coplanar with and scarf jointed to the first stamped rotor lamination to define a center bridge between the magnet pockets that has a magnetic permeability less than, and a mechanical strength greater than, the first stamped rotor lamination. The rotor may further include a second stamped sheet of a material different than the first stamped rotor lamination coplanar with and scarf jointed to the first stamped rotor lamination to define a top bridge adjacent to one of the magnet pockets at a perimeter of the rotor that has a magnetic permeability less than, and a mechanical strength greater than, the first stamped rotor lamination. |
| US11362548B1 |
Wireless power system cabling
A wireless power system has a wireless power transmitting device such as a charging puck and a wireless power receiving device such as a wristwatch. The charging puck may have a three-wire cable that is coupled between a connector and a puck housing. The wireless power transmitting device may have a set of four coils or other number of wireless power transmitting coils in the puck housing. A switch may be coupled in series with each of the four coils. Control circuitry in the wireless power transmitting device may activate a subset of the switches to switch a subset of the coils into use in transmitting the wireless power to the wireless power receiving device. The control circuitry may have a main portion in the connector that uses a tone-based encoding scheme or other encoding scheme to transmit switch configuration commands to a secondary portion in the puck housing. |
| US11362547B2 |
Wireless power supply apparatus
A wireless power supply apparatus including a signal transmitting terminal and a signal receiving terminal is provided. The signal transmitting terminal encodes a digital data into a control signal and transmits a power supply signal in a manner of wireless communication according to the control signal. The signal receiving terminal receives the power supply signal from the signal transmitting terminal in the manner of wireless communication. The signal receiving terminal converts the power supply signal into a power source signal and a data signal and decodes the data signal into the digital data. |
| US11362543B2 |
Wireless power receiver circuits that provide constant voltage or current to an electrical load, and methods
A wireless power receiver circuit and method for use in a wireless power transfer system are provided for providing a constant current and voltage to an electrical load, such as a chemical cell device. A wireless power receiver circuit include a first comparator circuit and a second comparator circuit configured to receive output signals output from the DC load circuit, compare the received output signal with a preselected reference voltage signal, and output first and second sub-control signals, respectively. A logical gate may generate a control signal based on a comparison of the first sub-control signal and the second sub-control signal, and feed the control signal back to a resonator circuit to control a state of an electrically-controllable switch. |
| US11362542B2 |
Electronic device for wireless charging external device
An electronic device includes a housing including a first plate, a second plate spaced apart from the first plate and facing the first plate, and a side member at least partially surrounding a space between the first plate and the second plate, a display located in the space and visible through the first plate, a conductive coil parallel to the second plate and disposed between the display and the second plate, a wireless charging circuit electrically connected to the conductive coil, and a processor operationally connected with the display and the wireless charging circuit. The processor receives a power control signal from an external device, applies a charging current to the conductive coil, based on the power control signal, senses whether a specified event occurs while the charging current is applied, and when the specified event occurs, transmits information for setting a charging power corresponding to the specified event to the external device. |
| US11362540B2 |
Systems and methods for efficient power conversion in a power supply in a power distribution system
Systems and methods for efficient power conversion in a power supply in a power distribution system are disclosed. In particular, a low frequency transformer having high conversion efficiency is coupled to an input from a power grid. An output from the transformer is rectified and then converted by a power factor correction (PFC) converter before passing the power to the distributed elements of the power distribution system. By placing the transformer in front of the PFC converter, overall efficiency may be improved by operating at lower frequencies while preserving a desired power factor and providing a desired voltage level. The size and cost of the cabinet containing the power conversion circuitry is minimized, and operating expenses are also reduced as less waste energy is generated. |
| US11362534B2 |
Battery with switched accumulators
A battery including: a power supply bus; an assembly of electric cells and of first switches coupling the cells; second switches forming an H bridge and coupling said assembly to nodes; a first circuit for supplying first control signals to the first and second switches; a second circuit for delivering a first power supply voltage to the first circuit based on the voltage across one of the cells; a third circuit for supplying second control signals to at least two of the second switches and connected to the power supply bus; and first diodes coupling the first circuit to the two second switches and second diodes coupling the third circuit to the two second switches. |
| US11362531B2 |
Audio adjustment method and electronic device thereof
A control method is provided for controlling an electronic device having a main body. The control method may include: in response to the electronic device being activated and a primary battery being functionally connected to the main body of the electronic device, controlling the primary battery to power the electronic device; and in response to the electronic device being activated and the primary battery being functionally disconnected from the main body of the electronic device, controlling a backup battery to power the electronic device. |
| US11362527B2 |
Fast charging method, terminal, charger, and system with open loop control
A charging method, a terminal, a charger, and a system, includes: obtaining, by a terminal, a charging mode supported by a charger connected to the terminal; when the charging mode supported by the charger includes an open-loop fast charging mode, detecting, by the terminal, whether both the terminal and the charger are in an open loop state; when both the terminal and the charger are in the open loop state, sending, by the terminal, an open-loop fast charging instruction to the charger; and receiving, by the terminal, a voltage and a current that are transmitted by the charger according to the open-loop fast charging instruction, and performing charging in the open-loop fast charging mode. When determining that the charger supports charging in the open-loop fast charging mode, the terminal is adjusted to the open loop state to perform charging, so as to shorten a charging time and improve user experience. |
| US11362526B2 |
Battery pack
A method of controlling a battery including a first control circuit and a plurality of modules arranged in series between a first terminal and a second terminal, each module of the plurality of modules including electric cells and switches coupling the electric cells and a second switch control circuit, the battery further including at least one first data transmission bus coupling the first control circuit to each second control circuit. The first control circuit includes a memory-having, for each electric cell, an identifier of said each electric cells and a priority level for connection of said each electric cell with other electric cells among priority levels stored therein. |
| US11362522B2 |
Systems and methods for managing a battery pack
A battery controller includes a first driving pin, a second driving pin and a third driving pin. The first driving pin is coupled to a charge switch and is operable for turning on the charge switch to enable a battery pack to be charged by a power source. The second driving pin is coupled to a first discharge switch and is operable for turning on the first discharge switch to enable the battery pack to power a first load. The third driving pin is coupled to a second discharge switch and is operable for turning on the second discharge switch to enable the battery pack to power a second load. |
| US11362516B2 |
Power management server and power management method
A power management server comprises a controller configured to manage a storage battery apparatus shared by a plurality of entities, and a receiver configured to receive requests each including an information element indicating a requested amount of power including at least one of a virtual discharge amount and a virtual charge amount of the storage battery apparatus. The controller is configured to manage power usage of the storage battery apparatus for each of the plurality of entities. The controller is configured to manage a virtual remaining power storage amount of the storage battery apparatus for each of the plurality of entities. The controller is configured to determine an allocated amount of power for the requested amount of power based on the power usage, when a constraint condition is satisfied by duplication of the requests. |
| US11362514B1 |
Transient surge protection unit
A dual transient surge and communication protection device, which can have less than 5 nanosecond response time and can provide communication and power transient surge protection for field instrumentation and be configured for operating under multiple communication protocols. The dual transient surge and communication protection device can have a positive power and communication terminal, a negative power and communication terminal, a grounding terminal, a first silicon avalanche diode array, a second silicon avalanche diode array, a first non-polar wire, a second non-polar wire, a grounding wire and a unit viability wire. The device provides protection from 4 milliamps to 20 milliamps of power and communication signals for field instruments. |
| US11362513B2 |
Hybrid overvoltage protection device and assembly
In one embodiment, an overvoltage protection device (100) may include a crowbar device (106), where the crowbar device (106) includes a first crowbar terminal (115), the first crowbar terminal (115) connected with a first external voltage line (102). The overvoltage protection device (100) may further include a transient voltage suppression (TVS) device (108), where the TVS device (108) includes a second TVS terminal (121), the second TVS terminal (121) connected with a second external voltage line (104). The crowbar device (106) and the TVS device (108) may be arranged in electrical series between the first crowbar terminal (115) and the second TVS terminal (121). |
| US11362512B2 |
Electronic switch with overvoltage limiter
An electronic switch for a DC voltage system includes at least two turn-off semiconductor switches, a varistor and a capacitor, and at least two diodes connected in series with opposite polarity. The turn-off semiconductor switches are connected at a connection point in series with opposite polarity between a first connection of the electronic switch and a second connection of the electronic switch. In order to provide improved overvoltage protection, the varistor and the capacitor form a series connection, with one end of the series connection connected to the connection point. A DC voltage system employing the electronic switch and a method for limiting overvoltages in the electronic switch or in a corresponding DC voltage system are also disclosed. Inductive energy of an element connected to the electronic switch is transferred to the capacitor when a limit, defined by the varistor, has been exceeded. |
| US11362506B2 |
Electrical safety system for providing overcurrent protection of an electrical circuit in a vehicle
An electrical safety system comprises a main safety device including a N-type transistor and an auxiliary safety device including a P-type transistor, alternately activated under command of a controller. The N-type transistor and the P-type transistor have the function of overcurrent protection, respectively in a first operating mode and in a second operating mode. The auxiliary safety device includes a passive component, connected in series with the P-type transistor, for providing a voltage drop when a current passes through the passive component, and a driving circuit for turning off the P-type transistor under control of the voltage drop exceeding a first threshold, in the second operating mode. |
| US11362505B2 |
Protective element and a fabrication method thereof
A protective element has a body, an inner connection layer, an outer connection layer, a heating layer and a low-melting-point alloy layer. The body is made of a single insulation material. The inner and outer connection layers are formed on two upper and lower surfaces of the body. The low-melting-point alloy layer is formed on the upper surface of the body and is electrically connected to the inner connection layer. The heating layer is mounted inside the body and is electrically connected to the low-melting-point alloy layer by the inner connection layer. The outer connection layer is electrically connected to the low-melting-point alloy layer and the heating layer. The outer connection layer is soldered on a power circuit. When the power circuit encounters overcurrent, the heating layer is heated to fuse the low-melting-point alloy layer faster. Thus, power circuit is cut to protect the power circuit. |
| US11362504B2 |
Over current sensing scheme for switch applications
Circuits and methods for protecting against over-current conditions of switches are described. Over-current conditions can damage switches and the circuits they connect. Some embodiments of the present application provide a sense switch in parallel with the load switch. The sense switch is smaller than the load switch, and is used to sense an over-current condition of the load switch. The sense switch can remain on even when the load switch is turned off in response to detection of an over-current condition. |
| US11362503B2 |
Method and device for cooling a superconducting current carrier
For the transmission of electrical current, determined superconducting current carriers are accommodated in a cryostat, in which they are cooled with an undercooled cryogenic cooling medium, e.g. liquid nitrogen. The current carrier is electrically connected at the ends thereof to two normally conducting current supply means. The cooling medium is undercooled from a storage container to a temperature below its boiling temperature and supplied to the cryostat via a cooling medium inlet, brought into thermal contact with the superconducting current carrier, and subsequently discharged via a cooling medium outlet of the cryostat. According to the invention, the cooling medium from the cryostat is to be used for cooling at least one of the normally conducting current supply means. |
| US11362496B2 |
Supporting element for a cable
A supporting element for positioning a cable in a hole includes a support part, a holder part joined together with the support part, and a cable opening extending through the support part and the holder part. The support part and the holder part are made from different materials. The cable opening receives the cable. The holder part has a retention element securing the supporting element within the hole. |
| US11362493B2 |
Locking structure, electrical connection box, and wire harness
A locking structure includes: a locking protrusion and a locking arm. The locking arm includes a flexible arm main body and an engaging projection portion protruding from an outer surface of the arm main body. The locking protrusion includes a protrusion main body on which an arm guide surface, a protruding tip surface, and an engaging surface are disposed along the engagement direction, and a jig groove that is formed in the protrusion main body. The engaging projection portion is formed on the outer surface at a position away from an arm tip of the arm main body in the engagement direction. The protruding tip surface is longer than the arm tip in the engagement direction. The jig groove cuts out the protrusion main body in the engagement direction from the arm guide surface to the protruding tip surface. |
| US11362488B2 |
Panelboard device
A panelboard device according to an embodiment includes a housing and multiple devices stored in the housing. At least one of the multiple devices includes a device main unit; a state detecting unit configured to detect a state of the device main unit; a light emitting unit; and a light emission control unit configured to acquire information indicating the state of the device main unit from the state detecting unit, and to cause the light emitting unit to transmit an optical signal including information indicating the state. |
| US11362486B2 |
High speed high bandwidth vertical-cavity surface-emitting laser with controlled overshoot
A vertical-cavity surface-emitting laser (VCSEL) is provided. The VCSEL includes a mesa structure disposed on a substrate. The mesa structure includes a first reflector, a second reflector, and an active cavity material structure disposed between the first and second reflectors. The second reflector has an opening extending from a second surface of the second reflector into the second reflector by a predetermined depth. Etching into the second reflector to the predetermined depth reduces the photon lifetime and the threshold gain of the VCSEL, while increasing the modulation bandwidth and maintaining the high reflectivity of the second reflector. Thus, etching the second reflector to the predetermined depth provides an improvement in overshoot control, broader modulation bandwidth, and faster pulsing of the VCSEL such that the VCSEL may provide a high speed, high bandwidth signal with controlled overshoot. |
| US11362480B2 |
Self-injection locked stimulated Brillouin scattering laser
Systems and methods for a self-injection locked SBS laser are provided herein. In certain embodiments, a system includes a pump laser source providing a pump laser; an SBS resonator receiving the pump laser through a first port and scattering some of the pump laser to provide an SBS laser through the first port, wherein a frequency shift of Brillouin scattering within the SBS resonator is an integer multiple of a free-spectral range for the SBS resonator; a filter receiving the pump laser on a first filter port and the SBS laser on a second filter port, wherein the pump laser is output through the second filter port and the SBS laser is output through a drop port; and a pump laser path coupling the output pump laser into the pump laser source, wherein a frequency of the pump laser becomes locked to a resonance frequency of the SBS resonator. |
| US11362475B2 |
Impingement cooling device for a laser disk and associated laser disk module
Impingement cooling devices for a laser disk include a carrier plate on the front side of which the laser disk can be secured, and a supporting structure, on the front side of which the rear side of the carrier plate is secured. The supporting structure has a plurality of cooling liquid feed lines from which the cooling liquid emerges in the direction of the rear side of the carrier plate and a plurality of cooling liquid return lines. The feed and return lines run parallel to one another in the longitudinal direction of the supporting structure, and the supporting structure includes a plurality of cutouts or the rear side of the carrier plate that are open toward the supporting structure, and the cooling liquid feed lines lead into and the cooling liquid return lines lead away from the plurality of cutouts. |
| US11362474B2 |
Generating quantum electrodynamic (QED) interactions using a parabolic transmission mirror
In a general aspect, quantum electrodynamic (QED) interactions are generated using a parabolic transmission mirror. In some aspects, a system for generating a QED interaction includes an optical pulse generator and a vacuum chamber. The vacuum chamber includes a parabolic transmission mirror in an ultra-high vacuum region within the vacuum chamber. The parabolic transmission mirror is configured to produce the QED interaction in the ultra-high vacuum region based on an optical pulse from the optical pulse generator. The parabolic transmission mirror includes an optical inlet at a first end and an optical outlet at a second, opposite end. The parabolic transmission mirror also includes a parabolic reflective surface about an internal volume of the parabolic transmission mirror between the first and second ends. The parabolic reflective surface extends from the optical inlet to the optical outlet and defines a focal point outside the internal volume of the parabolic transmission mirror. |
| US11362471B2 |
Contact and manufacturing method thereof
A contact and a manufacturing method thereof are provided. The contact includes a metal cylinder formed as a single body, the metal cylinder has an undulant sidewall having a slit, the sidewall of the metal cylinder includes a plurality of inward-concave structures and a plurality of outward-convex structures extending in a length direction of the metal cylinder, the plurality of inward-concave structures are recessed toward a central axis of the metal cylinder, and the plurality of outward-convex structures protrude away from the central axis of the metal cylinder. The contact according to the present disclosure may transmit a large current or signal, and have low loss in electric power. |
| US11362468B1 |
Coupling device for short-circuit protection
A coupling device is provided. The coupling device comprises a first connector with one or more primary pins and one or more drawers. The one or more drawers are configured to receive at least one of a fuse or a jumper. The one or more drawers are configured to be opened to permit the fuse or the jumper to be added or removed. The coupling device defines one or more recesses, and the one or more drawers are configured to be inserted into a recess of the one or more recesses to place the drawer in a closed state. In the closed state, the fuse or the jumper form part of an electrical circuit. |
| US11362467B2 |
Circuitry for detecting jack plug removal
The present disclosure relates to circuitry for detecting at least partial removal of an audio accessory plug from a corresponding socket. The circuitry comprises a monitoring unit comprising a first terminal configured to be electrically connected to a first socket contact of the socket that is in electrical contact with a first plug contact of the plug when the plug is fully received in the socket. The monitoring unit is configured to monitor a first impedance of a first signal path coupled to the first terminal, and the circuitry is configured to output a signal indicative of detection of at least partial removal of the plug from the socket in response to detection by the monitoring unit of a first predetermined sequence of impedance states of the first signal path. |
| US11362466B2 |
Electrical connector and connector assembly
An electrical connector includes an inner signal contact, an outer shielding contact, and a cover. The outer contact has a crimping portion including a first crimp wing and a second crimp wing that are bendable towards each other to attach the outer shielding contact to a cable such that ends of the first crimp wing and the second crimp wing extend towards each other when the outer shielding contact is attached to the cable. The cover is configured to cover a braid or a protective layer of the cable that is arranged underneath the ends of the crimp wings when the outer shielding contact is attached to the cable. |
| US11362465B2 |
Radio-frequency connector assembly
A radio-frequency connector assembly includes a radio-frequency line, connector male terminals, connector female terminals, and a circuit board, wherein each connector male terminal includes a male terminal substrate; each connector female terminal includes a female terminal substrate; the connector male terminal further includes a shielding case which shields the male terminal substrate and is conductive with the radio-frequency line in a grounding manner; and the connector female terminal further includes a shielding frame which is internally provided with the female terminal substrate and is circumferentially seamless entirely, and the bottom end of the shielding frame makes contact with the circuit board to form an annular contact region, so that signals of the connector female terminals will not leak sideways; and the shielding cases can prevent signal leakage and signal interference from the top of the shielding frame, so that matched signal terminals are kept in a fully-shielded operating environment. |
| US11362464B2 |
Contact arrangement, circuit board, and electronic assembly
A contact arrangement, including multiple contacts, is provided. The contacts are staggered. Some of the contacts form at least one contact group. The at least one contact group includes a pair of first contacts and eight second contacts. The pair of first contacts is a pair of differential signal contacts. The second contacts are arranged around the pair of first contacts. Two of the second contacts are arranged along a straight line perpendicular to a connecting line of the pair of first contacts. The position distribution and electrical properties of the other six of the second contacts are symmetrical to each other relative to the straight line. |
| US11362462B2 |
Rotatable interface assembly for an electrical connector
A rotatable interface assembly for an electrical connector, an electrical connector, a connector system, and a method for coupling the system is presented herein. The rotatable interface assembly includes a connector component, having an electrical contact for electrically connecting electrical elements via a corresponding counter connector. The rotatable interface assembly further includes a base part and a rotatable part. The base part at least partially houses the connector component and has a securing means for being secured to a fixed counterpart. The rotatable part being configured to receive the corresponding counter connector at least partially under a specific angular orientation. The rotatable part is arranged on the base part, so as to be rotatable around a rotational axis relative to the base part. The rotatable part can be rotated around the rotational axis in a desired angular orientation that matches an orientation of a corresponding counter connector, to allow to receive the corresponding counter connector under different angular orientations, relative to the base part. |
| US11362460B2 |
Connector
There is provided a connector including: a housing; and a terminal-equipped electric wire assembled to the housing. The terminal-equipped electric wire includes: a terminal; an electric wire; and a flexible conductor provided between the terminal and the electric wire. The flexible conductor is divided into a plurality of divided conductor portions along an axial direction of the flexible conductor. The divided conductor portions are bent in different directions from each other. |
| US11362457B2 |
Ganged coaxial connector assembly with alternative attachment structures
The present disclosure relates to a ganged coaxial connector assembly. The ganged coaxial connector assembly comprises a male connector including: a male connector body; and a plurality of unit male connectors arranged in the male connector body, wherein each unit male connector is configured as a 2.2-5 male connector interface and includes an inner contact, an outer contact and a dielectric spacer. The ganged coaxial connector assembly further comprises a female connector including: a female connector body; and a plurality of unit female connectors arranged in the female connector body, wherein the number of the unit female connectors is the same as that of the unit male connectors, and each unit female connecter corresponds to each unit male connector when the male connector and female connector are mated. The male connector may include a pair of stop plates and a biasing/sealing member interposed between the stop plates. |
| US11362455B2 |
Connector device using lid member, and lid member
Provided are: a connector device using a lid member having a simple structure and reliably held on a connector; and the lid member. The connector device includes a connector having a metal shell forming at least part of a fitting space in which a partner connector is fitted, and a resin lid member provided detachably from the fitting space. The lid member includes an insertion portion to be inserted into the fitting space along the direction of fitting the partner connector into the fitting space, and a closing portion configured to close an opening of the fitting space when the insertion portion is inserted into the fitting space. The insertion portion includes an elastic piece extending from the closing portion. The elastic piece includes a protruding portion biased to an inner wall of the shell when the insertion portion is inserted into the fitting space and protruding in a biasing direction. A dent portion dented in the biasing direction β1 is formed at the inner wall. The protruding portion is fitted in the dent portion when the insertion portion is inserted into the fitting space. |
| US11362451B2 |
Low insertion force contact and method of manufacture
A low insertion force contact includes a main body and a spring beam extending from the main body at a mating end of the low insertion force contact. The spring beam has a mating interface configured for mating electrical connection to a mating contact. The spring beam includes a conductive base layer extending to the mating interface. A silver coating layer is provided on the conductive base layer. The silver coating layer is provided at the mating interface. A silver sulfide surface layer forms a solid lubricant directly on the silver coating layer. The silver sulfide surface layer forms a film having a controlled thickness at the mating interface. |
| US11362448B2 |
Connector having latching pins that change angle for mounting to a circuit board
Described herein are connector components for selectively connecting to a PCB or other type of secondary device. Such a connector component comprises a body, electrically conductive contact pins, and latching pins. The body includes opposing sides at which are located pinch tabs. The electrically conductive contact pins and the latching pins each includes a portion thereof also extending from the bottom of the body. The pinch tabs are configured to normally bias the latching pins in a first position where the latching pins are angled relative to a central axis of the connector component when the pinch tabs are not being pinched inwards towards one another. Additionally, the pinch tabs are configured to bias the latching pins in a second position where the latching pins are substantially parallel to the central axis of the connector component when the pinch tabs are being pinched inward towards one another. |
| US11362447B2 |
Storage device with detachable capacitor connection structure
A detachable capacitor connection structure is provided for a storage device. In an embodiment, a connection element detachably connects a capacitor module including one or more capacitors to a circuit board such that the capacitor module is stacked over the circuit board. The connection element includes: a first connector including two pin headers, mounted on a bottom plane of the capacitor module; and a second connector including two sockets, mounted on a top plane of the circuit board corresponding to the bottom of the capacitor module, suitable for connecting the first connector to the circuit board. |
| US11362444B2 |
Laminated wire connector
An electrical connector and associated terminal are disclosed for making an electrical connection to a wire. The terminal includes a plurality of metal plates adjoining each other to form a stack that defines a passage for receiving the wire. The plates include a plurality of cutter plates disposed between a pair of outer holding plates. Each of the cutter plates has a pair of cutting edges for disrupting any insulation on the wire to permit a conductor of the wire to directly contact the cutter plate. One or more of the cutter plates may have a contact projection for making an electrical connection. The connector includes the terminal and may further include a housing. The holding plates of the terminal have outer edges with abutment features for engaging interior surfaces of the housing. |
| US11362443B2 |
Electronic device comprising antenna
Disclosed is an electronic device. The electronic device according to an embodiment includes a plurality of antennas, and a communication circuit electrically connected with the plurality of antennas. The communication circuit includes a plurality of circuits receiving a signal in a first band and is configured to simultaneously receive the signal in the first band through two or more circuits of the plurality of circuits from two or more antennas, which are positioned adjacent to each other, from among the plurality of antennas. The number of the plurality of antennas is the same as the number of plurality of circuits. |
| US11362440B2 |
Antenna device, wireless transmitter, wireless receiver, and wireless communication system
An antenna device includes a plurality of antenna elements. Each of the plurality of antenna elements outputs radio signals transmitted to another antenna device arranged so as to be opposed to the antenna device. At least one of the plurality of antenna elements is configured in such a way that a polarization direction of the radio signals to be output can be switched between a first direction and a second direction that is orthogonal to the first direction. |
| US11362435B2 |
Antenna array and vehicle including the same
An antenna array has wideband high gain characteristics and includes: a dielectric; a loop provided on a first surface of the dielectric and that has a first slot and a second slot; a first feed pin provided at a position corresponding to the first slot on a second surface of the dielectric; a second feed pin provided at a position corresponding to the second slot on the second surface of the dielectric; and a divider provided between the first feed pin and the second feed pin, and electrically connected to the loop. |
| US11362434B2 |
Electronic device including antenna
According to various embodiments of the present invention, disclosed is an electronic device comprising: a housing that comprises a front surface, a back surface opposite the front surface, and side surfaces surrounding a space between the front surface and the back surface and made of a metal material; at least one antenna array disposed within the housing so as to radiate a millimeter wave signal toward the inside of the electronic device; a wireless communication circuit electrically connected to the at least one antenna array and configured to communicate by using the millimeter wave signal; and a reflecting member arranged such that the millimeter wave signal radiated from the at least one antenna array is reflected toward the outside of the electronic device. In addition, various embodiments known from the specification are possible. |
| US11362433B2 |
Radar sensor having a plurality of main beam directions
A radar sensor having a plurality of main beam directions, and having a circuit board on which one or a plurality of antenna elements for transmitting and/or receiving of the radar radiation is/are situated. In addition, the radar sensor has at least one or a plurality of dielectric lenses which is/are situated in the optical path of the antenna elements, the optical axis of the dielectric lens being tilted in relation to the main beam direction of the at least one or the plurality of antenna elements under an angle that is greater than zero degrees so that at least one main beam direction of the radar sensor is fixed at a predefined angle to the vertical of the circuit board surface. |
| US11362432B2 |
Differential segmented aperture
A radio frequency (RF) aperture includes an interface printed circuit board. An array of electrically conductive tapered projections have bases disposed on a front side of the interface printed circuit board and extend away from the front side of the interface printed circuit board. Chip baluns are mounted on the back side of the interface printed circuit board. Each chip balun has a balanced port electrically connected with two neighboring electrically conductive tapered projections via electrical feedthroughs passing through the interface printed circuit board. Each chip balun further has an unbalanced port, and RF circuitry disposed at the back side of the interface printed circuit board is electrically connected with the unbalanced ports of the chip baluns. The electrically conductive tapered projections include dielectric tapered projections and an electrically conductive layer disposed on an inner or outer surface of the dielectric tapered projections. |
| US11362429B2 |
Electronic devices having antennas with loaded dielectric apertures
An electronic device may be provided with a conductive sidewall. An aperture may be formed in the sidewall. The sidewall may have a cavity that extends from the aperture towards the interior of the device. The cavity may be filled with an injection-molded plastic substrate. A dielectric block having a dielectric constant greater than that of the injection-molded plastic substrate and the antenna layers may be embedded in the injection-molded plastic substrate. The dielectric block may at least partially overlap an antenna. The antenna may convey radio-frequency signals at a frequency greater than 10 GHz through the cavity, the dielectric block, the injection-molded plastic substrate, and the aperture. The dielectric block may increase the effective dielectric constant of the cavity, allowing the antenna to cover relatively low frequencies without increasing the size of the aperture. |
| US11362425B2 |
Multi-band transmit-receive using circular polarization
The disclosure provides for a system for communication with a client device. The system includes a first transmitter configured to transmit a first signal and a second transmitter configured to transmit a second signal. The first signal is configured for a first communication band, and the second signal is configured for a second communication band different from the first communication band. The system also includes a hybrid coupler configured to split the first or second signal to a first part and a second part. In addition, the system also includes a first antenna configured to transmit the first part, and a second antenna configured to transmit the second part. The second antenna is oriented perpendicularly relative to an orientation of the first antenna. |
| US11362423B2 |
Non-contact type information processing device
A non-contact type information processing device structured to communicate with a medium in a non-contact manner may include a first circuit part having a first antenna, and the first circuit part may be configured to communicate with the medium at a first resonance frequency by electromagnetic induction. The non-contact type information processing device may further include a second circuit part having a second resonance frequency which is separated from the first resonance frequency, and the second circuit part may include a second antenna and a light emitting element which is operated by electric power obtained by an induced current that is received by the second antenna. |
| US11362420B1 |
Miniaturized printed ultra-wideband and bluetooth antenna
The present invention provides a printed miniaturized ultra-wideband (UWB) and Bluetooth antenna, comprising a dielectric substrate, a printed monopole antenna plate, a metal ground and a metal microstrip feed, wherein the printed monopole antenna plate is arranged on the front side of the dielectric substrate; the printed monopole antenna plate comprises first and second antenna elements configured to operate in the ultra wideband communication band and operate in the Bluetooth communication band respectively, and the first antenna and second antenna elements share the common metal ground and the metal microstrip feed; the first antenna element has a rectangular shape with rounded and smoothed corners; the right side of the first antenna element comprises a first antenna body, and a rectangular notch is etched from the left side of the first antenna element; the left side of the second antenna element comprises a second antenna body, and the right side of the second antenna element has a plurality of bent portions; and the plurality of bent portions are arranged inside of the rectangular notch of the first antenna element. The antenna provided by the present invention is miniaturized, so that an antenna with a compact structure is achieved which can cover two wireless standard frequency bands. |
| US11362415B2 |
Radio-frequency seal at interface of waveguide blocks
The described features include a scalable waveguide architecture for a waveguide device. The waveguide device may be split into one or more waveguide blocks instead of manufacturing increasingly larger single-piece waveguide devices. Described techniques provide for a radio-frequency (RF) seal between such waveguide blocks that may facilitate greater manufacturing tolerances while maintaining an effective RF seal at the junction of the waveguide blocks. The described techniques include channels within one or more waveguide blocks opening to the dielectric gap between the waveguide blocks. The channels may, for each of multiple waveguides joined at the interface between waveguide blocks, be included in one or both waveguide blocks and may be in a single waveguide dimension relative to the multiple waveguides, or extend for more than one waveguide dimensions. |
| US11362413B2 |
Antenna assembly
An antenna assembly and method are disclosed. The antenna assembly comprises: a printed circuit board assembly having a radiating element layer and a choke structure, the choke structure having a central conductor and a shielding structure, wherein the central conductor comprises at least a portion of the radiating element layer. By providing a printed circuit board assembly having a radiating element layer and a choke structure which utilises a portion of the radiating element layer, the manufacture of the radiating elements is simplified. |
| US11362410B2 |
Mounting configuration for small cell antenna assembly
A mounting flange for a monopole includes a generally annular main panel surrounding a central hole. The main panel includes a plurality of first mounting holes that are substantially circumferentially equidistant from each other and at a first radial distance from a center of the central hole. The main panel also includes a plurality of second mounting holes that are substantially circumferentially equidistant from each other and at a second radial distance from a center of the central hole, the second distance being greater than the first distance. |
| US11362408B2 |
Wireless control device having an antenna illuminated with visible light
A wireless control device, such as a system controller for a load control system, may comprise a light-transmissive cover for an antenna that may be illuminated to provide feedback to a user of the load control system. The light-transmissive cover may receive light energy from a light-generating circuit to provide a visible display of the light energy. The wireless control device may be mounted to, for example, a ceiling, and the light-transmissive cover may extend from the wireless control device (e.g., down from the ceiling). The light-transmissive cover may be viewed by a user at large viewing angles and at a distance away from the wireless control device, which may simplify and improve reliability of commissioning of the load control system as well as speed up troubleshooting of the load control system after commissioning is completed. |
| US11362403B2 |
Battery, battery management method, and battery control method
A battery includes a battery cell, an electronic circuit connected to the battery cell, and a conductive material layer connected to the electronic circuit. The conductive material is located outside the battery cell and separated from the battery cell by a distance. |
| US11362398B2 |
Nonaqueous electrolyte battery, battery pack and positive electrode
According to one embodiment, there is provided a nonaqueous electrolyte battery including a positive electrode, a negative electrode, a nonaqueous electrolyte and a separator. The positive electrode includes a positive electrode active material containing LixNi1-a-bCoaMnbMcO2 (0.9 |
| US11362396B2 |
Apparatus for collecting gas in secondary battery
A gas-collecting apparatus for collecting gas generated in a secondary battery including an electrode assembly and a rigid battery case accommodating the electrode assembly therein, the gas-collecting apparatus comprising: a pressing jig part for pressing one surface of the battery case; a gas collecting pipe provided with the pressing jig part; a sealing part inserted between the pressing jig part and one surface of the battery case; and a fixing unit for fixing the pressing jig part and the battery case with the sealing member inserted between the pressing jig part and the battery case, and the gas-collecting apparatus capable of easily collecting the gas regardless of the standard size and shape of the secondary battery. |
| US11362395B2 |
End cover assembly, secondary battery, battery pack and electric device
The disclosure relates to an end cover assembly, a secondary battery, a battery pack and an electric device. An end cover assembly for a secondary battery includes: an end cover; a first terminal including a first connecting section and a second connecting section disposed along a radial direction; a second terminal including a third connecting section, a fuse section and a fourth connecting section sequentially connected along the radial direction; along an axial direction, orthographic projections of the first and third connecting sections at least partially overlap with each other, one of the first and third connecting sections is configured to connect with a busbar, the other is configured to connect with an electrode assembly, the fourth connecting section is configured to connect with the second connecting section; and an insulating component, at least a part of which is located between the first connecting section and the third connecting section. |
| US11362393B2 |
Battery pack
The present disclosure provides a battery pack and a device comprising the battery pack, the battery pack comprises a double-layer battery module bracket, an upper-layer battery module, a lower-layer battery module and a supporting mechanism; the double-layer battery module bracket comprises an upper plate; a lower fixing member, an upper fixing member and a fastener; the lower fixing member and the upper plate are configured to enclose a lower accommodating space; the upper fixing member and the upper plate being are configured to enclose an upper accommodating space, a lower portion of the fastener exposed from the lower fixing member is fixed on the supporting mechanism; the upper-layer battery module is accommodated in the upper accommodating space and supported on the upper plate; the lower-layer battery module is accommodated in the lower accommodating space; the supporting mechanism supports the lower-layer battery module and the lower fixing member. |
| US11362390B2 |
Battery pack
A battery pack includes: a plurality of battery cells; a case providing an accommodation space for accommodating the battery cells and a cooling fluid for cooling the battery cells; and a barrier wall extending across the accommodation space and dividing the accommodation space into an upstream area in communication with an inlet for the cooling fluid and a downstream area in communication with an outlet for the cooling fluid. The barrier wall provides a communication area where the upstream area and the downstream area communicate with each other. The inlet and the outlet are at a first end of the barrier wall in an extension direction of the barrier wall, and the communication area is at a second end of the barrier wall in the extension direction of the barrier wall. |
| US11362389B2 |
Reusable pouch type secondary battery, battery module comprising the same and method of reusing battery module
A pouch type secondary battery in which an electrode lead of the pouch type secondary battery and an electrode lead of an adjacent different pouch type secondary battery are welded together to construct a battery module is provided. The electrode lead of the pouch type secondary battery includes a length extended part so that, after cutting a welded part of the electrode leads of the pouch type secondary battery and the adjacent different pouch type secondary battery to form electrode leads of remaining length, the electrode leads of remaining length are welded together again. A battery module and method of reusing the battery module are also provided. |
| US11362388B2 |
Battery pack and electric device
A battery pack is provided with a plurality of battery blocks each including a peripheral surface on one end of which a first connector is provided, a connecting unit which connects a plurality of battery blocks to each other such that two first connectors are opposed to each other, and a second connector which fits in the two first connectors opposed to each other. The battery block is rotationally fixed to the connecting unit. |
| US11362385B2 |
Button cell having winding electrode and method for the production thereof
A button cell configured as a secondary lithium ion battery includes a button cell housing and an electrode separator assembly disposed inside the button cell housing. The button cell housing includes a metal cell cup, the metal cell cup having a cell cup plane region connected to a cell cup lateral surface region, a metal cell top, the metal cell top having a cell top plane region connected to a cell top lateral surface region, and an electrically insulating seal disposed between the cell cup lateral surface region and the cell top lateral surface region. The electrode separator assembly includes a positive electrode formed from a first portion of a first current collector, a negative electrode formed from a first portion of a second current collector, and a separator disposed between the positive electrode and the negative electrode. |
| US11362384B2 |
Button cell having winding electrode and method for the production thereof
A button cell includes a button cell housing with a metal cell cup and a metal cell top. The metal cell cup has a cell cup plane region connected to a cell cup lateral surface region, and the metal cell top has a cell top plane region connected to a cell top lateral surface region. The cell cup plane region extends substantially parallel to the cell top plane region, the cell cup lateral surface region extends substantially parallel to and at least partially overlaps the cell top lateral surface region in an overlap area, an electrically insulating seal is disposed in the overlap area, and the cell cup lateral surface region and the cell top lateral surface region provide a force-fit connection therebetween to form a leaktight closure of the button cell housing. The button cell further includes an electrode winding disposed within the housing. |
| US11362383B2 |
Secondary battery
A secondary battery according to the present invention comprises an electrode assembly in which an electrode and a separator are alternately stacked and a battery case accommodating the electrode assembly therein, wherein the battery case comprises a stepped part that is disposed to be stepped, an outer surface of the battery case is sealed to allow a folded part to be seated on the outer surface of the stepped part, and the electrode assembly comprises a stepped protrusion that is stepped in a shape corresponding to an inner surface of the stepped part disposed on the battery case. |
| US11362379B2 |
Transportation refrigeration unit with integrated battery enclosure cooling
A transportation refrigeration unit is provided. The transportation refrigeration unit comprising: a compressor configured to compress a refrigerant; a compressor motor configured to drive the compressor; an evaporator heat exchanger operatively coupled to the compressor; an energy storage device for providing power to the compressor motor; and an evaporator fan configured to provide return airflow from a return air intake and flow the return airflow over the evaporator heat exchanger, wherein the return airflow thermodynamically adjusts a temperature of the energy storage device. |
| US11362374B2 |
System and method for storing a battery
The invention relates to system for storing a battery (3), wherein the system at least one battery (3) comprising at least one battery cell and a battery control (2), central control means (1) and a central voltage supply (5), wherein the battery control (2) is signal-conductively connected to the central control means (1) and the battery control (2) is fed by the central voltage supply (5). |
| US11362373B2 |
Method for regenerating lithium secondary battery
A method for regenerating a lithium secondary battery including a lithium resupply step in which a lithium resupply electrode is provided in the secondary battery, and the positive electrode is set as a counter electrode, and the lithium resupply electrode is set as a working electrode to charge lithium ions to the positive electrode through the lithium resupply electrode and a negative electrode discharging step in which, after the lithium ions are resupplied to the positive electrode through the lithium resupply step, the lithium resupply electrode is set as the counter electrode, and the negative electrode is set as the working electrode to completely discharge the negative electrode up to a discharge limit. |
| US11362370B2 |
Non-aqueous electrolyte for lithium-ion battery and lithium-ion battery
A non-aqueous electrolyte for a lithium-ion battery and a lithium-ion battery. The non-aqueous electrolyte comprises unsaturated phosphate compounds and unsaturated cyclic carboxylic acid anhydride compounds. The unsaturated phosphate compounds have the structure illustrated in structural formula 4; structural formula 4: R13, R11, and R12 are independently selected from hydrocarbon groups having 1-5 carbon atoms respectively, and at least one of R13, R11, and R12 is an unsaturated hydrocarbon group containing double bonds or triple bonds; the unsaturated cyclic carboxylic acid anhydride compounds have the structure illustrated in structural formula 5; structural formula 5: R14 is independently selected from vinylidene having 2-4 carbon atoms or fluoro-substituted vinylidene. By means of the synergistic effect of two compounds, the non-aqueous electrolyte has excellent high-temperature cycling performance and storage performance, and also has lower impedance and good low-temperature performance. |
| US11362369B2 |
Non-aqueous electrolyte of lithium-ion battery and lithium-ion battery
A lithium-ion battery non-aqueous electrolyte and a lithium-ion battery. The non-aqueous electrolyte comprises at least one selected from the compounds represented by structural formula I and II; in formula I, R1 and R2 are independently selected from alkenyl having 2-5 carbon atoms and alkynyl having 2-5 carbon atoms; in formula II, R3 is selected from alkenyl having 2-5 carbon atoms and alkynyl having 2-5 carbon atoms. The compound represented by formula I or II is added in the electrolyte; the compound contains unsaturated bond(s) and hexafluorisopropyl; the unsaturated bond(s) form passivation film on cathode and anode surfaces to inhibit decomposition of the electrolyte on the cathode & anode surface and damage of the cathode material structure; moreover, the polymerization degree of unsaturated bond(s) can be inhibited to some extent due to steric hindrance relationship of fluoroisopropyl functional groups, so as to improve high-temperature performance of the lithium-ion battery while guaranteeing low-temperature performance. |
| US11362368B2 |
Nonaqueous electrolyte compositions
Electrolyte compositions containing a solvent, a co-solvent, certain cyclic carboxylic acid anhydride additives, certain phosphorus-containing additives, and an electrolyte salt are described. The electrolyte compositions are useful in electrochemical cells, such as lithium ion batteries where they provide significantly improved cycle life with no loss of discharge capacity. |
| US11362367B2 |
Electrical energy storage device and a method of preparing the same
An electrical energy storage device and a method of forming such electrical energy storage device. The electrical energy storage device includes an electrolyte that is arranged to dissipate energy when subjected to external mechanical load applied to the electrical energy storage device. The electrolyte includes a polymer matrix of at least two crosslinked structures, including a first polymeric material and a second polymeric material; and an electrolytic solution retained by the polymer matrix. |
| US11362366B2 |
Secondary battery composite electrolyte, secondary battery, and battery pack
The present invention is provided to reduce the influence of expansion and contraction of an active material, form a favorable interface between the solid electrolyte and the active material, and increase ion conductivity in the electrolyte, thereby obtaining a wide operation temperature range. A secondary battery composite electrolyte includes an inorganic compound having an Li ion conductivity at room temperature that is 1×10−10 S/cm or more and having particle diameter of 0.05 μm or more and less than 8 μm, and an organic electrolyte. The weight ratio between the organic electrolyte and the inorganic compound is 0.1% or more and 20% or less. |
| US11362364B2 |
Battery
This application relates to a battery comprising a positive electrode plate, a separator, and a negative electrode plate, wherein the positive electrode plate comprises a positive electrode current collector and at least two layers of positive active material coated on at least one surface of the positive electrode current collector, and wherein an underlying positive active material layer in contact with the positive electrode current collector comprises a first positive active material, a first polymer material and a first conductive material; and wherein an upper positive active material layer in contact with the underlying positive active material layer and away from the positive electrode current collector comprises a second positive active material, a second polymer material and a second conductive material, and the first polymer material comprises fluorinated polyolefin and/or chlorinated polyolefin polymer material. The battery has good safety and improved electrical properties. |
| US11362361B2 |
Membrane-electrode assembly and method for manufacturing the same
Provided is a method for manufacturing a membrane-electrode assembly. The method includes forming an electrode layer, preparing a porous support layer, and positioning the electrode layer on each of both surfaces of the porous support layer and hot-pressing the electrode layer positioned on the both surfaces. The forming of the electrode layer incudes forming a functional layer including a hydrogen ion conductive binder resin on at least a portion of an electrode catalyst layer, and forming an electrolyte layer on at least a portion of the functional layer. The preparing of the porous support layer includes performing a pretreatment process by impregnating the porous support layer with a pretreatment composition, and the performing of the pretreatment process includes dipping the porous support layer in a first pretreatment composition and then drying the porous support layer, and dipping the porous support layer after drying in a second pretreatment composition. |
| US11362359B2 |
Redox flow battery system with electrochemical recovery cell
A redox flow battery system includes a redox flow battery that has a redox flow cell, and a supply/storage system external of the redox flow cell. The supply/storage system includes first and second electrolytes for circulation through the redox flow cell. At least the first electrolyte is an aqueous liquid electrolyte that has electrochemically active species with multiple, reversible oxidation states. There is a gas vent passage connected with the redox flow battery to receive water byproduct that evolves from side reaction of the first electrolyte. A bypass passage is connected with the supply/storage system to receive the aqueous electrolyte. An electrochemical recovery cell includes a first half-cell connected to the gas vent passage to receive as a reactant the water byproduct and a second half-cell connected to the bypass passage to receive as a reactant the first electrolyte. |
| US11362358B2 |
Fuel cell module
In a fuel cell module, a reformer and an evaporator provided adjacent to each other each extend to surround at least part of outer periphery of an exhaust gas combustion chamber as viewed in the direction of arrangement of the reformer and the evaporator. An auxiliary device case surrounds the outer periphery of the reformer and the evaporator with clearance. Both ends of the evaporator in the extension direction thereof are spaced from each other. The evaporator and the auxiliary device case are connected only by a first connector section at one position. The evaporator and the reformer are connected only by a second connector section at one position. Both ends of the reformer in the extension direction thereof are spaced from each other. The reformer and the auxiliary device case are connected only by a third connector section at one position. |
| US11362356B2 |
Fuel cell system
A fuel cell system includes a fuel cell, an injection device configured to inject anode gas, an ejector mechanism through which the anode gas injected from the injection device flows, a circulation path configured to return the anode gas, discharged from the fuel cell, to the ejector mechanism, a supply path configured to supply the anode gas, discharged from the fuel cell together with the anode gas injected from the injection device from the ejector mechanism, to the fuel cell, and a controller. |
| US11362354B2 |
Fuel cell system and fuel cell system control method
A fuel cell system that includes a fuel cell body that is formed by a membrane electrode assembly including an anode catalyst and a cathode catalyst between which an electrolyte membrane is sandwiched and a pair of separators forming an anode-catalyst-side flow channel and a cathode-catalyst-side flow channel, a fuel supply system configured to supply fuel gas to the fuel cell body, an oxidant supply system configured to supply oxidant gas to the fuel cell body, a control device that controls these supply systems in accordance with an operating state of the fuel cell system and a catalyst deterioration recovery device that recovers deterioration of the anode catalyst. The catalyst deterioration recovery device includes a plurality of catalyst deterioration recovery means, a specific operating state detecting means configured to detect a specific operating state of the fuel cell system and a selecting means configured to selectively activate the plurality of catalyst deterioration recovery means in accordance with the specific operating state. |
| US11362353B2 |
Fuel cell, control method for fuel cell, and computer readable recording medium
A fuel cell, a control method of the fuel cell, and a non-transitory computer readable recording medium recording a computer program capable of favorably generating power while suppressing leakage of gas and preventing the solenoid valve from being frozen with a simple configuration. The fuel cell includes a stack configure to generate electricity by reacting hydrogen and oxygen, an exhaust valve or a drain valve which is a solenoid valve discharging gas discharged from the stack to the outside, and a control unit configured to control energization of the exhaust valve. The exhaust valves are aligned in a gas discharging direction whereas the drain valves are aligned in a water discharging direction. If there is a risk of any solenoid valve being frozen, the control unit performs energization processing of energizing other solenoid valves in the state where at least one of the aligned solenoid valves is closed. |
| US11362346B2 |
Fuel cell system
A fuel cell system includes a fuel exhaust gas inlet channel for guiding a fuel exhaust gas containing liquid water discharged from a fuel cell stack to a gas liquid separator provided downstream of a humidifier in an oxygen-containing gas inlet channel. The specific gravity of the fuel exhaust gas is lighter than the specific gravity of the oxygen-containing exhaust gas. An outlet channel of the gas liquid separator includes a stirring booster having a first point and a second point positioned downstream of the first point. The second point is positioned ahead of the first point in the gravity direction. |
| US11362342B2 |
Catalyst for solid polymer fuel cells and method for producing the same
The present invention relates to a catalyst for solid polymer fuel cells in which catalyst particles including platinum are supported on a carbon powder carrier. The invention provides a catalyst for solid polymer fuel cells in which the ratio of zerovalent platinum to platinum present on the surfaces of the catalyst particles is 80% or more and 100% or less. In the platinum catalyst, excellent durability is exhibited in an environment of operating a solid polymer fuel cell, and the amount of platinum eluted at the time of immersing the catalyst in a predetermined sulfuric acid solution is lower as compared to conventional platinum catalysts. The invention provides a catalyst for solid polymer fuel cells excellent in both initial activity and durability. |
| US11362341B2 |
Catalyst slurry for fuel cells and method for manufacturing the same
Disclosed is a catalyst slurry for fuel cells and a method for manufacturing the same in which two kinds of ionomers having different equivalent weights (EWs) are used such that the respective ionomers may be formed at positions suitable for maximally exhibiting the functions thereof. |
| US11362340B2 |
Catalyst material for a fuel cell or an electrolyser and associated production method
The invention relates to a multi-component catalyst material for use in a fuel cell or electrolysis system, in particular in a regenerative fuel cell or reversible electrolyser.According to the invention, the catalyst material comprises a doped manganese oxide, a NiFe intercalation compound and a conductive carrier material, wherein the doped manganese oxide and the NiFe intercalation compound are supported on the carrier material. |
| US11362338B2 |
Electric vehicle battery cell with solid state electrolyte
A battery component includes a polymer frame having at least one window, the polymer frame having a first planar side and an opposite second planar side, and a window edge between the first and second planar sides. The battery component also has a battery cell component having a separator and bipolar current collector, the battery cell component being attached to the frame, the separator or bipolar current collector being attached to the first planar side or the window edge. A battery stack, a method for handling the battery component as an individual unit are also provided, electric vehicle battery and electric vehicle are also provided. |
| US11362337B2 |
Electrodeposited copper foil and electrode, and lithium-ion secondary battery comprising the same
Provided are an electrodeposited copper foil, an electrode comprising the same, and a lithium-ion secondary battery comprising the same. The electrodeposited copper foil has a drum side and a deposited side opposing the drum side, wherein at least one of the drum side and the deposited side exhibits a void volume value (Vv) in the range of 0.17 μm3/μm2 to 1.17 μm3/μm2; and an absolute value of a difference between a maximum height (Sz) of the drum side and a Sz of the deposited side is in the range of less than 0.60 μm. |
| US11362335B2 |
Coated sulfur particle electrode and method
A coated sulfur particle and methods are shown. In one example, the coated sulfur particles are used as an electrode in a battery, such as a lithium ion battery. |
| US11362333B2 |
Cobalt-free layered oxide cathodes
A cathode and a battery providing the cathode is provided. The cathode comprises a lithium metal oxide. The lithium metal oxide comprises nickel, aluminum, and iron. The lithium metal oxide is substantially free of cobalt. The battery comprises an anode, the cathode, a separator, and an electrolyte. |
| US11362332B2 |
Positive electrode active material for lithium secondary battery, method of preparing the same, and positive electrode for lithium secondary battery and lithium secondary battery which include the positive electrode active material
A method of preparing a positive electrode active material includes mixing a lithium raw material and a nickel-containing transition metal hydroxide precursor containing nickel in an amount of 65 mol % or more based on a total number of moles of transition metals and performing a first heat treatment to prepare a nickel-containing lithium transition metal oxide. The method also includes mixing a boron and carbon-containing raw material and a cobalt-containing raw material with the nickel-containing lithium transition metal oxide to form a mixture, and performing a second heat treatment on the mixture to form a coating material including B and Co on a surface of the lithium transition metal oxide. A positive electrode active material prepared by the preparation method is formed, and a positive electrode for a lithium secondary battery and a lithium secondary battery which include the positive electrode active material. |
| US11362328B2 |
Composite-coated nano-tin negative electrode material and preparation method and use thereof
The invention provides a composite-coated nano-tin negative electrode material, which comprises a tin-based nanomaterial, a nano-copper layer coated on the surface of the tin-based nanomaterial and a conductive protective layer coated on the surface of the nano-copper layer. The nano-copper layer can inhibit the volume expansion of nano-tin, keep the nano-tin material from cracking, avoid direct contact between nano-tin and electrolyte to form stable SEI and increase the conductivity of the electrode. Coating a conductive layer on the surface of the nano-copper layer can effectively inhibit the oxidation of nano-copper, thus improving its electrochemical performance. The composite-coated nano-tin negative electrode material according to the invention is used as a negative electrode material of a lithium-ion battery, has excellent electrochemical performance, and has potential application prospects in portable mobile devices and electric vehicles. |
| US11362318B2 |
Lithium ion secondary battery
A purpose of one embodiment of the present invention is to provide a lithium ion secondary battery which comprises lithium nickel composite oxide having high nickel content in a positive electrode and has excellent battery characteristics. The first lithium ion secondary battery of the present invention comprises a lithium nickel composite oxide represented by the following formula and carbon nanotubes in a positive electrode, wherein a ratio (a)/(b) of an average length (a) of the carbon nanotubes to an average particle size (b) of primary particles of the lithium nickel composite oxide is 0.5 or more, LiyNi(1-x)MxO2 wherein 0≤x≤0.4, 0 |
| US11362316B2 |
Battery having hybrid cathode configuration
Batteries having hybrid electrode configurations are disclosed herein. In one embodiment, a battery comprises an electrode assembly. The electrode assembly comprises a first cathode including a first cathode active material, a second cathode including a second cathode active material different from the first cathode active material, a first anode disposed between the first cathode and the second cathode, a first separator interposed between the first cathode and the first anode, and a second separator interposed between the second cathode and the first anode. |
| US11362313B2 |
Manufacturing method and processing device for display substrate each applying magnetic field during aging current being generated
The present disclosure provides a manufacturing method and a processing device for a display substrate. The display substrate includes a light emitting device. The manufacturing method includes: applying an electrical signal to the display substrate to generate aging current flowing through the light emitting device; and applying a magnetic field to the display substrate for at least part of a time, during which the electrical signal is applied to the display substrate. The magnetic field is used to increase the aging current. |
| US11362309B2 |
Display device including a filling pattern
A display device comprises a first substrate comprising at least one light-emitting element; a second substrate facing the first substrate, wherein light emitted from the light-emitting element is to be incident on the second substrate; and a filling layer between the first substrate and the second substrate, wherein the filling layer comprises a filling pattern comprising a first pattern part on the first substrate and having a curve portion formed in at least a part thereof. |
| US11362305B2 |
Display device and method of manufacturing the same
A display device and a method of manufacturing a display device are provided. A manufacturing method of a display apparatus includes forming a display module including a first area and including a display panel including lower and upper surfaces opposite each other, a first film under the lower surface of the display panel, a second film on the upper surface of the display panel, and an adhesive layer between the lower surface of the display panel and the first film; weakening an adhesive force of a first adhesive portion of the adhesive layer in the first area to be weaker than an adhesive force of a second adhesive portion of the adhesive layer outside the first area; cutting the first film and the adhesive layer; and removing a portion of the first film and the first adhesive portion from the first area. |
| US11362304B2 |
Display device and method of manufacturing the same
A display device and a method of manufacturing the same are provided. A display device includes: a plastic substrate including: a display portion including organic light emitting diodes, and a pad portion including chip-on-films, a lower protective member attached to an entire lower surface of the plastic substrate, and an upper protective member attached to an upper surface of the plastic substrate, the upper protective member covering at least the display portion and both edges of the pad portion. |
| US11362303B2 |
Display substrate, display apparatus, and method of fabricating display substrate
A display substrate has a display area and a peripheral area. The display substrate includes a base substrate; a first insulating layer on the base substrate and in at least the peripheral area; a plurality of light emitting elements on the base substrate and in the display area; and an encapsulating layer on a side of the plurality of light emitting elements distal to the base substrate to encapsulate the plurality of light emitting elements. The encapsulating layer includes a first inorganic encapsulating sublayer extending from the display area into the peripheral area. The display substrate has a groove extending into the first insulating layer in the peripheral area, forming a first perimeter substantially surrounding the display area. The first inorganic encapsulating sublayer extends into at least a portion of the groove. |
| US11362302B2 |
Array substrate, manufacturing method thereof and display panel
An array substrate, a manufacturing method thereof and a display panel. After a metal layer is formed on a substrate, a protective layer is formed on the metal layer. |
| US11362299B2 |
Cover window and display device having multiple radii of curvature
A cover window including a flat portion and a curved portion extending from an end of the flat portion. The curved portion of the cover window includes a first section, a second section, and a third section, where the second section is disposed between the first section and the third section, an inner surface of the cover window contacts with an adhesive layer, a first radius of curvature having an average value of a radius of curvature of the inner surface of the cover window in the first section is greater than a second radius of curvature having an average value of a radius of curvature in the second section, and a third radius of curvature having an average value of a radius of curvature of the inner surface of the cover window in the third section is greater than the second radius of curvature. |
| US11362298B2 |
Electroluminescent device
Broadly speaking, embodiments of the present invention provide a solid state light-emitting device and a method of manufacturing the solid state light-emitting device. The method comprises preparing a thin layer of semiconducting perovskite nanoparticles embedded in a matrix or blend of a material that has a wider band gap than the semiconducting perovskite nanoparticles. In embodiments, the method comprises blending a solution of a semiconducting perovskite material or a precursor therefor with a solution of a material that has a wider band gap than the semiconducting perovskite material or a precursor therefor followed by removal of the solvent from the mixture thus formed, to give the semiconducting perovskite nanoparticles embedded in a matrix or blend of the material that has a wider band gap than the semiconducting perovskite nanoparticles. |
| US11362295B2 |
Organic electroluminescent device
The present disclosure relates to the technical field of display, and specifically relates to an organic electroluminescent device, and in particular, to a highly efficient fluorescence device. An organic electroluminescent device includes a hole transport layer, and a light-emitting layer. The hole transport layer and the light-emitting layer has an interface exciplex formed at an interface therebetween. |
| US11362294B2 |
Organic light-emitting diode and display panel
Provided is an organic light-emitting diode. The organic light-emitting diode includes a first electrode, a second electrode, a light-emitting layer and a hole blocking layer, where the first electrode and the second electrode are oppositely disposed; the light-emitting layer is disposed between the first electrode and the second electrode; the hole blocking layer is disposed between the light-emitting layer and the second electrode; and the hole blocking layer includes at least two hole blocking sub-layers which are stacked, where a lowest unoccupied molecular orbital (LUMO) energy level decreases sequentially in the at least two hole blocking sub-layers. |
| US11362288B2 |
Flexible display substrate and its deformably driving method, a display device
The disclosure relates to the technical field of display, and provides a flexible display screen, a method for deformably driving the same, and a display device. The flexible display screen includes a flexible display panel and a deformable driver disposed on a back surface of the flexible display panel. The deformable driver drives the flexible display panel to deform based on the electrodeformation. The deformable driver includes a plurality of deformable units arranged in an array. The flexible display screen can achieve deformation with a variety of degrees of freedom, and can precisely control the deformation, thereby easy to achieve ultra-thin screen design. |
| US11362286B2 |
Organic electroluminescence device and heterocyclic compound for organic electroluminescence device
An organic electroluminescence device includes a first electrode, a hole transport region disposed on the first electrode, a light emitting layer disposed on the hole transport region, an electron transport region disposed on the light emitting layer, and a second electrode disposed on the electron transport region. The light emitting layer includes a heterocyclic compound represented by Formula 1 below. In Formula 1, D1 and D2 are each independently represented by Formula 2 below, and A is represented by any one of Formulas 3-1 to 3-3 below. D1-A-D2 Formula 1 |
| US11362279B2 |
Aromatic amine derivative, and organic electroluminescent element using same
An aromatic amine derivative represented by formula (1): wherein R1, R2, R3, L, Ar1, Ar2, k, m, and n are the same as defined in the specification, is useful as a material for an organic EL device and realizes an organic EL device with a high efficiency and a long lifetime even when driving it at a low voltage. |
| US11362276B2 |
High thermal stability SiOx doped GeSbTe materials suitable for embedded PCM application
A phase-change material having specific SiOx doping into special Ge-rich GexSbyTez material is described. Integrated circuits using this phase-change material as memory elements in a memory array can pass the solder bonding criteria mentioned above, while exhibiting good set speeds and demonstrating good 10 year data retention characteristics. A memory cell described herein comprises a first electrode and a second electrode; and a memory element in electrical series between the first and second electrode. The memory element comprises a GexSbyTez phase change material with a silicon oxide additive, including a combination of elements having Ge in a range of 28 to 36 at %, Sb in a range of 10 to 20 at %, Te in a range of 25 to 40 at %, Si in a range of 5 to 10 at %, and O in a range of 12 to 23 at %. |
| US11362275B2 |
Annealing processes for memory devices
Exemplary methods of forming a memory structure may include forming a layer of a transition-metal-and-oxygen-containing material overlying a substrate. The substrate may include a first electrode material. The methods may include annealing the transition-metal-and-oxygen-containing material at a temperature greater than or about 500° C. The annealing may occur for a time period less than or about one second. The methods may also include, subsequent the annealing, forming a layer of a second electrode material over the transition-metal-and-oxygen-containing material. |
| US11362274B2 |
Laterally switching cell having sub-stoichiometric metal oxide active layer
A laterally switching cell structure including a metal-insulator-metal stack includes an active metal oxide layer including one or more sub-stoichiometric regions. The metal oxide layer includes one or more metal-oxides deposited conformally using a mixed precursor atomic layer deposition process. A graded oxygen profile in the metal oxide layer(s) of the stack including a mirrored impurity density may be formed wherein the sub-stoichiometric region(s) include a relatively high density of impurities obtained as reaction by-products. Arrays of cell structures can be formed with no requirement for a thick active electrode, allowing for more space for a metal fill and optional selector, thereby reducing access resistance. |
| US11362272B2 |
Resistive memory device and reliability enhancement method thereof by using ratio of set current and reference current
A resistive memory device and a reliability enhancement method thereof are provided. The reliability enhancement method includes the following steps. A forming operation is performed on a plurality of memory cells. The formed memory cells are read to respectively obtain a plurality of formed currents. A reference current is set according to a statistic value of the formed currents. A setting operation is performed on the memory cells. A ratio between a set current of each of the memory cells and the reference current is calculated, and a physical status of each of the memory cells is judged according to the ratio. It is determined whether to perform a fix operation of each of the memory cells or not according to physical status. |
| US11362268B2 |
Semiconductor structure and associated operating and fabricating method
A semiconductor structure is provided. The semiconductor structure includes: a substrate; a magnetic layer over the substrate; a magnetic tunnel junction (MTJ) cell over the magnetic layer; and a non-magnetic conductive layer between the magnetic layer and the MTJ cell. An associated method for fabricating the semiconductor structure is also disclosed. |
| US11362267B2 |
Memory device having resistance switching element surrounding top electrode and integrated circuit device including the same
A memory device includes a substrate, an etch stop layer, a protective layer, and a resistance switching element. The substrate has a memory region and a logic region, and includes a metallization pattern therein. The etch stop layer is over the substrate, and has a first portion over the memory region and a second portion over the logic region. The protective layer covers the first portion of the etch stop layer. The protective layer does not cover the second portion of the etch stop layer. The resistance switching element is over the memory region, and the resistance switching element is electrically connected to the metallization pattern through the etch stop layer and the protective layer. |
| US11362264B2 |
Electrical contact structure and methods for forming the same
An electrical contact structure and a method for forming the electrical contact structure are provided. The method includes forming a thin film material layer on a substrate, forming a first barrier layer on the thin film material layer and forming a metal layer on the first barrier layer. The method further includes patterning the metal layer to form a metal pattern, forming a spacer on a sidewall of the metal pattern and covering a portion of the first barrier layer. The method further includes etching the first barrier layer, wherein the portion of the first barrier layer located under the spacer is not completely etched. The method further includes removing the spacer and exposing the sidewall of the metal pattern to form an electrical contact structure on the thin film material layer, wherein the first barrier layer has a protrusion part exceeding the sidewall of the metal pattern. |
| US11362261B2 |
Multi-layer piezoelectric ceramic component and piezoelectric device
A multi-layer piezoelectric ceramic component includes: a piezoelectric ceramic body having a cuboid shape having upper and lower surfaces facing in a thickness direction, first and second end surfaces facing in a length direction, and a pair of side surfaces facing in a width direction; first internal electrodes formed in the piezoelectric ceramic body and drawn to the first end surface; second internal electrodes formed in the piezoelectric ceramic body and drawn to the second end surface; a first terminal electrode formed on the first end surface; and a second terminal electrode formed on the second end surface, the first and second internal electrodes each having a width equal to a distance between the pair of side surfaces, at least one of the pair of side surfaces including a groove extending in non-parallel with the length direction. |
| US11362258B2 |
EAP actuator and drive method
An electroactive polymer actuator includes an electroactive polymer structure and a driver for providing an actuation drive signal. In one aspect, a first drive level is used to charge the electroactive polymer structure from a non-actuated state to an actuated state. When or after the electroactive polymer structure reaches the actuated state, a lower second drive level is used to hold the electroactive polymer structure at the actuated state. This temporary overdrive scheme improves the speed response without damaging the electroactive polymer structure. In another aspect, a driving method makes use of several different level segments over time, which compensates for the delayed actuation response of the EAP actuator. |
| US11362256B2 |
Functional high-performance fiber structure
A method is provided for growing a fiber structure, where the method includes: obtaining a substrate, growing an array of pedestal fibers on the substrate, growing fibers on the pedestal fibers, and depositing a coating surrounding each of the fibers. In another aspect, a method of fabricating a fiber structure includes obtaining a substrate and growing a plurality of fibers on the substrate according to 1½D printing. In another aspect, a multilayer functional fiber is provided produced by, for instance, the above-noted methods. |
| US11362252B2 |
Thin film thermoelectric generator
Various examples of thin film thermoelectric (TE) devices, their fabrication and applications are presented. In one example, a thin film TE device includes a first substrate including a void; a p-type TE element attached to the first substrate at a first end and extending over the void to a second end; an n-type TE element attached to the first substrate at a first end and extending over the void to a second end adjacent to the second end of the p-type TE element; and an interconnection coupling the second ends of the p-type TE element and the n-type TE element. In some examples, TE device layers can be vacuum sealed between a supporting substrate and a transparent substrate. A thermal spreader can include TE modules having a distribution of TE elements that operate in generating or cooling modes to cool IC or device hotspots using self-generated power. |
| US11362247B2 |
Semiconductor device, method of fabricating the same, and display device including the same
A semiconductor device includes a substrate including a first region and a second region that are arranged in a first direction that is parallel to an upper surface of the substrate; a separation layer provided on the first region of the substrate; a high electron mobility transistor (HEMT) device overlapping the separation layer in a second direction that is perpendicular to the upper surface of the substrate; a light-emitting device provided on the second region of the substrate; and a first insulating pattern covering a side surface of the HEMT device, wherein the first insulating pattern overlaps the separation layer in the second direction. |
| US11362245B2 |
Semiconductor structure and micro semiconductor display device
A semiconductor structure includes a substrate, a plurality of micro semiconductor devices and a fixing structure. The micro semiconductor devices are disposed on the substrate. The fixing structure is disposed between the substrate and the micro semiconductor devices. The fixing structure includes a plurality of conductive layers and a plurality of supporting layers. The conductive layers are disposed on the lower surfaces of the micro semiconductor devices. The supporting layers are connected to the conductive layers and the substrate. The material of each of the conductive layers is different from the material of each of the supporting layers. |
| US11362244B2 |
Light-emitting diode display
A light-emitting diode display having sub-pixel regions is provided. Each of the sub-pixel region includes a substrate, first and second electrodes, a light-emitting diode, and at least one blocking wall. The substrate has an active device. The first and second electrodes are separately disposed on the substrate. The first electrode is electrically connected to the active device, and a horizontal distance between the first and second electrodes is W1. The light-emitting diode is disposed on the substrate and includes a semiconductor stack, and first and second pads. The first pad contacts the first electrode, the second pad contacts the second electrode, and a maximum thickness of the semiconductor stack is H1. The blocking wall is disposed on the substrate and located between the first and second pads to prevent a contact therebetween. A height of the blocking wall is H2 and a width thereof is W2. H2≤½H1, and W2≤W1. |
| US11362243B2 |
Optical coupling layer to improve output flux in LEDs
An optical coupling structures are disposed on light output surfaces of semiconductor LEDs of a miniLED or microLED array to facilitate coupling of light emitted by the semiconductor LEDs through the light output surfaces. The optical coupling structures comprise light scattering particles and/or air voids embedded in or coated with a thin layer of a material that has an index of refraction close to or matching the index of refraction of the material forming the light output surface of the semiconductor LEDs. |
| US11362235B2 |
Substrate structuring methods
The present disclosure relates to methods and apparatus for structuring a semiconductor substrate. In one embodiment, a method of substrate structuring includes applying a resist layer to a substrate optionally disposed on a carrier. The resist layer is patterned using ultraviolet radiation or laser ablation. The patterned portions of the resist layer are then transferred onto the substrate by micro-blasting to form desired features in the substrate while unexposed or un-ablated portions of the resist layer shield the rest of the substrate. The substrate is then exposed to an etch process and a de-bonding process to remove the resist layer and release the carrier. |
| US11362234B2 |
Local patterning and metallization of semiconductor structures using a laser beam
Local patterning and metallization of semiconductor structures using a laser beam, e.g., micro-electronic devices, semiconductor substrates and/or solar cells, are described. For example, a method of fabricating a solar cell includes providing a substrate having an intervening layer thereon. The method also includes locating a metal foil over the intervening layer. The method also includes exposing the metal foil to a laser beam, wherein exposing the metal foil to the laser beam forms openings in the intervening layer and forms a plurality of conductive contact structures electrically connected to portions of the substrate exposed by the openings. |
| US11362226B1 |
Solar cell string, photovoltaic module and manufacturing methods therefor
A method for manufacturing a solar cell string includes: providing a first adhesive layer, wherein the first adhesive layer includes N placement regions being used for N solar cells respectively; placing the N solar cells on the placement regions; laying first wires on a surface of at least one solar cell away from the first adhesive layer, and stretching the first wires across adjacent placement regions to electrically connect two adjacent solar cells; disposing a second adhesive layer on the surface of the at least one solar cell of the N solar cells away from the first adhesive layer, wherein the first wires are located between the second adhesive layer and the at least one solar cell; performing a pressing treatment to bond and fix the first adhesive layer, the first wires, the at least one solar cell of the N solar cells and the second adhesive layer. |
| US11362218B2 |
Method of forming split gate memory cells with thinned side edge tunnel oxide
A memory device includes a semiconductor substrate with memory cell and logic regions. A floating gate is disposed over the memory cell region and has an upper surface terminating in opposing front and back edges and opposing first and second side edges. An oxide layer has a first portion extending along the logic region and a first thickness, a second portion extending along the memory cell region and has the first thickness, and a third portion extending along the front edge with the first thickness and extending along a tunnel region portion of the first side edge with a second thickness less than the first thickness. A control gate has a first portion disposed on the oxide layer second portion and a second portion vertically over the front edge and the tunnel region portion of the first side edge. A logic gate is disposed on the oxide layer first portion. |
| US11362217B1 |
Method of forming transistors of different configurations
The present disclosure provides semiconductor devices and methods of forming the same. A semiconductor device of the present disclosure includes a first source/drain feature and a second source/drain feature over a substrate, a plurality of channel members extending between the first source/drain feature and the second source/drain feature, a gate structure wrapping around each of the plurality of channel members, and at least one blocking feature. At least one of the plurality of channel members is isolated from the first source/drain feature and the second source/drain feature by the at least one blocking feature. |
| US11362213B2 |
Method for manufacturing a FinFET device with a backside power rail and a backside self-aligned via by etching an extended source trench
A semiconductor structure includes a power rail on a back side of the semiconductor structure, a first interconnect structure on a front side of the semiconductor structure, and a source feature, a drain feature, a first semiconductor fin, and a gate structure that are between the power rail and the first interconnect structure. The first semiconductor fin connects the source feature and the drain feature. The gate structure is disposed on a front surface and two side surfaces of the first semiconductor fin. The semiconductor structure further includes an isolation structure disposed between the power rail and the drain feature and between the power rail and the first semiconductor fin and a via penetrating through the isolation structure and connecting the source feature to the power rail. |
| US11362212B2 |
Contact interface engineering for reducing contact resistance
A structure includes a transistor including a first source/drain region, a source/drain contact plug over and electrically coupling to the first source/drain region, and a via over and contacting the source/drain contact plug. The via has a bottom portion having a first length, and an upper portion having a second length. The first length is greater than the second length. Both of the first length and the second length are measured in a same direction parallel to a top surface of the source/drain contact plug. |
| US11362203B2 |
Electrical overstress protection for electronic systems subject to electromagnetic compatibility fault conditions
Electrical overstress protection for electronic systems subject to electromagnetic compatibility fault conditions are provided herein. In certain implementations, a stacked thyristor protection structure with a high holding voltage includes a protection device having a trigger voltage and a holding voltage. A trigger voltage of the stacked thyristor protection structure is substantially equal to the trigger voltage of the protection device. The stacked thyristor protection structure further includes at least one resistive thyristor electrically connected to the protection device and operable to increase a holding voltage of the stacked thyristor protection structure relative to the holding voltage of the protection device. The at least one resistive thyristor comprising a PNP bipolar transistor and a NPN bipolar transistor that are cross-coupled, and a conductor connecting a collector of the PNP bipolar transistor to a collector of the NPN bipolar transistor. |
| US11362199B2 |
Semiconductor device and method
In an embodiment, a method includes: forming a fin extending from a substrate, the fin having a first width and a first height after the forming; forming a dummy gate stack over a channel region of the fin; growing an epitaxial source/drain in the fin adjacent the channel region; and after growing the epitaxial source/drain, replacing the dummy gate stack with a metal gate stack, the channel region of the fin having the first width and the first height before the replacing, the channel region of the fin having a second width and a second height after the replacing, the second width being less than the first width, the second height being less than the first height. |
| US11362198B2 |
Semiconductor structure and method of forming the same
A method of forming a semiconductor structure including: forming a drift well in a substrate, in which the drift well includes first dopants having a first conductivity type; forming an isolation structure over the drift well; forming a well region in the drift well and spaced apart from the isolation structure, such that a top portion of the drift well is between the well region and the isolation structure; doping the top portion with second dopants having a second conductivity type different from the first conductivity type, such that a doping concentration of the second dopants in the top portion is lower than a doping concentration of the first dopants in the top portion after doping the top portion; and forming a gate structure extending from the isolation structure to the well region and covering the top portion of the drift well. |
| US11362197B2 |
Semiconductor device with controllable channel length and manufacturing method of semiconductor device with controllable channel length
A semiconductor device is disclosed. A semiconductor device according to an example of the present disclosure includes a gate electrode of a ring shape having an opening area on a substrate; a P-type deep well region formed in the opening area; a drain region formed on the P-type deep well region; an N-type well region overlapping with the gate electrode; a source region formed in the N-type well region; a bulk tab region formed by being isolated from the source region by a first isolation region; a P-type drift region formed in contact with the N-type well region; and a second isolation region formed near the bulk tab region. |
| US11362192B2 |
Method of fabricating diode structure
A method of manufacturing a diode structure includes forming a first stack on a silicon layer on a substrate. A first sidewall spacer extending along and covering a sidewall of the first stack is formed. The silicon layer is selectively etched to a first predetermined depth, thereby forming a second stack. The remaining silicon layer includes a silicon base. A second sidewall spacer extending along and covering a sidewall of the second stack is formed. The silicon base is selectively etched to form a third stack on the substrate. With the second sidewall spacer as a mask, lateral plasma ion implantation is performed. Defects at the interface between two adjacent semiconductor layers can be reduced by the method. |
| US11362191B2 |
Semiconductor device and method for making the same
The present disclosure relates to a hybrid integrated circuit. In one implementation, an integrated circuit may have a first region with a first gate structure having a ferroelectric gate dielectric, at least one source associated with the first gate of the first region, and at least one drain associated with the first gate structure of the first region. Moreover, the integrated circuit may have a second region with a second gate structure having a high-κ gate dielectric, at least one source associated with the second gate structure of the second region, and at least one drain associated with the second gate structure of the second region. The integrated circuit may further have at least one trench isolation between the first region and the second region. |
| US11362189B2 |
Stacked self-aligned transistors with single workfunction metal
Embodiments include transistor devices and a method of forming the transistor devices. A transistor device includes a first conductive layer over a substrate, a first transistor having first interconnects in the first conductive layer, and a second conductive layer on an insulating layer that is on the first conductive layer. The transistor device also includes a second transistor having second interconnects in the second conductive layer, and a gate electrode over the substrate, where the gate electrode has a workfunction metal that surrounds the first and second interconnects. The first and second conductive layers may include conductive materials such as an epitaxial (EPI) layer, a metal layer, or a doped-semiconductor layer. The transistor device may further include a dielectric surrounding the interconnects as the dielectric is surrounded with the workfunction metal, and a transition layer disposed between the dielectric and interconnects. The dielectric may include a high-k dielectric material. |
| US11362187B2 |
Semiconductor devices including capping layer
A semiconductor device includes first and second active regions on a substrate, an element isolation layer between the first and second active regions, a dummy gate line, dummy gate spacers at opposite side walls of the dummy gate line, and a dummy gate capping layer on the dummy gate line and. An upper surface of the element isolation layer is proximate to an upper surface of the substrate in relation to an upper end of the first active region in a vertical direction. The dummy gate line includes a horizontal section extending on the first active region to the element isolation layer in a horizontal direction, and a vertical section extending downwards from the horizontal section along a side wall of the first active region, the dummy gate line having an L shape, a vertical thickness of the horizontal section being smaller than a vertical thickness of the vertical section. |
| US11362184B2 |
Contact structure for power semiconductor devices
A transistor device includes field plate contacts that electrically connect overlying contact pads to field electrodes in underlying trenches, and mesa contacts that electrically connect the contact pads to semiconductor mesas confined by the trenches. Each field plate contact is divided into field plate contact segments that are separated from one another. Each mesa contact is divided into mesa contact segments that are separated from one another. In a first area adjacent to an end of the trenches, a first line that runs perpendicular to the trenches intersects a first field plate contact segment of the field plate contacts and a first mesa contact segment of the mesa contacts. In a second area spaced inward from the first area, a second line that runs perpendicular to the trenches intersects a second field plate contact segment of the field plate contacts and a second mesa contact segment of the mesa contacts. |
| US11362183B2 |
Semiconductor device including fin and method for manufacturing the same
A semiconductor device includes a substrate; and a fin protruding from the substrate. The fin includes a first material and a second material. The fin includes a lower section, a middle section, and an upper section. The middle section has a smaller width at a middle portion than a width at lower and upper portions of the middle section. A concentration of the second material gradually decreases from the middle portion in upward and downward directions. |
| US11362181B2 |
Method for manufacturing an electronic component having multiple quantum dots
A process for fabricating an electronic component with multiple quantum dots is provided, including providing a stack including a substrate, a nanostructure made of semiconductor material superposed over the substrate and including first and second quantum dots and a link linking the quantum dots, first and second control gate stacks arranged on the quantum dots, the gate stacks separated by a gap, the quantum dots and the link having a same thickness; partially thinning the link while using the gate stacks as masks to obtain the link, a thickness of which is less than that of the quantum dots; and conformally forming a dielectric layer on either side of the gate stacks so as to fill the gap above the partially thinned link. An electronic component with multiple quantum dots is also provided. |
| US11362177B2 |
Epitaxial semiconductor material regions for transistor devices and methods of forming same
One illustrative transistor of a first dopant type disclosed herein includes a gate structure positioned above a semiconductor substrate and first and second overall epitaxial cavities formed in the semiconductor substrate on opposite sides of the gate structure. The device also includes a counter-doped epitaxial semiconductor material positioned proximate a bottom of each of the first and second overall epitaxial cavities, wherein the counter-doped epitaxial semiconductor material is doped with a second dopant type that is opposite to the first dopant type, and a same-doped epitaxial semiconductor material positioned in each of the first and second overall epitaxial cavities above the counter-doped epitaxial semiconductor material, wherein the same-doped epitaxial semiconductor material is doped with a dopant of the first dopant type. |
| US11362176B2 |
RFSOI semiconductor structures including a nitrogen-doped charge-trapping layer and methods of manufacturing the same
A semiconductor-on-insulator (SOI) substrate includes a handle substrate, a charge-trapping layer located over the handle substrate and including nitrogen-doped polysilicon, an insulating layer located over the charge-trapping layer, and a semiconductor material layer located over the insulating layer. The nitrogen atoms in the charge-trapping layer suppress grain growth during anneal processes used to form the SOI substrate and during subsequent high temperature processes used to form semiconductor devices on the semiconductor material layer. Reduction in grain growth reduces distortion of the SOI substrate, and facilitates overlay of lithographic patterns during fabrication of the semiconductor devices. The charge-trapping layer suppresses formation of a parasitic surface conduction layer, and reduces capacitive coupling of the semiconductor devices with the handle substrate during high frequency operation such as operations in gigahertz range. |
| US11362174B2 |
Method of manufacturing semiconductor device and semiconductor device
A method of manufacturing semiconductor device of an embodiment includes performing a first ion implantation implanting at least one element selected from a group consisting of beryllium (Be), magnesium (Mg), calcium (Ca), strontium (Sr), barium (Ba), zinc (Zn), cadmium (Cd), silicon (Si), germanium (Ge), and tin (Sn) into a nitride semiconductor layer; performing a second ion implantation implanting nitrogen (N) into the nitride semiconductor layer; performing a third ion implantation implanting hydrogen (H) into the nitride semiconductor layer; forming a covering layer on a surface of the nitride semiconductor layer after the first ion implantation, the second ion implantation, and the third ion implantation; performing a first heat treatment after forming the covering layer; removing the covering layer after the first heat treatment; and performing a second heat treatment after removing the covering layer. |
| US11362170B2 |
Metal-insulator-metal (MIM) capacitor structure and method for forming the same
A metal-insulator-metal (MIM) capacitor structure and a method for forming the same are provided. The MIM capacitor structure includes a substrate, and the substrate includes a capacitor region and a non-capacitor region. The MIM capacitor structure includes a first electrode layer formed over the substrate, and a first spacer formed on a sidewall of the first electrode layer. The MIM capacitor structure includes a second electrode layer formed over the first electrode layer, and a second spacer formed on a sidewall of the second electrode layer. The second spacer is in direct contact with an interface between the second electrode layer and a first dielectric layer. |
| US11362161B2 |
Display device
A display device includes pixels. Each of the pixels includes: a first transistor including a gate electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node; a second transistor including a gate electrode connected to a first scan line, a first electrode connected to a data line, and a second electrode connected to the second node; a first sub-transistor including a gate electrode connected to the first scan line, a first electrode connected to the first node, and a second electrode connected to a fourth node; and a second sub-transistor including a gate electrode connected to the first scan line, a first electrode connected to the fourth node, and a second electrode connected to the third node. A channel width of the second sub-transistor is wider than a channel width of the first sub-transistor. |
| US11362155B2 |
Display substrate, manufacturing method thereof and display device
A display substrate includes a substrate; a first pixel defining layer on the substrate, wherein the first pixel defining layer has a first container portion therein; a planarization pattern filled in the first container portion, wherein a surface of the planarization pattern distal to the substrate is flush with a surface of the first pixel defining layer distal to the substrate; a second pixel defining layer on a side of the planarization pattern distal to the substrate, wherein a second container portion is in the second pixel defining layer and penetrates through the second pixel defining layer along a stacking direction of the first pixel defining layer and the substrate, and an orthographic projection of the second container portion on the substrate falls within an orthographic projection of the first container portion on the substrate; and an organic functional layer in the second container portion. |
| US11362154B2 |
Array substrate, method for manufacturing same, and display device
Disclosed are an array substrate, a method for manufacturing the same, and a display device. The array substrate includes a base substrate and an organic light-emitting diode (OLED), a photoelectric conversion layer and a light-filtering layer which are on the base substrate, wherein the OLED and the light-filtering layer both are on a side, distal from the base substrate, of the photoelectric conversion layer, an orthographic projection of the photoelectric conversion layer on the base substrate is at least partially overlapped with an orthographic projection of the light-filtering layer on the base substrate, the orthographic projection of the photoelectric conversion layer on the base substrate is outside an orthographic projection of the OLED on the base substrate, the light-filtering layer is light transmittable, and a transmittance of the light-filtering layer to light in a target band is smaller than or equal to a transmittance thresholds. |
| US11362152B2 |
Array substrate, electroluminescent panel and display device
The present disclosure provides an array substrate, an electroluminescent panel and a display device, to solve the problems of more manufacturing processes and complex structures of the large-sized OLED display panel in the related art. The array substrate includes: a substrate, a plurality of light sensors on the substrate, a flat layer on the light sensor, and a connected electrode layer on the flat layer, wherein each of the light sensors includes a first electrode, a photosensitive layer and a second electrode arranged in sequence on the substrate; wherein the connected electrode layer is connected with the second electrode through a via hole penetrating through the flat layer. |
| US11362149B2 |
Organic light emitting diode display substrate having a band gap layer and manufacturing method thereof
An organic light emitting diode display substrate includes a light emitting unit layer, a first band gap layer and a color conversion layer. The first band gap layer and the color conversion layer are on a light exit path of the light emitting unit layer. The light emitting unit layer includes first, second and third light emitting units periodically arranged on a driving substrate and emitting light of a first color. The color conversion layer converts a part of the light of the first color into light of a second color and a third color. The first band gap layer is between the light emitting unit layer and the color conversion layer. The first band gap layer transmits the light of the first color in a light exit direction, and reflects the light of the second color and the light of the third color. |
| US11362148B2 |
Quantum dot display panel and manufacturing method thereof
The present invention provides a quantum dot display panel and a manufacturing method thereof. The present invention includes a pixel definition layer on a surface of a color film substrate, a quantum dot photoconversion film located on pixel definition regions of the pixel definition layer, and a blue light display device located under the quantum dot photoconversion film. An uplift layer and a light-shielding layer are arranged in the pixel definition layer to ensure that a thickness of the pixel definition layer is greater than or equal to 6 μm, which is beneficial to uniform curing of quantum dots in the quantum dot photoconversion film. |
| US11362147B2 |
Display device
A display device includes: a substrate including: first to third subpixels, an insulating layer including a trench on the substrate between at least two among the first to third subpixels, a first electrode on the insulating layer in each of the first to third subpixels, a fence in each of the first to third subpixels, the fence surrounding an edge of the first electrode, a light-emitting layer on the first electrode, the fence, and the insulating layer, a second electrode on the light-emitting layer, and a color filter layer including: a first color filter in the first subpixel, a second color filter in the second subpixel, and a third color filter in the third subpixel, wherein the second color filter is wider than the first color filter, and wherein the second color filter partially overlaps the first subpixel. |
| US11362145B2 |
Organic light emitting device and method of manufacturing the same
An OLED including a substrate; a circuit region; reflective metal layers on the circuit region and including first to third reflective metal layers spaced apart from each other; an insulating layer including first to third insulating regions covering upper surfaces of the reflective metal layers and having a first to third thicknesses that are different from one another; first to third via plugs penetrating through the insulating layer to contact the reflective metal layers, first electrodes in contact with the via plugs, and covering a portion of an upper surface of the insulating layer; an organic light emitting layer on the first electrodes; and a second electrode on the organic light emitting layer, wherein the first to third via plugs include tungsten. |
| US11362144B2 |
Display panel with variable micro-cavity lengths for sub-pixels, method for fabricating the same and display device
A display panel, a method for fabricating the same, and a display device are provided. The display panel includes: a base substrate, and a plurality of pixels in an array on the base substrate, wherein each pixel includes a plurality of sub-pixels; each sub-pixel includes: a reflecting element on the base substrate, a first electrode on the reflecting element, a light-emitting element on the first electrode, and a second electrode on the light-emitting element; and in each of the pixels, micro-cavity lengths corresponding to the sub-pixels are different, wherein the micro-cavity length is the distance between the side of the reflecting element away from the base substrate and the side of the second electrode proximate to the base substrate. |
| US11362143B2 |
Nonvolatile memory device having three-dimensional structure
A nonvolatile memory device according to an embodiment includes a substrate, and a gate structure disposed on the substrate and including a hole pattern. The gate structure includes at least one gate electrode layer and at least one interlayer insulation layer which are alternately stacked, and the gate electrode layer protrudes toward a center of the hole pattern relative to the interlayer insulation layer. The nonvolatile memory device includes a first functional layer disposed along a sidewall surface of the gate structure inside the hole pattern, a second functional layer disposed on the first functional layer inside the hole pattern, and a channel layer extending in a direction perpendicular to the substrate inside the hole pattern and disposed to contact a cell portion of the second functional layer. The cell portion of the second functional layer indirectly covers a sidewall surface of the gate electrode layer. |
| US11362141B2 |
Variable resistance memory device
A variable resistance memory device includes lower conductive lines on a substrate, upper conductive lines on the lower conductive lines to cross the lower conductive lines, and memory cells between the lower conductive lines and the upper conductive lines. The lower conductive lines are extended in a first direction and are spaced apart from each other in a second direction crossing the first direction. Each of the lower conductive lines include a first line portion extended in the first direction, a second line portion offset from the first line portion in the second direction and extended in the first direction, and a connecting portion connecting the first line portion to the second line portion. |
| US11362140B2 |
Word line with air-gap for non-volatile memories
Integrated circuits including 3D memory structures are disclosed. Air-gaps are purposefully introduced between word lines. The word lines may be horizontal or vertical. |
| US11362138B2 |
Devices and systems incorporating energy harvesting components/devices as autonomous energy sources and as energy supplementation, and methods for producing devices and systems incorporating energy harvesting components/devices
An electrically-powered device, structure and/or component is provided that includes an attached electrical power source in a form of a unique, environmentally-friendly energy harvesting element or component. The energy harvesting component provides a mechanism for generating autonomous renewable energy, or a renewable energy supplement, in the integrated circuit system, structure and/or component. The energy harvesting element includes a first conductor layer, a low work function layer, a dielectric layer, and a second conductor layer that are particularly configured in a manner to promote electron migration from the low work function layer, through the dielectric layer, to the facing surface of the second conductor layer in a manner that develops an electric potential between the first conductor layer and the second conductor layer. The energy harvesting component includes a plurality of energy harvesting elements electrically connected to one another to increase an electrical power output. |
| US11362137B2 |
Optoelectronic device comprising a matrix of three-dimensional diodes
The disclosure relates to an optoelectronic device comprising: a plurality of separate first electrodes that extend longitudinally in parallel to an axis A1, each first electrode being formed of a longitudinal conductive portion and a conductive nucleation strip, the longitudinal conductive portion having an electrical resistance lower than that of the conductive nucleation strip; a plurality of diodes; at least one intermediate insulating layer covering the first electrodes; and a plurality of separate second electrodes in the form of transparent conductive strips that extend longitudinally in contact with second doped portions, and are electrically insulated from the first electrodes by means of the intermediate insulating layer, parallel to an axis A2, the axis A2 not being parallel to axis A1. |
| US11362132B2 |
Integrated radiation detector device
According to an embodiment, a device comprises: a scintillator layer configured to convert x-ray or gamma ray photons into photons of visible light; a photodiode layer configured to convert visible light produced by the scintillator layer into an electric current; an integrated circuit, IC, layer situated below the photodiode layer and configured to receive and process the electric current; wherein electrical contacts of the IC layer are connected to electrical contacts of the photodiode layer using wire-bonding; and wherein the wire-bonding is covered with a protective material while bottom part of the IC layer is left at least partly exposed. Other embodiments relate to a detector comprising an array of tiles according to the device; and an imaging system comprising: an x-ray source and the detector. |
| US11362128B2 |
Electronic device package and fabricating method thereof
Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 μm or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof. |
| US11362127B2 |
Light detection device
A photodetecting device includes a semiconductor substrate, a plurality of avalanche photodiodes each including a light receiving region disposed at a first principal surface side of the semiconductor substrate, the avalanche photodiodes being arranged two-dimensionally at the semiconductor substrate, and a through-electrode electrically connected to a corresponding light receiving region. The through-electrode is provided in a through-hole penetrating through the semiconductor substrate in an area where the plurality of avalanche photodiodes are arranged two-dimensionally. At the first principal surface side of the semiconductor substrate, a groove surrounding the through-hole is formed between the through-hole and the light receiving region adjacent to the through-hole. A first distance between an edge of the groove and an edge of the through-hole surrounded by the groove is longer than a second distance between the edge of the groove and an edge of the light receiving region adjacent to the through-hole surrounded by the groove. |
| US11362123B2 |
Imaging device, camera module, and electronic apparatus to enhance sensitivity to light
The present technology relates to an imaging device, a camera module, and an electronic apparatus that make it possible to reduce a profile of the camera module and to enhance sensitivity. The imaging device includes: a semiconductor substrate in which a light receiving section is formed that includes a plurality of pixels performing photoelectric conversion; and a reinforcing member that is disposed on side of the light receiving section of the semiconductor substrate and includes an opening in which a part opposed to the light receiving section is opened. The present technology is applicable to, for example, an imaging device that captures an image, a camera module that focuses light to capture an image, an electronic apparatus equipped with a camera function, a vehicle control system that is mounted on a vehicle, an endoscopic surgery system that is used in an endoscopic surgery, and the like. |
| US11362119B2 |
Array substrate
The present disclosure provides a method of manufacturing array substrate, including: providing a substrate; and forming a metal layer, a gate layer, an insulation layer, and a protective layer on the substrate sequentially. Wherein, the metal layer is formed on a drive line on the substrate, and the metal layer is arranged in at least one of a position between the substrate and the insulation layer and a position between the insulation layer and the protective layer. In the present disclosure, an electrostatic discharge path is increased through the floating metal layer. Even though the floating metal layer is burned down, a display quality would not be affected, the product yield is improved. Besides, it only needs to adjust a photomask pattern. Therefore, a production procedure needs not to be adjusted. |
| US11362117B2 |
Manufacturing method of array substrate, array substrate, and display device
The present application provides a method of manufacturing an array substrate, the array substrate, and a display device. In the method, a photoresist layer is removed by a plasma cleaning technique after performing etching to prevent a gate electrode of the array substrate from contacting a stripping solution, thereby preventing a metal layer of the gate electrode from being corroded by the stripping solution. |
| US11362116B2 |
Display panel with bendable edge portion and display device including display panel thereof
The disclosure provides a display panel including a substrate layer, a thin film transistor (TFT) layer, and a gate on array (GOA) drive circuit. The TFT layer is disposed on the substrate layer, and a bending region is disposed on at least one side of the substrate layer near the TFT layer. The GOA drive circuit is disposed on the substrate layer, and the bending region is disposed between at least one side of the TFT layer and the GOA drive circuit. The auxiliary circuit is disposed on the substrate layer and is disposed correspondingly to the bending region. |
| US11362109B2 |
Integrated power amplifier
The semiconductor structure includes a semiconductor-on-insulator (SOI) substrate. A group III nitride transistor is formed in a trench in the SOI substrate. The activation of the group III nitride transistor is controlled by a silicon-based transistor. The silicon-based transistor that includes a portion of a silicon layer of the SOI substrate. A group III nitride transistor device is adjacent to the silicon-based transistor. |
| US11362108B2 |
Semiconductor structure with a logic device and a memory device being formed in different levels, and method of forming the same
The present disclosure provides a semiconductor structure, including: a first layer including a logic device; and a second layer over the first layer, including a first type memory device, a though silicon via (TSV) electrically connecting the logic device and the first type memory device. A method of forming semiconductor structure is also disclosed. |
| US11362107B2 |
Nonvolatile memory device having a ferroelectric layer
A nonvolatile memory device according to an embodiment includes a substrate having an upper surface, a source electrode structure disposed on the substrate, and a channel structure disposed over the substrate and disposed to contact one sidewall surface of the source electrode structure. In addition, the nonvolatile memory device includes a drain electrode structure disposed to contact one sidewall surface of the channel structure over the substrate. In addition, the nonvolatile memory device includes a plurality of ferroelectric structures extending in a first direction perpendicular to the substrate in the channel structure and disposed to be spaced apart from each other along the second direction perpendicular to the first direction. In addition, the nonvolatile memory device includes a gate electrode structure disposed in each of the plurality of ferroelectric structure to extend along the first direction. |
| US11362106B2 |
Manufacturing method of a nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state. |
| US11362103B2 |
Memory arrays, and methods of forming memory arrays
Some embodiments include a memory array having a vertical stack of alternating insulative levels and wordline levels. Channel material extends along the stack. Conductive segments are along the wordline levels. Each of the conductive segments has, along a cross-section, first and second ends in opposing relation to one another. The conductive segments include gates and wordlines adjacent the gates. The wordlines encompass the second ends, and the gates have rounded (e.g., substantially parabolic) noses which encompass the first ends. Some embodiments include methods of forming integrated assemblies. |
| US11362099B2 |
Non-volatile memory device and manufacturing method thereof
A non-volatile memory device includes a substrate, a stacked structure, an anti-fuse gate, a gate dielectric layer, a first doping region, and a second doping region. The stacked structure is formed on the substrate and includes a floating gate, a select logic gate, a logic gate dielectric layer, and an inter-polysilicon layer dielectric layer. The select logic gate is disposed on the floating gate, the logic gate dielectric layer is disposed between the floating gate and the substrate, and the inter-polysilicon layer dielectric layer is disposed between the floating gate and the select logic gate. The anti-fuse gate is disposed on the substrate, and the gate dielectric layer is disposed between the anti-fuse gate and the substrate. The first doping region is formed in the substrate at one side of the floating gate. The second doping region is formed in the substrate between the floating gate and the anti-fuse gate. |
| US11362097B1 |
One-time programmable memory device and fabrication method thereof
A semiconductor memory device includes at least an OTP cell having a transistor and a PN junction diode. The OTP cell further includes a substrate having a first conductivity type, and a source and a drain in the substrate. The source includes a source doping region having the first conductivity type. The drain includes a drain doping region having a second conductivity type opposite to the first conductivity type. A gate is disposed on the substrate between the source and the drain. The source further includes a pocket doping region having the second conductivity type under the gate. The pocket doping region and the source doping region constitute the PN junction diode. |
| US11362093B2 |
Co-integration of non-volatile memory on gate-all-around field effect transistor
A method of performing co-integrated fabrication of a non-volatile memory (NVM) and a gate-all-around (GAA) nanosheet field effect transistor (FET) includes recessing fins in a channel region of the NVM and the FET to form source and drain regions adjacent to recessed fins, and removing alternating portions of the recessed fins of the NVM and the FET to form gaps in the recessed fins. A stack of layers that make up an NVM structure are conformally deposited within the gaps of the recessed fins leaving second gaps, smaller than the gaps, and above the recessed fins of the NVM while protecting the FET with the organic planarization layer (OPL) and a block mask. The OPL and block mask are removed from the FET, and another OPL and another block mask protect the NVM while a gate of the FET is formed above the recessed fins and within the gaps. |
| US11362088B2 |
Semiconductor integrated circuit device having a standard cell which includes a fin and a dummy transistor
Disclosed herein is a semiconductor integrated circuit device including a standard cell with a fin extending in a first direction. The fin and a gate line extending in a second direction perpendicular to the first direction and provided on the fin constitute an active transistor. The fin and a dummy gate line provided in parallel with the gate line constitute a dummy transistor. The active transistor shares a node as its source or drain with the dummy transistor. |
| US11362087B2 |
Systems and methods for fabricating FinFETs with different threshold voltages
Systems and methods are provided for fabricating semiconductor device structures on a substrate. A first fin structure is formed on a substrate. A second fin structure is formed on the substrate. A first semiconductor material is formed on both the first fin structure and the second fin structure. A second semiconductor material is formed on the first semiconductor material on both the first fin structure and the second fin structure. The first semiconductor material on the first fin structure is oxidized to form a first oxide. The second semiconductor material on the first fin structure is removed. A first dielectric material and a first electrode are formed on the first fin structure. A second dielectric material and a second electrode are formed on the second fin structure. |
| US11362083B2 |
TVS diode circuit with high energy dissipation and linear capacitance
A TVS circuit having a first diode with a cathode coupled to a first terminal and an anode coupled to a first node. A second diode has an anode coupled to a second node and a cathode coupled to a third node. A third diode is coupled between the first node and second node. A fourth diode is coupled between the first node and third node. A fifth diode is coupled between the second node and a second terminal. A sixth diode is coupled between the second terminal and the third node. A seventh diode can be coupled between the second terminal and an intermediate node between the fifth diode and sixth diode. The first diode is disposed on a first semiconductor die, while the second diode is disposed on a second semiconductor die. Alternatively, the first diode and second diode are disposed on a single semiconductor die. |
| US11362082B2 |
Implanted substrate contact for in-process charging control
A substrate contact diode is disclosed. The substrate contact includes a first type substrate implant tap in a substrate, a second type epitaxial implant in an epitaxial layer that is on the substrate, and a first type epitaxial region above the second type epitaxial implant. A contact electrode that extends upward from the top of the first type epitaxial region to the surface of an interlayer dielectric that surrounds the contact electrode. |
| US11362081B2 |
Semiconductor device, display device, and electronic apparatus
To prevent an electrostatic damage on a display device formed with a driving circuit. Protective circuits are provided not only at input terminal parts, but also at intermediate parts of a circuit or at the ends of wiring lines. Otherwise, the protective circuits are provided at the ends of the wiring lines and at the places immediately before and after the input terminals, respectively, and then the circuit is interposed therebetween. Further, the protective circuits are provided around a circuit with a large current consumption. |
| US11362079B2 |
Bonded die assembly containing a manganese-containing oxide bonding layer and methods for making the same
A method of forming a bonded assembly includes providing a first semiconductor die containing a first substrate, first semiconductor devices, first dielectric material layers overlying the first semiconductor devices, and first metal interconnect structures, providing a second semiconductor die containing a second substrate, second semiconductor devices, second dielectric material layers overlying the second semiconductor devices, and second metal interconnect structures, depositing a manganese layer on a top surface of the first dielectric material layers, disposing the second semiconductor die on the manganese layer such that a surface of the second dielectric material layers contacts the manganese layer, and performing a bonding anneal to bond the first semiconductor die to the second semiconductor die and to convert the manganese layer into a manganese-containing oxide layer, such that the manganese-containing oxide layer is bonded to the first dielectric material layers and the second dielectric material layers. |
| US11362070B2 |
Microelectronic device assemblies and packages including multiple device stacks and related methods
Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more stacks of microelectronic devices are located on the substrate, and microelectronic devices of the stacks are connected to vertical conductive paths external to the stacks and extending to the substrate and to lateral conductive paths extending between the stacks. Methods of fabrication are also disclosed. |
| US11362068B2 |
Semiconductor package including a fillet layer
A semiconductor package includes a base substrate having a first semiconductor substrate, and a first protective layer covering a top side thereof. A first semiconductor chip is on the first protective layer. A first fillet layer fills a space between the first protective layer and the first semiconductor chip. A first side surface of the base substrate extends in a first direction, and second and third side surfaces extend in a second direction. The base substrate includes two corner regions and a side region between the corner regions. A first protective layer in the side region includes a first side trench which overlaps the first semiconductor chip. A part of the first fillet layer fills the first side trench. |
| US11362065B2 |
Package and manufacturing method thereof
A package includes a first die, a second die, an encapsulant, and a redistribution structure. The first die has a first capacitor embedded therein. The second die has a second capacitor embedded therein. The second die is stacked on the first die. The first capacitor is electrically connected to the second capacitor. The encapsulant laterally encapsulates the second die. The redistribution structure is disposed on the second die and the encapsulant. |
| US11362059B2 |
Manufacturing method and manufacturing apparatus for stacked substrate, and program
A manufacturing method for manufacturing a stacked substrate by bonding two substrates includes: acquiring information about crystal structures of a plurality of substrates; and determining a combination of two substrates to be bonded to each other, based on the information about the crystal structures. In the manufacturing method described above, the information about the crystal structures may include at least one of plane orientations of bonding surfaces and crystal orientations in a direction in parallel with the bonding surfaces. In the manufacturing methods described above, the determining may include determining a combination of the two substrates with a misalignment amount after bonding being equal to or smaller than a predetermined threshold. |
| US11362057B2 |
Chip package structure and manufacturing method thereof
A chip package structure includes a substrate, at least two chips, a plurality of first pads, a plurality of first micro bumps, and a bridging element. The substrate has a first surface and a second surface opposite to the first surface. The two chips are disposed on the first surface of the substrate and are horizontally adjacent to each other. Each chip has an active surface. The first pads are disposed on the active surface of each of the chips. The first micro bumps are disposed on the first pads and have the same size. The bridging element is disposed on the first micro bumps such that one of the chips is electrically connected to another of the chips through the first pads, the first micro bumps, and the bridging element. |
| US11362055B2 |
Bump structure of the semiconductor package
The semiconductor package has a metal layer, a first dielectric layer formed on a metal layer, and an opening formed through the first dielectric layer to expose a part of the metal layer. The bump structure has an under bump metallurgy (hereinafter UBM), a first buffer layer and a metal bump. The UBM is formed on the first part of the metal layer, a sidewall of the opening and a top surface of the first dielectric layer. The first buffer layer is formed between a part of the UBM corresponding to the top surface of the first dielectric layer and the top surface of the first dielectric layer. The metal bump is formed on the UBM. Therefore, the first buffer layer effectively absorbs a thermal stress to avoid cracks generated in the bump structure after the bonding step. |
| US11362054B2 |
Semiconductor package and method of manufacturing the same
A semiconductor package includes a chip including a pad; a first insulation pattern on the chip and exposing the pad; a redistribution layer (RDL) on an upper surface of the first insulation pattern and connected to the pad; a second insulation pattern on the upper surface of the first insulation pattern and including an opening exposing a ball land of the RDL and a patterned portion in the opening; an under bump metal (UBM) on upper surfaces of the second insulation pattern and patterned portion and filling the opening, the UBM including a first locking hole exposing an edge of an upper surface of the ball land; and a conductive ball on an upper surface of the UBM and including a first locking portion in the first locking hole. The first locking hole may be about 10% to about 50% of the area of the UBM upper surface. |
| US11362048B2 |
Radiofrequency device and manufacturing method thereof
A radiofrequency device includes a buried insulation layer, a transistor, a contact structure, a connection bump, an interlayer dielectric layer, and a mold compound layer. The buried insulation layer has a first side and a second side opposite to the first side in a thickness direction of the buried insulation layer. The transistor is disposed on the first side of the buried insulation layer. The contact structure penetrates the buried insulation layer and is electrically connected with the transistor. The connection bump is disposed on the second side of the buried insulation layer and electrically connected with the contact structure. The interlayer dielectric layer is disposed on the first side of the buried insulation layer and covers the transistor. The mold compound layer is disposed on the interlayer dielectric layer. The mold compound layer may be used to improve operation performance and reduce manufacturing cost of the radiofrequency device. |
| US11362047B2 |
Integrated system-in-package with radiation shielding
A system in a package (SIP) includes carrier layer regions that have a dielectric material with a metal post therethrough, where adjacent carrier layer regions define a gap. A driver IC die is positioned in the gap having nodes connected to bond pads exposed by openings in a top side of a first passivation layer, with the bond pads facing up. A dielectric layer is on the first passivation layer and carrier layer region that includes filled through vias coupled to the bond pads and to the metal post. A light blocking layer is on sidewalls and a bottom of the substrate. A first device includes a light emitter that has first bondable features. The light blocking layer can block at least 90% of incident light. The first bondable features are flipchip mounted to a first portion of the bond pads. |
| US11362046B2 |
Semiconductor package
Some embodiments relate to a semiconductor package. The package includes a redistribution layer (RDL), and a first semiconductor die disposed over the RDL. The first semiconductor die includes a plurality of contact pads electrically coupled to the RDL. The RDL enables fan-out connection of the first semiconductor die. A die package is disposed over the first semiconductor die and over the RDL. The die package is coupled to a first surface of the RDL by a plurality of conductive bump structures. The plurality of conductive bump structures laterally surround the plurality of contact pads and have uppermost surfaces that are level with an uppermost surface of the first semiconductor die. |
| US11362038B2 |
Photolithography alignment process for bonded wafers
Various embodiments of the present disclosure are directed towards a method for forming a semiconductor structure. The method includes forming a plurality of upper alignment marks on a semiconductor wafer. A plurality of lower alignment marks is formed on a handle wafer and correspond to the upper alignment marks. The semiconductor wafer is bonded to the handle wafer such that centers of the upper alignment marks are laterally offset from centers of corresponding lower alignment marks. An overlay (OVL) shift is measured between the handle wafer and the semiconductor wafer by detecting the plurality of upper alignment marks and the plurality of lower alignment marks. A photolithography process is performed by a photolithography tool to partially form an integrated circuit (IC) structure over the semiconductor wafer. During the photolithography process the photolithography tool is compensatively aligned according to the OVL shift. |
| US11362033B2 |
Semiconductor structure and method for fabricating the same
Semiconductor structure and fabrication method are provided. The method includes providing a substrate including a first region and a second region; forming a plurality of fins on the first region of the substrate; forming an isolation structure on the first region and the second region of the substrate; forming a gate structure across the plurality of fins and on the isolation structure at the first region; etching the isolation structure and the substrate at the second region to form a first opening; filling the first opening with a conductive material layer; and etching the gate structure till exposing the isolation structure to form a second opening in the gate structure and removing a portion of the conductive material layer in the first opening to form a power rail. |
| US11362032B2 |
Semiconductor device
A semiconductor device includes a first gate electrode disposed on a substrate and extending in a first horizontal direction, a first gate contact and a dummy gate contact, which are spaced apart from each other in the first horizontal direction and are in contact with a top surface of the first gate electrode, a first interconnect line extending in a second horizontal direction and overlapping the first gate contact in a vertical direction with respect to the upper surface of the substrate, and a voltage generator configured to generate a first voltage and apply the first voltage to the first gate electrode via the first interconnect line and the first gate contact. The first gate electrode receives the first voltage via the first interconnect line and the first gate contact from the voltage generator. The dummy gate contact receives the first voltage via the first gate electrode. |
| US11362031B2 |
Integrated circuit device and method of manufacturing the same
An integrated circuit device includes a conductive line including a metal layer and an insulation capping structure covering the conductive line. The first insulation capping structure includes a first insulation capping pattern that is adjacent to the metal layer in the insulation capping structure and has a first density, and a second insulation capping pattern spaced apart from the metal layer with the first insulation capping pattern therebetween and having a second density that is greater than the first density. In order to manufacture the integrated circuit device, the conductive line having a metal layer is formed on a substrate, a first insulation capping layer having the first density is formed directly on the metal layer, and a second insulation capping layer having the second density that is greater than the first density is formed on the first insulation capping layer. |
| US11362027B2 |
Semiconductor devices and methods of manufacturing semiconductor devices
In one example, a semiconductor device includes a substrate with a top side, a bottom side, and a conductive structure. A first electronic component includes a first side, a second side, and first component terminals adjacent to the first side. The first component terminals face the substrate bottom side and are connected to the conductive structure. A second electronic component comprises a first side, a second side, and second component terminals adjacent to the second electronic component first side. The second electronic component second side is connected to the first electronic component second side so that the first component terminals and the second component terminals face opposite directions. Substrate interconnects are connected to the conductive structure, and a bottom encapsulant covers the substrate bottom side, the first electronic component, the second electronic component, and the substrate interconnects. Portions of the second component terminals and the substrate interconnects are exposed from a bottom side of the bottom encapsulant. Other examples and related methods are also disclosed herein. |
| US11362026B2 |
Embedded metal insulator metal structure
The present disclosure is directed to a method for forming metal insulator metal decoupling capacitors with scalable capacitance. The method can include forming a first redistribution layer with metal lines on a portion of a polymer layer, depositing a photoresist layer on the first redistribution layer, and etching the photoresist layer to form spaced apart first and second TIV openings in the photoresist layer, where the first TIV opening is wider than the second TIV opening. The method can further include depositing a metal in the first and second TIV openings to form respective first and second TIV structures in contact with the metal line, removing the photoresist layer, forming a high-k dielectric on a top surface of the first and second TIV structures, and depositing a metal layer on the high-k dielectric layer to form respective first and second capacitors. |
| US11362022B2 |
Multichip package semiconductor device
A multichip package and a method for manufacturing the same are provided. A multichip package includes: a plurality of semiconductor chips each mounted on corresponding lead frame pads; lead frames connected to the semiconductor chips by a bonding wire; and fixed frames integrally formed with at least one of the lead frame pads and configured to support the lead frame pads on a package-forming substrate. |
| US11362021B2 |
Pressurizing members for semiconductor package
Provided is a pressurized semiconductor package including a lead frame including a pad board and a first terminal, a semiconductor chip, pressurizing members stacked to pressurize the semiconductor chip, and a package housing. The semiconductor chip is physically pressurized by the pressurizing members and is electrically connected to improve durability of the semiconductor package and to simplify a manufacturing process. |
| US11362018B2 |
Low capacitance through substrate via structures
Apparatuses and methods are disclosed herein for the formation of to capacitance through substrate via structures. An example apparatus includes an opening formed in a substrate. Wherein the opening has at least one sidewall, a first dielectric at least formed on the sidewall of the opening, a first conductor at least formed on the first dielectric, a second dielectric at least formed on the first conductor, and a second conductor at least formed on a sidewall of the second dielectric. |
| US11362016B2 |
Transaxle with semiconductor device cooling arrangement
This disclosure relates to a motor vehicle including a transaxle with a cooling arrangement for semiconductor devices such as IGBTs or MOSFETs, and a corresponding method. In particular, this disclosure relates to a motor vehicle, such as an electrified vehicle, including a transaxle, a plurality of semiconductor devices mounted adjacent the transaxle, and a source of cooling fluid. The semiconductor devices are exposed to fluid from the source that flows into the transaxle. |
| US11362014B2 |
Power module
A power module including a circuit board, a chip, a first heat-conduction and insulation substrate and a second heat-conduction and insulation substrate is provided. The circuit board includes a board and a metal block embedded in the board and exposed from a first surface and a second surface of the board opposite to one another. The chip is disposed on a side of the second surface of the board corresponding to the metal block, and the chip is electrically and thermally connected to the metal block. The first heat-conduction and insulation substrate is located on a side of the first surface of the board to be disposed on the circuit board. The second heat-conduction and insulation substrate is electrically and thermally connected to the chip. |
| US11362012B2 |
Semiconductor device
In a semiconductor device, a first protection film covers an end portion of a first metal layer disposed on a semiconductor substrate, and has a first opening above the first metal layer. A second metal layer is disposed on the first metal layer in the first opening. An oxidation inhibition layer is disposed on the second metal layer in the first opening. A second protection film has a second opening and covers an end portion of the oxidation inhibition layer and the first protection film. The second protection film has an opening peripheral portion on a periphery of the second opening, and covers the end portion of the oxidation inhibition layer. An adhesion portion adheres to a portion of a lower surface of the opening peripheral portion. The adhesion portion has a higher adhesive strength with the second protection film than the oxidation inhibition layer. |
| US11362011B2 |
Power amplification device
A power amplification device includes: a first semiconductor chip including a first main surface and a second main surface; a first field-effect transistor, a first drain finger part, a plurality of first gate finger parts, and a source finger part; a sub-mount substrate including a third main surface and a fourth main surface; and a first filled via provided penetrating from the third main surface to the fourth main surface. In plan view, the first filled via has a rectangular shape. A long side direction of the first filled via is parallel to a long side direction of the plurality of first gate finger parts. In plan view, the first filled via is positioned to overlap part of one first gate finger part included in the plurality of first gate finger parts. |
| US11362009B2 |
Package structure and method of fabricating the same
Provided is a package structure and a method of fabricating the same. The package structure includes a die; a first encapsulant, laterally encapsulating the die; a first redistribution structure, disposed on the first encapsulant and the die; a second encapsulant, disposed on the first redistribution structure; an antenna pattern, embedded in the second encapsulant and electrically connected to the first redistribution structure; and a dielectric layer, covering the antenna pattern, wherein an upper surface of the second encapsulant is exposed by the dielectric layer, and a laser mark is formed within the upper surface of the second encapsulant. |
| US11362007B2 |
Fin height monitoring structure and fin height monitoring method
A fin height monitoring structure including a substrate, isolation structures, a first word line, and a second word line is provided. The substrate includes a first region and a second region. The isolation structures are located in the substrate of the first region to define at least one active area. The substrate in the active area has a fin that is higher than the isolation structures. The first word line is located on the isolation structures of the first region and on the fin of the first region. The second word line is located on the substrate of the second region. |
| US11362005B2 |
Semiconductor structure and fabrication method
Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a semiconductor substrate having a first region, a second region, a gate structure on the first region and a dummy gate structure on the second region, and an isolation structure in the semiconductor under the dummy gate structure. The method also includes forming source/drain openings in the semiconductor substrate at two sides of the gate structure. A sidewall surface of the source/drain opening contains an apex angle extending into the semiconductor substrate under the gate structure; and the source/drain opening exposes a sidewall surface of the isolation structure. Further; the method includes forming an initial bulk layer in the source/drain opening; performing a reshaping process to the initial bulk layer to form a bulk layer having an a substantially flat reshaped surface; and forming a protective layer on the bulk layer. |
| US11362003B2 |
Prevention of contact bottom void in semiconductor fabrication
A method for semiconductor fabrication includes providing a device structure having an isolation structure, a fin adjacent the isolation structure, gate structures over the fin and the isolation structure, one or more dielectric layers over the isolation structure and the fin and between the gate structures, a first contact hole over the fin, and a second contact hole over the isolation structure. The method further includes depositing a protection layer and treating it with a plasma so that the protection layer in the first contact hole and the protection layer in the second contact hole have different etch selectivity in an etching process; and etching the protection layer to etch through the protection layer on the bottom surface of the first contact hole without etching through the protection layer on the bottom surface of the second contact hole. |
| US11362000B2 |
Wrap-around contact on FinFET
A fin structure is on a substrate. The fin structure includes an epitaxial region having an upper surface and an under-surface. A contact structure on the epitaxial region includes an upper contact portion and a lower contact portion. The upper contact portion includes a metal layer over the upper surface and a barrier layer over the metal layer. The lower contact portion includes a metal-insulator-semiconductor (MIS) contact along the under-surface. The MIS contact includes a dielectric layer on the under-surface and the barrier layer on the dielectric layer. |
| US11361999B1 |
Stress-induced selective-area lift-off of thin films and devices on van der Waals buffer layers
A method for making a selective-area lift-off thin film comprises depositing a van der Waals (vdW) buffer on a substrate; depositing a thin film material (or device structure) on the van der Waals buffer; depositing an adhesion layer on the thin film material; forming a stressor layer on top of the thin film layer; and bonding a handle layer to the stressor layer. Force may be applied to the layered structure by one or more of rolling, bending, and shearing. The area selected for lift-off may be defined by one of laser cutting and mechanical scribing. The vdW buffer includes one or more of hBN, graphite, and graphene. The handle layer is a one of a polyimide tape, thermal release tape, UV release tape, water- or solvent-soluble tape, Kapton tape, and Scotch tape. The stressor layer is a metal film, e.g. Ni, Cr, Ti. |
| US11361992B2 |
Conformal titanium nitride-based thin films and methods of forming same
The disclosed technology generally relates to forming a titanium nitride-based thin films, and more particularly to a conformal and smooth titanium nitride-based thin films and methods of forming the same. In one aspect, a method of forming a thin film comprising one or both of TiSiN or TiAlN comprises exposing a semiconductor substrate to one or more vapor deposition cycles at a pressure in a reaction chamber greater than 1 torr, wherein a plurality of the vapor deposition cycles comprises an exposure to a titanium (Ti) precursor, an exposure to a nitrogen (N) precursor and an exposure to one or both of a silicon (Si) precursor or an aluminum (Al) precursor. |
| US11361990B2 |
Substrate processing method and device manufactured by using the same
Provided are a substrate processing method and a device manufactured by using the same, which may improve etch selectivity of an insulating layer deposited on a stepped structure. The substrate processing method includes: forming a first layer on a stepped structure having an upper surface, a lower surface, and a side surface connecting the upper surface and the lower surface; weakening at least a portion of the first layer; forming a second layer on the first layer; and performing an isotropic etching process on the first layer and the second layer. |
| US11361984B2 |
Substrate processing apparatus
A substrate processing apparatus may include a first disk provided in a chamber and configured to perform a turning motion and to include a plurality of seating holes periodically arranged within a specific radius from a center axis, a plurality of second disks provided in the seating holes, respectively, and configured to perform a revolving and rotating motion in accordance with the turning motion of the first disk, a first rotary connector structure provided between the second disk and the seating hole to allow for a rotating motion of and for an electric connection to the second disk, an electrostatic chuck provided on the second disk and configured to hold a substrate using an electric power supplied through the first rotary connector structure, and a first magnetic gear fixed to the second disk and configured to exert a torque on the second disk, and a second magnetic gear. |
| US11361983B2 |
Method for producing a semiconductor device and semiconductor device
A method for producing a semiconductor device may include applying one or more semiconductor components onto a device body where the device body has a substrate and an integrated circuit. The semiconductor component(s) may include an active zone configured to receive radiation. The method may further include transferring a multitude of semiconductor components from a sacrificial wafer to a target wafer with the device bodies still coupled by using a stamp to place them onto said device bodies. The stamp may be pressed onto the semiconductor components to adhere to the semiconductor components to the stamp and transfer them. As soon as the stamp moves in the opposite direction, the semiconductor component(s) may be separated from holding structures by breaking away webs or their projections on the second semiconductor body and leaving a breaking point directly on an outside of the semiconductor component. |
| US11361974B2 |
Method for forming semiconductor structure
A method for forming a semiconductor structure includes the steps of providing a substrate having a first region and a second region, forming a plurality of semiconductor devices on the first region of the substrate, forming a planarization layer on the substrate and covering the semiconductor devices, wherein the planarization layer on the first region and the planarization layer on the second region have a step-height, performing a first CMP process to remove the step height of the planarization layer, and after the first CMP process, performing a curing process to convert the planarization layer into a porous low-k dielectric layer. |
| US11361973B2 |
Etching method and etching apparatus
An etching method includes preparing a substrate having a processing target film, multiple core members formed on the processing target film, and a first film covering the multiple core members and the processing target film exposed between the multiple core members; forming a second film on a surface of the first film by a first gas; etching the first film by plasma of a second gas while allowing the second film to be left on a portion of the first film corresponding to a side surface of each core member; and repeating the forming of the second film and the etching of the first film. |
| US11361972B2 |
Methods for selectively removing more-doped-silicon-dioxide relative to less-doped-silicon-dioxide
Some embodiments include a method in which an assembly is formed to have a first silicon-dioxide-containing-material and a second silicon-dioxide-containing-material. The first silicon-dioxide-containing-material has a higher concentration of dopant therein than does the second silicon-dioxide-containing-material. The first silicon-dioxide-containing-material is selectively removed relative to the second silicon-dioxide-containing-material using a mixture which includes hydrofluoric acid, a second acid and an organic solvent. The organic solvent may include at least one ester and/or at least one ether. The second acid may have a pKa of less than about 5. |
| US11361969B2 |
Device substrate with high thermal conductivity and method of manufacturing the same
Provided are a device substrate with high thermal conductivity, with high heat dissipation, and with a small loss at high frequencies, and a method of manufacturing the device substrate. A device substrate 1 of the present invention can be manufactured by: provisionally bonding a Si device layer side of an SOI device substrate 10 to a support substrate 20 using a provisional bonding adhesive 31, the SOI device substrate including a Si base substrate 11, a buried layer 12 formed on the Si base substrate, having high thermal conductivity, and being an electrical insulator, and a Si device layer 13 formed on the buried layer; removing the Si base substrate 11 of the provisionally bonded SOI device substrate until the buried layer is exposed, thereby obtaining a thinned device wafer 10a; transfer-bonding the buried layer side of the thinned device wafer and a transfer substrate 40 to each other using a transfer adhesive 32 having a heat-resistant temperature of at least 150° C. by applying heat and pressure, the transfer substrate having high thermal conductivity and being an electrical insulator; and separating the support substrate 20. |
| US11361968B2 |
Atomic layer deposition using a substrate scanning system
An apparatus and method of processing a workpiece is disclosed, where a coating is applied to a workpiece and the workpiece is subsequently subjected to an etching process. These processes are performed by one semiconductor processing apparatus while the workpiece is scanned relative to the apparatus. A precursor is applied to the workpiece by the apparatus. The apparatus then uses plasma, heat or ultraviolet radiation to activate the precursor to form a coating. After the coating is applied, the apparatus is configured to perform the etching process. In certain embodiments, the etching process is a directional etching process. |
| US11361966B2 |
Method of manufacturing semiconductor device
According to one embodiment, a method of manufacturing a semiconductor device includes forming a first film on a substrate. The method further includes forming a second film on the first film. The second film includes fluoride of a first metal element having a first boiling point of 800° C. or higher and fluoride of a second metal element having a second boiling point of 800° C. or higher. The second metal element is different from the first metal element. The method further includes etching the first film using the second film as an etching mask and etching gas that includes fluorine. |
| US11361965B1 |
In situ fabrication of horizontal nanowires and device using same
Methods of in situ fabrication and formation of horizontal nanowires for a semiconductor device employ non-catalytic selective area epitaxial growth to selectively grow a semiconductor material in a selective area opening of predefined asymmetrical geometry. The selective area opening is defined in a dielectric layer to expose a semiconductor layer underlying the dielectric layer. The non-catalytic selective area epitaxial growth is performed at a growth temperature sufficient to also in situ form a linear stress crack of nanoscale width that is nucleated from a location in a vicinity of the selective area opening and that propagates in a uniform direction along a crystal plane of the semiconductor layer in both the semiconductor layer and the dielectric layer as a linear nanogap template. The semiconductor material is further selectively grown to fill the linear nanogap template to in situ form the nanowire that is uniformly linear. |
| US11361963B2 |
Semiconductor structure and method for manufacturing the same
A semiconductor structure includes a substrate; a nucleation layer located above the substrate; and a metal nitride thin film located between the nucleation layer and the substrate. A diffusion of atoms in a material of the substrate is suppressed by depositing the metal nitride thin film between the substrate and the nucleation layer, so that a thickness of the nucleation layer is significantly reduced, and a total thermal resistance of the semiconductor structure is reduced. |
| US11361960B2 |
Substrate processing apparatus and substrate processing system including the same
A substrate processing apparatus includes a chamber providing a space in which a substrate is processed, a first substrate support within the chamber and configured to support the substrate when the substrate is loaded into chamber, a second substrate support within the chamber and configured to support the substrate in a height greater than the height in which the first substrate supports the substrate, a first supply port through which a supercritical fluid is supplied to a first space under the substrate of a chamber space, a second supply port through which the supercritical fluid is supplied to a second space above the substrate of the chamber space, and an exhaust port through which the supercritical fluid is exhausted from the chamber. |
| US11361956B2 |
Time-of-flight mass spectrometer
Inside a chamber (10) evacuated by a vacuum pump, a flight tube (12) is held via a support member (11) that is of insulation. The outside of the chamber (10) is surrounded by a temperature control unit (16) including a heater. A body (10a) of the chamber (10) is made of aluminum, and a coating layer (10b) by a black nickel plating is formed on the inner wall surface of the body (10a) of the chamber (10). Due to this, the radiation factor of the chamber (10) becomes higher than that of a conventional apparatus using only aluminum, and the thermal resistance of the radiation heat transfer path between the chamber (10) and the flight tube (12) becomes low, thus improving the temperature stability of the flight tube (12). Furthermore, the time constant of the temperature change of the flight tube (12) becomes small, thus reducing the time for the flight tube (12) to stabilize to a constant temperature. |
| US11361953B2 |
Apolipoprotein E isotype detection by mass spectrometry
Provided are methods for determining the apolipoprotein E (ApoE) phenotype in a sample by mass spectrometry; wherein the ApoE allele(s) present in the sample is determined from the identity of the ions detected by mass spectrometry. In another aspect, provided herein are methods for diagnosis or prognosis of Alzheimer's disease or dementia. |
| US11361945B2 |
Plasma processing apparatus, processing system, and method of etching porous film
A plasma processing apparatus of an embodiment includes a chamber body, a stage, a gas supply system, and a plasma generator. The chamber body provides an inner space thereof as a chamber. The stage is provided in the chamber. In the stage, a flow channel for a refrigerant is formed. The gas supply system is configured to supply a first gas causing capillary condensation thereof in a porous film and a second gas for etching a porous film to the chamber. The plasma generator is configured to generate plasma of a gas supplied to the chamber. The gas supply system provides a first flow passage connecting a source of the second gas to the chamber, a second flow passage connecting a source of the first gas to the first flow passage, and a third flow passage connecting a gas discharging apparatus to the second flow passage. |
| US11361942B2 |
Adjustment of power and frequency based on three or more states
Systems and methods for adjusting power and frequency based on three or more states are described. One of the methods includes receiving a pulsed signal having multiple states. The pulsed signal is received by multiple radio frequency (RF) generators. When the pulsed signal having a first state is received, an RF signal having a pre-set power level is generated by a first RF generator and an RF signal having a pre-set power level is generated by a second RF generator. Moreover, when the pulsed signal having a second state is received, RF signals having pre-set power levels are generated by the first and second RF generators. Furthermore, when the pulsed signal having a third state is received, RF signals having pre-set power levels are generated by the first and second RF generators. |
| US11361941B2 |
Methods and apparatus for processing a substrate
Methods and apparatus for processing a substrate are herein described. For example, a processing chamber for processing a substrate includes a chamber body defining a processing volume; a radio frequency (RF) power source configured to deliver RF energy to the processing volume for processing a substrate; a substrate support comprising an electrode; an AC power supply configured to supply power to the processing chamber; an RF filter circuit connected between the electrode and the AC power supply; and a controller configured to monitor an RF voltage at the RF filter circuit that is indirectly induced into the electrode by the RF power source during operation, and to determine a processing state in the processing volume based on the monitored RF voltage. |
| US11361935B2 |
Apparatus and system including high angle extraction optics
An extraction plate for an ion beam system. The extraction plate may include an insulator body that includes a peripheral portion, to connect to a first side of a plasma chamber, and further includes a central portion, defining a concave shape. As such, an extraction aperture may be arranged along a first surface of the central portion, where the first surface is oriented at a high angle with respect to the first side. The extraction plate may further include a patterned electrode, comprising a first portion and a second portion, affixed to an outer side of the insulator body, facing away from the plasma chamber, wherein the first portion is separated from the second portion by an insulating gap. |
| US11361933B2 |
Boron X-ray window
An x-ray window can include a thin film that comprises boron. The thin film can be relatively thin, such as for example ≤200 nm. This x-ray window can be strong; can have high x-ray transmissivity; can be impervious to gas, visible light, and infrared light; can be easy of manufacture; can be made of materials with low atomic numbers, or combinations thereof. The thin film can include an aluminum layer. A support structure can provide additional support to the thin film. The support structure can include a support frame encircling an aperture and support ribs extending across the aperture with gaps between the support ribs. The support structure can also include boron ribs aligned with the support ribs. |
| US11361930B2 |
Radiation emission device
A radiation emission device is provided. The radiation emission device may include a cathode configured to emit an electron beam and an anode configured to rotate on a shaft. The anode may be situated to receive the electron beam from the cathode. The radiation emission device may further include a rotor configured to drive the anode to rotate. The rotor may be mechanically connected to the shaft. The radiation emission device may further include a sleeve configured to support the shaft via at least one bearing. The cathode, the anode, and the rotor may be enclosed in an enclosure that is connected to the sleeve. At least a portion of the sleeve may reside outside the enclosure. |
| US11361927B2 |
Lever switch device
A lever switch device includes a shaft member, a rotary operation member, a push switch, and a flexible board. The flexible board has a first board part, a first wiring part connected to the first board part, a second board part, a second wiring part connected to the second board part, and an integrated wiring part. The first board part has a fixed contact. A movable contact of the rotary operation member comes into contact with and separates from the fixed contact in response to a positional shift of the rotary operation member. The second board part receives a signal output from the push switch. The integrated wiring part is at a position away from the first board part and the second board part, and a part of the first wiring part and a part of the second wiring part are integrated in the integrated wiring part. |
| US11361923B2 |
Contactor
The present utility model provides a contactor, comprising: a housing, including a first side plate and a second side plate disposed opposite to each other; a static iron core and a movable iron core located inside the housing, a coil bobbin fitted on the static iron core, a coil wound on the coil bobbin, an elastic device located between the coil bobbin and the movable iron core, and a moving contact and astatic contact disposed opposite to each other, wherein the coil bobbin includes a contact end surface facing the movable iron core and a first fixing part and a second fixing part fixed to edges of the contact end surface, length directions of the first fixing part and the second fixing part are parallel to the first side plate and the second side plate, the first fixing part is in contact with and connected to the first side plate, and the second fixing part is in contact with and connected to the second side plate. The contactor according to the present utility model has a narrower width and saves installation space. |
| US11361920B2 |
Control system for an electrical apparatus
A system includes an electrical apparatus configured to monitor or control one or more aspects of an electrical power distribution network; and a control system including more than one electronic processor, where the electronic processors are configured to cause the control system to interact with the electrical apparatus, an interaction between the control system and the electrical apparatus including one or more of the control system providing information to the electrical apparatus and the control system receiving information from the electrical apparatus, and if some of the electronic processors are unable to cause the control system to interact with the electrical apparatus, at least one of the other electronic processors is able to cause the control system to interact with the apparatus. |
| US11361919B2 |
Switch device with at least one electric switch element and a camshaft
A switch device includes at least one switch element actuated by a cam of a camshaft. The cam is a three-dimensional cam and the at least one switch element is arranged so as to be displaceable substantially parallel to an axis of the camshaft in order to adjust a switch point. |
| US11361917B2 |
Operation switch and endoscope
An operation switch includes a concave portion in which an inner peripheral surface is constituted by a first inclined surface that is reduced in diameter toward a bottom portion from an external surface of a frame and a cylindrical portion that is formed in a pressing type operation button mounted on the concave portion and in which an outer peripheral surface is constituted by a second inclined surface that has a gradient larger than a gradient of the first inclined surface and faces the inner peripheral surface of the concave portion. |
| US11361916B2 |
Waterproof button module and electronic device
A waterproof button module includes a pressing element, a circuit board, an adhesive layer, and an elastic layer sequentially stacked. The adhesive layer is attached to the circuit board and the elastic layer. The adhesive layer includes a first opening, and the elastic layer includes a second opening. The first opening is aligned with the second opening and exposes a part of the rear surface of the circuit board. The adhesive layer has an annular zone adjacent to and surrounding the first opening. The annular zone directly contacts the circuit board. The waterproof button module further includes an electric-connection assembly and a switch. The electric-connection assembly is electrically connected to the circuit board, and passes through the first opening and the second opening. The switch is electrically connected to the circuit board, and has a button. In addition, an electronic device including the waterproof button module is disclosed. |
| US11361915B2 |
Push-button switch assembly with means for indicating a switch status
A push-button switch assembly with means for indicating a switch status includes: an actuation head for actuating the push-button switch assembly, the actuation head having a disc-shaped upper part and a tubular lower part; a sleeve-type push-button guide which is coupled to the actuation head such that, in relation to a longitudinal axis of the push-button switch assembly, the upper part is arranged above the push-button guide and the lower part surrounds the push-button guide; and a light guide for guiding light, the light guide being coupled to the actuation head such that, in relation to the longitudinal axis, at least portions of the light guide are arranged within the actuation head and within the push-button guide. The light guide extends through the actuation head with a top end in a predetermined position such that the push-button switch assembly is illuminatable in a predetermined manner by a light beam. |
| US11361909B2 |
Ultralow-temperature and high-capacity supercapacitor and preparation method therefor
Disclosed are an ultra-low temperature and high-capacity supercapacitor and a preparation method thereof. The electrode material used in the ultra-low temperature and high capacity supercapacitor is a composite porous carbon material comprising micropores and mesopores, the specific surface area of the electrode material is greater than 2500 m2/g, the pore size of micropores is larger than 0.8 nm, the pore size of mesopores is 2-3.0 nm, and the proportion of micropores is greater than 70%. The electrolyte of the supercapacitor is a solution of spirocyclic quaternary ammonium tetrafluoroborate in a mixed solvent of 1,3-dioxolane (or methyl formate, or a mixture of both)/acetonitrile. Based on the above electrode materials and combined with the above electrolyte, the supercapacitors as prepared can have a mass specific capacitance of greater than 150 F/g and a volume specific capacitance of greater than 80 F/cm3, under a temperature of −100° C. and at a current density of greater than 1 A/g. |
| US11361907B2 |
Multilayer ceramic capacitor having ultra-broadband performance
A multilayer capacitor may include a monolithic body including a plurality of dielectric layers. A first external terminal may be disposed along a first end, and a second external terminal may be disposed along a second end of the capacitor. The external terminals may include respective bottom portions that extend along a bottom surface of the capacitor. The bottom portions of the external terminals may be spaced apart by a bottom external terminal spacing distance. A bottom shield electrode may be arranged within the monolithic body between a plurality of active electrodes and the bottom surface of the capacitor. The bottom shield electrode may be spaced apart from the bottom surface of the capacitor by a bottom-shield-to-bottom distance that may range from about 3 microns to about 100 microns. A ratio of a length of the capacitor to the bottom external terminal spacing distance may be less than about 4. |
| US11361905B2 |
Multi-layered ceramic electronic component
A multilayer ceramic electronic component includes a ceramic body includes: a ceramic body including a capacitance formation portion including a dielectric layer and first and second internal electrodes disposed to be stacked in a third direction with the dielectric layer interposed therebetween, a margin portion disposed on both surfaces of the capacitance formation portion in a second direction, and a cover portion disposed on both surfaces of the capacitance formation portion in the third direction, and; and an auxiliary electrode spaced apart from the capacitance formation portion, and disposed to be in contact with one of the first and second external electrodes. The auxiliary electrode is spaced apart from first surface and the second surface of the ceramic body in a first direction. |
| US11361901B2 |
Multilayer ceramic electronic component with glass component, plating layer, and semiconductor layer
A multilayer ceramic electronic component includes a rectangular parallelepiped stacked body having first and second main surfaces and first and second end surfaces, and first and second external electrodes. The first external electrode is provided on a portion of the second main surface and on the first end surface, and the second external electrode is provided on a portion of the second main surface and on the second end surface. A semiconductor layer is provided at the interface between the stacked body and a portion of the first external electrode that is located on the portion of the second main surface, and a semiconductor layer is provided at the interface between the stacked body and a portion of the second external electrode that is located on the portion of the second main surface. |
| US11361900B2 |
Ignition coil
The present invention relates to an ignition coil for generating a high-voltage pulse with a superimposed high-frequency voltage. The ignition coil comprises a first coil arranged on the primary side, a second coil arranged on the secondary side, a magnetic core and a third coil. The windings of the first coil and of the second coil are wound around the magnetic core. The second coil and the third coil are electrically connected to one another. A high-frequency terminal, which receives the high-frequency voltage, is electrically connected to the second coil and to the third coil. |
| US11361899B2 |
Apparatus including electronic circuit for processing differential signal
An apparatus is provided. The apparatus includes an electronic circuit for processing a differential signal. A device including an electronic circuit may include a first inductor and a second inductor that process a differential signal, a first circuit connected to the first inductor in parallel, a second circuit connected to the second inductor in parallel, and lines connecting the first inductor and the first circuit, the lines being disposed to pass through an area defined by the first inductor and the second inductor. The first inductor and the second inductor have symmetrical differential structures. |
| US11361897B2 |
Integrated multi-phase non-coupled power inductor and fabrication methods
A multi-phase integrated power inductor component assembly includes a plurality of conductive windings on an integrated magnetic core structure accepting each of the plurality of conductive windings in a spaced apart, non-coupled arrangement with respect to one another. The integrated magnetic core structure includes a series of magnetic gaps each being respectively centered on one of the plurality of conductive windings. The windings include surface mount terminations for connection to a circuit board. |
| US11361895B2 |
High frequency inverter/distributed gap inductor—capacitor filter apparatus and method of use thereof
The invention comprises an inverter/converter yielding high frequency harmonics and/or non-sixty Hertz output coupled to a high frequency inductor-capacitor filter apparatus. For example, an inverter/converter apparatus is provided that uses a silicon carbide transistor to output power having a carrier frequency modulated by a fundamental frequency and a set of harmonic frequencies, where the minimum carrier frequency is above that usable by an iron-steel inductor, such as greater than ten kiloHertz at fifty or more amperes. An inductor-capacitor filter, comprising an inductor having a distributed gap core material, receives power output from the inverter/converter and processes the power by passing the fundamental frequency while reducing amplitude of the harmonic frequencies. |
| US11361894B2 |
Bi-stable solenoid with an intermediate condition
A bi-stable solenoid includes a housing, a wire coil, a permanent magnet, an armature, a pin, and a spring. The wire coil is arranged within the housing. The armature is slidably arranged within the housing and is moveable between a first armature position and a second armature position. The pin at least partially extends out of the housing and is slidably engaged by the armature. The spring is biased between the armature and the pin. When the pin encounters an intermediate position between a retracted position and an extended position due to the pin engaging an obstruction, the spring is configured to maintain a biasing force on the pin until the obstruction is removed. |
| US11361889B2 |
Magnetic inductor with multiple magnetic layer thicknesses
Embodiments are directed to a method of forming a laminated magnetic inductor and resulting structures having multiple magnetic layer thicknesses. A first magnetic stack having one or more magnetic layers alternating with one or more insulating layers is formed in a first inner region of the laminated magnetic inductor. A second magnetic stack is formed opposite a major surface of the first magnetic stack in an outer region of the laminated magnetic inductor. A third magnetic stack is formed opposite a major surface of the second magnetic stack in a second inner region of the laminated magnetic inductor. The magnetic layers are formed such that a thickness of a magnetic layer in each of the first and third magnetic stacks is less than a thickness of a magnetic layer in the second magnetic stack. |
| US11361879B2 |
Moisture curable composition for wire and cable insulation and jacket layers
An insulation or jacket layer for a coated conductor is composed of (A) a crosslinked silane-functional polyolefin, (B) a filler composed of greater than 50 wt % silica, based on the total weight of the filler, (C) a silicone-containing polymer selected from the group consisting of reactive linear silicone-containing polymers, non-reactive linear silicone-containing polymers, and non-reactive branched silicone-containing polymers, and (D) from 0.00 wt % to 20 wt % of a silanol condensation catalyst, based on the total weight of the insulation or jacket layer. |
| US11361874B2 |
Methods for using Kukharev regions in the atmosphere, in space, and at the level of the earth's surface to obtain antimatter
Based on determined locations of Kukharev (K) regions, and the estimated times of their formation on Earth, in the atmosphere, and in space, antimatter may be produced and collected, as described by the present invention. Due to jumps in the gravitational field, various standing waves are formed from the resonances of the gravitational tides. A wave of charged particles is formed within the K region and can be setup to collide with targets comprising heavy metal atoms (or other equivalents), the colliding thereby creating antimatter particles. These antimatter particles can then be stored in various traps and used for various purposes, e.g., energy formation. |
| US11361873B2 |
Aqueous assembly and control method
An aqueous assembly has a negative coefficient of reactivity with a magnitude. The aqueous assembly includes a vessel and an aqueous solution, with a fissile solute, supported in the vessel. A reactivity stabilizer is disposed within the aqueous solution to reduce the magnitude of the negative coefficient of reactivity of the aqueous assembly during operation of the aqueous assembly. |
| US11361872B2 |
Controlled hip container collapse for radioactive waste treatment
A container for the consolidation of waste materials including radioactive containing waste, and a method of consolidating such materials. The container comprises an outer cylinder and an inner cylinder comprising internal compression plates that are designed to resist collapse during consolidation, and therefore control the size of the consolidated container to a predictable shape and dimension. The container is sufficient to hold a variety of materials, including hazardous, toxic, or radioactive waste, and the container is configured to hold such waste without releasing it to the environment. |
| US11361867B2 |
Pathways for treating patients
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium are provided, including a method for presenting information for treating patients. The method comprises presenting, in a user interface, a pathway for use in treating a patient with a disease and including a combination of therapeutic and diagnostic pathway elements including an integration of diagnostic, radiation, chemotherapy, surgical and other elements. The method further comprises augmenting the pathway including providing controls for accessing additional information associated with a given pathway element, augmenting pathway elements to include indicators for pricing, efficacy and/or toxicity of a treatment associated with a given treatment element, and augmenting the pathway with a connection to another pathway including providing a link to another pathway at a point in a given pathway that provides information for a related pathway. The method further comprises presenting an augmented pathway to a patient or treating physician. |
| US11361863B2 |
Location-based wireless diabetes management systems, methods and apparatus
Embodiments provide systems, methods and apparatus for diabetes management using location-based reminders. Embodiments include requesting a user select a diabetes management related task to be reminded to perform; requesting the user select a location at which the user is to be reminded to perform the selected diabetes management related task; monitoring the user's location; detecting the user has entered the selected location; triggering the reminder in response to detecting the user has entered the selected location; and presenting the reminder to the user. Numerous other aspects are provided like helping a user locate a blood glucose meter (BGM) by identifying a most recent data transfer from the BGM based on a stored date and time associated with the most recent data transfer from the BGM, and identifying patterns of diabetes management events corresponding to particular location types. |
| US11361858B2 |
Charging device for physiological signal sensor
A charging device for a physiological signal transmitter is disclosed. The charging device includes a transmitter placing seat, and a controlling module controlling an operation between the charging device and the physiological signal transmitter in a safe state. When the physiological signal transmitter is at the predetermined position, the locking portion unlocks the operating portion to perform one of driving the second electrical connecting port to move from the first position to the second position to electrically connect to the first electrical connecting port and driving the second electrical connecting port to move from the second position to the first position to electrically disconnect to the first electrical connecting port. |
| US11361855B2 |
System, method, and non-transitory computer-readable storage media for mobile check-in in retail store
Systems and methods including one or more processors and one or more non-transitory storage devices storing computing instructions configured to run on the one or more processors and perform acts of storing, in a pharmacy database of a computer system, pharmacy account information, wherein the pharmacy account information comprises: a unique patient ID associated with a customer; a pharmaceutical drug record indicating a pharmaceutical drug prescribed to the customer; and an action record indicating triggering actions of the pharmaceutical drug; determining, by the computer system, that the customer is entering or has entered a retail store; after determining that the customer is entering or has entered a retail store: confirming, by the computer system, that the customer has at least one prescription fill order pending with a pharmacy of the retail store; prioritizing, by the computer system, the at least one prescription fill order to a top of a workflow of a pharmacist in the pharmacy of the retail store; and transmitting a communication to a mobile computing device of the customer that the customer will be notified when the at least one prescription fill order is ready to be picked up at the pharmacy of the retail store; detecting, by the computer system, a triggering action of the triggering actions of the pharmaceutical drug; and in response to detecting the triggering action, facilitating a display, on the mobile computing device of the customer, of a notification about the triggering action. Other embodiments are disclosed herein. |
| US11361852B2 |
Collecting apparatus and method
A collecting method records medical transaction declarations by: inputting private information of a patient; requiring two immediate and simultaneous fingerprints, one from each of two persons; displaying prompts for camera photographic images; acquiring the camera photographic images; recording a response through an apparatus display and user-selectable response; prompting for biometric reader activation; recording biometric fingerprints from each of the two persons on each of two physical reader devices, respectively; time-stamping a first fingerprint and a second fingerprint and electronically determining that the two fingerprints are recorded within a time period; computing an electronic decision about the physical proximity of the two persons based upon at least a time-stamp of the first fingerprint and a time-stamp of the second fingerprint; merging biometric signatures from the two persons into an electronic agreement; generating a signed electronic agreement; and outputting the signed electronic agreement to permanent storage to memorialize the medical transaction declaration. |
| US11361843B2 |
Adaptive compression and modification of nanopore measurement data
A system includes a plurality of nanopore cells. Data corresponding to nanopore states of the plurality of nanopore cells is received. The data is analyzed to determine a compressed output size of the data given at least one compression technique. It is determined whether the compressed output size exceeds a data budget. In the event it is determined that the compressed output size exceeds the data budget, the data is modified. The modified data is outputted. |
| US11361842B1 |
Communication generation using sparse indicators and sensor data
Techniques are provided for detecting copy number variations. Each sequence read of a set of sequence reads is aligned with a portion of a reference sequence. A coverage vector is generated that includes a plurality of elements, each element in the plurality of elements indicating a number of the set of sequence reads that were aligned to a particular position within the reference sequence. A normalization vector is accessed that was generated based on performance of a component analysis on a set of other coverage vectors corresponding to a set of other subjects. An adjusted coverage vector is generated using the coverage vector and normalization vector. One or more subject-specific normalization values are generated based on the coverage vector. One or more copy number variations are identified that corresponding to the sample using the adjusted coverage vector and the subject-specific normalization values. |
| US11361837B1 |
Memory location age tracking on memory die
Various embodiments enable age tracking of one or more physical memory locations (e.g., physical blocks) of a memory die, which can be from part of a memory device. In particular, various embodiments provide age tracking of one or more physical memory locations of a memory die (e.g., memory integrated circuit (IC)) using one or more aging bins on the memory die, where each aging bin is associated with a different set of physical memory locations of the memory die. By use of an aging bin for a set of physical memory locations, various embodiments can enable a processing device that interacts with a memory die, after the memory die has been subjected to one or more reflow soldering processes, to determine how much the set of physical memory locations have aged after the one or more reflow soldering processes. |
| US11361832B2 |
Storage device and operating method of storage device
A storage device includes a nonvolatile memory device and a memory controller. The memory controller receives first data from the nonvolatile memory device based on a first read command, and performs error correction on the first data. When the error correction fails, the memory controller transmits a second read command and second read voltage information to the nonvolatile memory device, receives second data from the nonvolatile memory device, transmits a third read command and third read voltage information to the nonvolatile memory device, and receives third data from the nonvolatile memory device. The memory controller adjusts an offset based on the second data and the third data, transmits a fourth read command, fourth read voltage information, and the offset to the nonvolatile memory device, receives fourth data from the nonvolatile memory device, and performs a soft decision process based on the fourth data. |
| US11361831B2 |
Proactive read disturb mitigation
A request is received to perform a set of read operations using a memory device. The set of read operations are divided into a plurality of subsets of read operations. A first read operation is selected from a first subset of read operations of the plurality of subsets of read operations. The first read operation is performed on a first location on a memory device. One or more first data integrity scan operations is performed on one or more second locations on the memory device adjacent to the first location to determine one or more first reliability statistics associated with the one or more second locations. |
| US11361829B2 |
In-storage logic for hardware accelerators
Systems and methods for performing in-storage logic operations using one or more memory cell transistors and a programmable sense amplifier are described. The logic operations may comprise basic Boolean logic operations (e.g., OR and AND operations) or secondary Boolean logic operations (e.g., XOR and IMP operations). The one or more memory cell transistors may be used for storing user data during a first time period and then used for performing a logic operation during a second time period subsequent to the first time period. During the logic operation, a first memory cell transistor of the one or more memory cell transistors may be programmed with a threshold voltage that corresponds with a first input operand value and then a gate voltage bias may be applied to the first memory cell transistor during the logic operation that corresponds with a second input operand value. |
| US11361824B1 |
Memory device and operation method thereof
Provided are a memory device and an operation method thereof. The memory device includes a plurality of word lines. The operation method comprising: performing a pre-fill operation on the word lines, in a first loop, applying a selected word line voltage on a first selected word line group and applying an unselected word line voltage on a first unselected word line group, and in a second loop, applying the selected word line voltage on a second selected word line group and applying the unselected word line voltage on a second unselected word line group, the first selected word line group being different from the second selected word line group, and the first unselected word line group being different from the second unselected word line group; performing an erase operation on the word lines; and performing a programming operation on the word lines. |
| US11361817B2 |
Pseudo-triple-port SRAM bitcell architecture
A bitcell architecture for a pseudo-triple-port memory is provided that includes a a bitcell arranged on a semiconductor substrate, the bitcell defining a bitcell width and a bitcell height and including a first access transistor and a second access transistor. A first metal layer adjacent the semiconductor substrate is patterned to form a pair of local bit lines arranged within the bitcell width. The pair of local bit lines includes a local bit line coupled to a terminal of the first access transistor and includes a complement local bit line coupled to a terminal of the second access transistor. |
| US11361816B2 |
Memory block with separately driven source regions to improve performance
Apparatuses and techniques are described for providing separate source regions in the substrate below a block of memory cells. The source regions can be separately driven by respective voltage drivers to provide benefits such as more uniform program and erase speeds and narrower threshold voltage distributions. In one approach, a single source region is provided and divided into multiple source regions by etching trenches and filling the trenches with an insulating material. Contacts to the source regions can include post-shaped contacts which extend through the block for each source region. In another approach, one or more planar contacts extend through the block for each source region. In another aspect, a program operation applies different voltages to the respective source regions during a verify test of a program operation. |
| US11361814B2 |
Column selector architecture with edge mat optimization
A memory mat architecture is presented where a column decoder is disposed within the memory array. The location of the column decoder reduces a distance between the column decoder and a target memory cell and thus reduces a distance that a column select signal travels from the column decoder to the target memory cell. A single predecoder is disposed in a bank controller for the memory array. The column decoder may be disposed in the middle of the memory array or offset from the middle near the far edge of the memory array opposite the bank controller. The location of the column decoder enables a reduced array access time to obtain data from the target memory cell. |
| US11361805B2 |
Magnetoresistive memory device including a reference layer side dielectric spacer layer
A memory device includes a first electrode, a second electrode that is spaced from the first electrode, a fixed vertical magnetization structure configured to generate a fixed vertical magnetic field and located between the first electrode and the second electrode, at least one layer stack located between the fixed magnetization structure and the second electrode and containing respective spacer dielectric layer and a respective additional reference layer including a respective ferromagnetic material having perpendicular magnetic anisotropy, and a magnetic tunnel junction located between the at least one layer stack and the second electrode, the magnetic tunnel junction containing a reference layer, a free layer, and a nonmagnetic tunnel barrier layer located between the reference layer and the free layer, and the reference layer being more proximal to the at least one layer stack than the free layer is to the at least one layer stack. |
| US11361800B2 |
Method for characterization of standard cells with adaptive body biasing
A method for an improved characterization of standard cells in a circuit design process is disclosed. Adaptive body biasing is considered during the design process by using simulation results of a cell set, a data-set for performance of the cell set, and a data-set for a hardware performance for a slow, typical and fast circuit property. Static deviations in a supply voltage are considered by determining a reference performance of a cell and a reference hardware performance monitor value at a PVT corner. A virtual regulation and adapting of body bias voltages of the cell set is performed such that the reference performance of the cell or the reference hardware performance monitor value will be reached at each PVT corner and for compensating the static deviation in the supply voltage. The results are provided in a library file. |
| US11361798B2 |
Semiconductor device
A first memory section is disposed on a substrate. A second memory section is vertically stacked on the first memory section. The first memory section is provided between the substrate and the second memory section. The first memory section includes a flash memory cell structure, and the second memory section includes a variable resistance memory cell structure. The flash memory cell structure includes at least one cell string comprising a plurality of first memory cells connected in series to each other and a bit line on the substrate connected to the at least one cell string. The bit line is interposed vertically between the at least one cell string and the second memory section and connected to the second memory section. |
| US11361791B2 |
Aluminum alloy sheet for magnetic disk and production method therefor, and magnetic disk using said aluminum alloy sheet for magnetic disk
An aluminum alloy sheet for a magnetic disk includes an aluminum alloy comprising 0.10 to 3.00 mass % (hereafter simply “%”) of Fe, 0.1 to 3.0% of Mn, 0.003 to 1.000% of Cu, and 0.005 to 1.000 s % of Zn, wherein second phase particles having a maximum diameter of 100 μm or more and 300 μm or less are dispersed at a distribution density of 50 particles/mm2 or less in a region (A) occupying 25% or less of a sheet thickness from a sheet thickness center plane to opposite surfaces of the sheet, second phase particles having a maximum diameter of 100 μm or more and 300 μm or less are 0 particles/mm2 in a region (C) that is obtained by excluding the region (A) from a region (B) occupying 50% or less of the sheet thickness from the sheet thickness center plane to the opposite surfaces of the sheet, and the amount of Mn solid solution is 0.03 mass % or more. |
| US11361790B2 |
Magnetic recording medium
A magnetic recording medium includes: a substrate; a recording layer; and a layer being provided between the substrate and the recording layer, the layer containing a superelastic body. |
| US11361789B2 |
Magnetic recording medium, magnetic recording and reproducing apparatus, magnetic tape cartridge, and magnetic tape cartridge group
In a magnetic recording medium, a number distribution A of a plurality of bright regions, based on equivalent circle diameters thereof, in a binarized image of a secondary electron image obtained by imaging a surface of the magnetic layer by a scanning electron microscope at an acceleration voltage of 5 kV and a number distribution B of a plurality of dark regions, based on equivalent circle diameters thereof, in a binarized image of a secondary electron image obtained by imaging a surface of the magnetic layer by a scanning electron microscope at an acceleration voltage of 2 kV respectively satisfy a predetermined number distribution. |
| US11361786B1 |
Data storage device employing amplifier feedback for impedance matching
A data storage device is disclosed comprising a head actuated over a magnetic media, wherein the head comprises a read element configured to generate a read signal when reading data from the magnetic media. A common-source common-gate (CS-CG) differential amplifier is coupled to the read element through a transmission line having a transmission line impedance Z0. A feedback circuit is coupled between an output of the CS-CG differential amplifier and an input of the CS-CG differential amplifier, wherein the feedback circuit is configured so that an input impedance of the CS-CG differential amplifier substantially matches the transmission line impedance Z0. |
| US11361782B2 |
Abnormal noise determination apparatus and method
An abnormal noise determination apparatus including a microphone array disposed inside a vehicle and an electronic control unit including a microprocessor. The microprocessor is configured to perform acquiring an abnormal noise data on an abnormal noise generated by a sound source disposed in a predetermined position inside the vehicle, the abnormal noise data including an information on a strength and a generation direction of the abnormal noise collected by the microphone array in advance or assumed to be collected by the microphone array; acquiring a traveling noise data including an information on a strength and a generation direction of a traveling noise collected by the microphone array during traveling of the vehicle; and determining whether the abnormal noise is included in the traveling noise of the vehicle, based on the abnormal noise data acquired and the traveling noise data acquired. |
| US11361781B2 |
Dynamic beamforming to improve signal-to-noise ratio of signals captured using a head-wearable apparatus
Method to perform dynamic beamforming to reduce SNR in signals captured by head-wearable apparatus starts with microphones generating acoustic signals. Microphones are coupled to first stem of the apparatus and to second stem of the apparatus. First and second beamformers generate first and second beamformer signals, respectively. Noise suppressor attenuates noise content from the first beamformer signal and the second beamformer signal. Noise content from first beamformer signal are acoustic signals not collocated in second beamformer signal and noise content from second beamformer signal are acoustic signals not collocated in first beamformer signal. Speech enhancer generates clean signal comprising speech content from first noise-suppressed signal and second noise-suppressed signal. Speech content are acoustic signals collocated in first beamformer signal and second beamformer signal. |
| US11361775B2 |
Method and apparatus for reconstructing signal during stereo signal encoding
Example signal reconstructing method and apparatus are described. One example method includes obtaining a reference sound channel and a target sound channel. An adaptive length of a transition segment is obtained based on an inter-channel time difference in the current frame and an initial length of the transition segment. A transition window in the current frame is obtained based on the adaptive length of the transition segment. A gain modification factor of a reconstructed signal is obtained. A transition segment signal on the target sound channel is obtained based on the inter-channel time difference, the adaptive length of the transition segment, the transition window, the gain modification factor, and a reference sound channel signal and a target sound channel signal. |
| US11361773B2 |
Using non-audio data embedded in an audio signal
Embodiments included herein generally relate to using non-audio data embedded in an audio signal. More particularly, embodiments relate to using non-audio data embedded into the audio signal to control an audio configuration of a plurality of speakers and/or to measure a delay of a playback device. |
| US11361772B2 |
Adaptive and fixed mapping for compression and decompression of audio data
Systems, methods, and software are disclosed herein for compressing audio data. In an implementation, sampled values of an audio signal have a dynamic range. A division of the dynamic range, into at least a lower range and an upper range, is identified based on a fixed mapping of a lower portion of the sampled values to a subset of quanta in a set of quanta having a depth less than a depth of the sampled values. Then an adaptive mapping of an upper portion of the sampled values to a remaining subset of quanta in the set of quanta is also identified, based at least on a dimension of the upper range. The fixed mapping is used to encode the lower portion of the sampled values based, while the adaptive mapping is used to encode the upper portion of the sampled values based on the adaptive mapping. |
| US11361770B2 |
Detecting user identity in shared audio source contexts
Computerized systems are provided for determining an identity of one or more users that use a same audio source, such as a microphone. The identity of one or more users that use a same audio source can based on generating a list of participant candidates who are likely to participate in an associated event, such as a meeting. For instance, embodiments can generate one or more network graphs of a meeting invitee any only voice input samples of the meeting invitee's N closest connections are compared to an utterance to determine the identity of the user associated with the utterance. One or more indicators that identify the users who are using the same audio source, as well as additional information or metadata associated with the identified user can be caused to be presented. |
| US11361762B2 |
Recommending multimedia based on user utterances
A method may include obtaining a dialogue of a user and a pre-trained language model. The method may include obtaining a corpus of dialogues and a corpus of response materials. The method may include modifying the pre-trained language model. The method may include identifying a dialogue topic of the dialogue of the user and identifying a set of response topics. The method may include selecting a set of response materials from the corpus of response materials. The method may include determining a first plurality of probabilities and, for each response material of the set of response materials, a respective second plurality of probabilities. The method may include comparing the first plurality of words with each respective second plurality of words associated with each respective response material of the set of response materials. The method may include selecting a response material of the set of response materials based on the comparison. |
| US11361756B2 |
Conditional wake word eventing based on environment
In one aspect, a playback device includes at least one microphone configured to detect sound. The playback detects sound via the one or more microphones and determines whether (i) the detected sound includes a voice input, (ii) the detected sound excludes background speech, and (iii) the voice input includes a command keyword. In response to the determining, the playback device performs a playback function corresponding to the command keyword. |
| US11361755B2 |
Personalization of conversational agents through macro recording
A computer-implemented conversational agent engages in a natural language conversation with a user, interpreting the natural language conversation by parsing and tokenizing utterances in the natural language conversation. Based on interpreting, a set of utterances in the natural language conversation to be recorded as a macro is determined. The macro is stored in a database with an associated macro identifier. Replaying of the macro executes a function specified in the set of utterances. |
| US11361753B2 |
System and method for cross-speaker style transfer in text-to-speech and training data generation
Systems are configured for generating spectrogram data characterized by a voice timbre of a target speaker and a prosody style of source speaker by converting a waveform of source speaker data to phonetic posterior gram (PPG) data, extracting additional prosody features from the source speaker data, and generating a spectrogram based on the PPG data and the extracted prosody features. The systems are configured to utilize/train a machine learning model for generating spectrogram data and for training a neural text-to-speech model with the generated spectrogram data. |
| US11361744B2 |
Acoustic transfer function personalization using sound scene analysis and beamforming
An audio system for a wearable device dynamically updates acoustic transfer functions. The audio system is configured to estimate a direction of arrival (DoA) of each sound source detected by a microphone array relative to a position of the wearable device within a local area. The audio system may track the movement of each sound source. The audio system may form a beam in the direction of each sound source. The audio system may identify and classify each sound source based on the sound source properties. Based on the DoA estimates, the movement tracking, and the beamforming, the audio system generates or updates the acoustic transfer functions for the sound sources. |
| US11361742B2 |
Modal reverb effects for an acoustic space
Methods and systems for performing modified reverb techniques for audio signals are described. The method may involve receiving an audio signal, a modal reverb effect to be applied to the audio signal, and an indication of a plurality of frequencies. Modes of vibration of a space simulated by the reverb effect may be separated into a set of frequencies included in the input, and a set frequencies not included in the input. The modal reverb effect may be modified by separately adjusting the separate sets of modes of vibration. The modified effect may then be applied to the audio signal. |
| US11361738B2 |
Method and apparatus for artificial playing-in of a musical instrument string and method and apparatus for producing a musical instrument string
Method for artificial playing-in of a musical instrument string comprising one or more layers of wire(s) and/or band(s) wound around a core, in which the method comprises use of a flexing process on the musical instrument string during the production or after the winding of the last layer on the musical instrument string, but preferably before grinding of the surface of the musical instrument string, apparatus for artificial playing in a musical instrument string comprising one or more layers of wire(s) and/or band(s) wound around a core, in which said apparatus comprises a string tensioning device for clamping a musical instrument string between two points with a predefined fixed or variable pull force in its longitudinal direction to keep it taut, and a flexing device used during production of a musical instrument string. |
| US11361737B2 |
Bridge circuit
In a normal state, a video input interface receives video data. In a setup state, a control input interface receives graphics data for an On Screen Display (OSD) function. In the setup state, an encoder encodes the graphics data, and stores compressed image data S6 thus encoded in memory. In the normal state, a decoder reads one item of the compressed image data from the memory according to an instruction signal, and decodes the compressed image data thus read so as to reproduce the original graphics data. A multiplexer superimposes graphics data on frame data, and outputs the superimposed graphics data. |
| US11361733B2 |
Character string display device and character string display method
There is provided a character string display device including a character string display unit (10) including a plurality of display elements (110) arrayed two-dimensionally, and a display controller (20) configured to cause the character string display unit (10) to display a predetermined character string pattern by controlling display states of the plurality of display elements (110). In the character string display device, the display controller (20) is configured to cause the character string display unit (10) to display the character string pattern such that there is no blank line between consecutive character patterns of the character string pattern and that, when two display elements corresponding to the respective consecutive character patterns are adjacent to each other, a character pattern part corresponding to one of the adjacent display elements (110) is not displayed. The character string display device and a character string display method are simple and low cost, allow effective use of display space, and achieve higher legibility of a character string. |
| US11361730B2 |
Display device, method of automatically adjusting brightness of display screen, and terminal equipment
A display device, a method for automatically adjusting brightness of a display screen and a terminal equipment are provided. An ambient light detection device is integrated in an operable region of the display device. The ambient light detection device includes a light blocking layer and a photoelectric sensor. The display device includes a display assembly and a control device. The display assembly includes a backpanel assembly, the light blocking layer being arranged in the backpanel assembly and provided with a light passing hole suitable for the passing of ambient light, the photoelectric sensor being disposed under the backpanel assembly; a display screen disposed over the backpanel assembly; a display chip connected to the display screen; and a control device connected to the photoelectric sensor. The display chip is connected to the control device, to adjust brightness of the display screen according to variance of the ambient light. |
| US11361729B2 |
Burn-in statistics and burn-in compensation
An electronic display pipeline may process image data for display on an electronic display. The electronic display pipeline may include burn-in compensation statistics collection circuitry and burn-in compensation circuitry. The burn-in compensation statistics collection circuitry may collect image statistics based at least in part on the image data. The statistics may estimate a likely amount of non-uniform aging of the sub-pixels of the electronic display. The burn-in compensation circuitry may apply a gain to sub-pixels of the image data to account for non-uniform aging of corresponding sub-pixels of the electronic display. The applied gain may be based at least in part on the image statistics collected by the burn-in compensation statistics collection circuitry. |
| US11361723B2 |
Shift register unit, gate driving circuit and method for driving the same, and display apparatus
The present disclosure provides a shift register unit, a gate driving circuit and a method for driving the same, and a display apparatus. The shift register unit includes: an input sub-circuit coupled to an input signal terminal and a pull-up node and configured to transmit an input signal from the input signal terminal to the pull-up node under control of the input signal; and n output sub-circuits, wherein each of the n output sub-circuits is coupled to the pull-up node, one of n clock signal terminals, a first level signal terminal, and one of n output signal terminals, and is configured to transmit a clock signal from the clock signal terminal coupled to the output sub-circuit to the output signal terminal coupled to the output sub-circuit under control of a voltage signal at the pull-up node, where n is an integer greater than 1. |
| US11361718B2 |
Image data processing apparatus and method for implementing local dimming
An image processing device reduces power consumption of a backlight by lowering a dimming value through brightness distribution for pixels. The image data processing device includes: an image analyzing circuit configured to analyze original image data on a video image divided into a plurality of regions and calculate a representative brightness value for each region; a dimming value calculating circuit configured to calculate a dimming value for each region in order to adjust the brightness of a backlight according to the representative brightness value; a pixel analyzing circuit configured to analyze brightness distribution for a plurality of pixels in each region; a dimming control circuit configured to re-adjust the dimming value for one region according to the brightness distribution; and a dimming output circuit configured to output, to a backlight driving device, a dimming control signal for driving the backlight according to the dimming value. |
| US11361715B1 |
Shift register unit, gate driving circuitry and method for driving the same
The present disclosure provides a shift register unit, a gate driving circuitry and a method for driving the gate driving circuitry. The shift register unit includes an input circuitry, a first latch circuitry, a second latch circuitry and an output end. The input circuitry is configured to output an input control signal to the first latch circuitry in accordance with a first level signal, a second level signal and a first ON signal. The first latch circuitry is configured to output an output signal as a gate driving signal via the output end in accordance with a first clock signal and the input control signal, and latch the output signal. The second latch circuitry is configured to output a second ON signal in accordance with a second clock signal and the output signal, and latch the second ON signal. |
| US11361714B2 |
Data driver, display apparatus including the same and method of sensing threshold voltage of pixel using the same
A data driver includes a plurality of amplifiers configured to output a plurality of data voltages to a plurality of data lines. The amplifiers are configured to output the data voltages to the corresponding data lines in a writing mode. Only one of the plurality of amplifiers is configured to output a sensing data voltage to the plurality of data lines in a sensing mode. |
| US11361711B2 |
Pixel circuit and driving method thereof, display substrate, and display apparatus
A pixel circuit, comprising: a compensation sub-circuit (30), and a storage sub-circuit (40). The compensation sub-circuit (30) is configured to adjust a potential of a second node (P2) based on a potential of a first node (P1) in response to a first control signal from a first control signal terminal (S1), and to adjust a potential of the control node (P3) based on a potential of a first terminal of a driving transistor (M0) in response to a second control signal from a second control signal terminal (S2). The storage sub-circuit (40) is configured to adjust the potential of the control node (P3) based on the potential of the second node (P2). The driving transistor (M0) is a N-type transistor. |
| US11361710B2 |
Pixel circuit with a time-shared signal line, a pixel compensation method, and a display apparatus
The present application discloses a pixel circuit for one pixel in a M-row active pixel matrix of a display panel. The pixel circuit includes a data-inputting and sensing sub-circuit at least coupled to a driving transistor via a signal line and a light-emitting device associated with the pixel in one row. The data-inputting and sensing sub-circuit is configured to use the signal line as a data line for loading a data signal to the pixel in a current cycle of displaying one frame of image. The data signal is compensated based on a compensation signal detected for the pixel in one of previous M−1 numbers of cycles. The signal line is also used as a sensing fine once per cycle for detecting a sensing signal in the current cycle to generate the compensation signal for the pixel when the one row is selected from the M-row active pixel matrix. |
| US11361708B2 |
Pixel circuit, pixel driving method and display device
A pixel circuit, a pixel driving method and a display device are provided in the present disclosure. The pixel circuit includes a light-emitting element, a pixel driving circuit, an on-off control circuit and a light-emission time control circuit. A control terminal of the on-off control circuit is electrically coupled to the light-emission time control circuit, and the on-off control circuit is configured to control a driving current output terminal to be coupled to, or decoupled from, the light-emitting element under the control of a potential at the control terminal of the on-off control circuit. The light-emission time control circuit is configured to control an nth light-emission time control signal output terminal to be coupled to, or decoupled from, the control terminal of the on-off control circuit in accordance with an nth light-emission control data voltage under the control of a second gate driving signal. N is an integer larger than 1, and n is a positive integer smaller than or equal to N. |
| US11361707B2 |
Passive LED matrix display driver with high dynamic range
A display driver has current reference units and current-generating units. Each current reference unit generates a reference current and scaling it to form a scaled reference current. Each current-generating unit generates an output current from one scaled reference current to drive a selected light emitter (LE) of a LE matrix over a time slice allocated for driving the selected LE. Each current-generating unit has a switching circuit modulating the scaled reference current according to a switching sequence to form output current pulses to drive a LE. The processor determines the switching sequence to avoid a shortest current pulse shorter than a minimum current pulse width via (a) calculating a duty cycle as a ratio of an average output current to the scaled reference current, (b) mapping the duty cycle to a modulation sequence, and (c) repeating stretching a time duration of the modulation sequence by double, splitting the modulation sequence into half, and allocating the split sequence into two times of original time slice, until the shortest current pulse satisfies the above-mentioned requirement. |
| US11361706B2 |
Micro-LED display system
A micro-LED display system is disclosed. The micro-LED display system includes a host, a plurality of row/column drivers and a plurality of μICs. The row/column drivers are coupled to the host through serial interfaces and used to provide a plurality of row clock signals and a plurality of column data signals respectively. The μICs are arranged as a matrix including columns of μICs and rows of μICs receiving the column data signals and the row clock signals respectively. All μICs in the same column of μICs are cascaded in order and all μICs in the same row of μICs are cascaded in order. |
| US11361705B2 |
Display device having interlaced scan signals
A display device includes: a plurality of pixels arranged in a row direction and a column direction; a data driver configured to transmit a data signal to the plurality of pixels through a plurality of data lines; a scan driver configured to transmit a scan signal to the plurality of pixels through a plurality of scan lines; and a light emission driver configured to transmit a light emission signal to the plurality of pixels through a plurality of light emission lines, wherein each of the scan lines and the light emission lines is connected to the pixels arranged in the row direction among the plurality of pixels, the data lines are connected to the pixels arranged in the column direction among the plurality of pixels, and the scan driver is configured to transmit the scan signal of a turn-on level to the pixels in an interlace manner. |
| US11361700B2 |
Driving chip, method of driving display panel, driving device, and display device
A driving chip for a display panel is provided. The display panel includes a plurality of subpixels arranged at a display region, the display region is provided with a boundary extended by a non-straight line, and the plurality of subpixels includes first subpixels separated from the boundary by a distance substantially smaller than a predetermined threshold and second subpixels other than the first subpixels. The driving chip includes: an adjustment circuit configured to, when the display panel is in a predetermined display mode, adjust a first grayscale value of at least a part of the first subpixels in original image data into a second grayscale value substantially smaller than the first grayscale value; a driving circuit configured to drive the at least a part of first subpixels in accordance with the second grayscale value to display an image. |
| US11361698B2 |
Electronic device and method of burn-in prevention for electronic device
An electronic device includes: a display panel and a host. The host is electrically connected to the display panel, and includes a processing unit and a graphics processing unit. The processing unit executes a driver program of the graphics processing unit and a specific program to render a display image of the specific program, wherein the display image includes a user interface. The processing unit obtains position information about a static area of the user interface. In response to the processing unit obtaining the position information about the static area of the user interface, the graphics processing unit performs a burn-in-prevention process on the static area via the driver program to generate an output image, and transmits the output image to the display panel for displaying. |